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[2003:f6:ef1b:2000:15d4:fc17:481e:8afe]) by smtp.gmail.com with ESMTPSA id vi1-20020a170907d40100b00a376758a10bsm496115ejc.17.2024.02.08.23.38.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Feb 2024 23:38:42 -0800 (PST) Message-ID: <2ada0bacadf63dc4216a9a7f4d9d5d47041a8c8b.camel@gmail.com> Subject: Re: [PATCH] counter: fix privdata alignment From: Nuno =?ISO-8859-1?Q?S=E1?= To: William Breathitt Gray , nuno.sa@analog.com Cc: linux-iio@vger.kernel.org, Greg Kroah-Hartman , Jonathan Cameron , Uwe =?ISO-8859-1?Q?Kleine-K=F6nig?= Date: Fri, 09 Feb 2024 08:42:02 +0100 In-Reply-To: References: <20240205-counter-align-fix-v1-1-4821ced960ab@analog.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.3 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2024-02-08 at 13:34 -0500, William Breathitt Gray wrote: > On Mon, Feb 05, 2024 at 04:58:14PM +0100, Nuno Sa via B4 Relay wrote: > > From: Nuno Sa > >=20 > > Aligning to the L1 cache does guarantee the same alignment as kmallocin= g > > an object [1]. Furthermore, in some platforms, that alignment is not > > sufficient for DMA safety (in case someone wants to have a DMA safe > > buffer in privdata) [2]. > >=20 > > Sometime ago, we had the same fixes in IIO. > >=20 > > [1]: > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /drivers/base/devres.c#n35 > > [2]: > > https://lore.kernel.org/linux-iio/20220508175712.647246-2-jic23@kernel.= org/ > >=20 > > Fixes: c18e2760308e ("counter: Provide alternative counter registration > > functions") > > Signed-off-by: Nuno Sa > > --- > > William, if you prefer, we can do something like in IIO and add a > > specific COUNTER_DMA_MINALIGN define > > --- > > =C2=A0drivers/counter/counter-core.c | 2 +- > > =C2=A01 file changed, 1 insertion(+), 1 deletion(-) > >=20 > > diff --git a/drivers/counter/counter-core.c b/drivers/counter/counter-c= ore.c > > index 09c77afb33ca..073bf6b67a57 100644 > > --- a/drivers/counter/counter-core.c > > +++ b/drivers/counter/counter-core.c > > @@ -34,7 +34,7 @@ struct counter_device_allochelper { > > =C2=A0 * This is cache line aligned to ensure private data behaves lik= e > > if it > > =C2=A0 * were kmalloced separately. > > =C2=A0 */ > > - unsigned long privdata[] ____cacheline_aligned; > > + unsigned long privdata[] __aligned(ARCH_DMA_MINALIGN); > > =C2=A0}; > > =C2=A0 > > =C2=A0static void counter_device_release(struct device *dev) > >=20 > > --- > > base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d > > change-id: 20240205-counter-align-fix-3faebfb572af > > -- > >=20 > > Thanks! > > - Nuno S=C3=A1 >=20 > Hi Nunon, >=20 > This change sounds reasonable, but should the comment block above > privdata be updated to reflect the change? >=20 >=20 Hi William, Yeah, maybe. I can spin a new version with that... To be sure, you mean (in= the comment) private -> privdata, right? Also realized a typo in the commit message: "Aligning to the L1 cache does guarantee..." - Obviously, I meant "does *not*...". Thanks! - Nuno S=C3=A1