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From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: Christophe JAILLET <christophe.jaillet@wanadoo.fr>,
	jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com,
	andy@kernel.org, robh@kernel.org, conor+dt@kernel.org,
	krzk+dt@kernel.org
Cc: linux-iio@vger.kernel.org, s32@nxp.com,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	chester62515@gmail.com, mbrugger@suse.com,
	ghennadi.procopciuc@oss.nxp.com
Subject: Re: [PATCH v3 2/2] iio: adc: Add the NXP SAR ADC support for the s32g2/3 platforms
Date: Thu, 18 Sep 2025 16:08:40 +0200	[thread overview]
Message-ID: <32937382-ad81-4e9b-92d7-798dafea64c1@linaro.org> (raw)
In-Reply-To: <f4e52440-fa96-486b-9c50-828fdbbe27eb@wanadoo.fr>


Hi Christophe,

On 16/09/2025 22:53, Christophe JAILLET wrote:

[ ... ]

>> +static int nxp_sar_adc_dma_probe(struct device *dev, struct 
>> nxp_sar_adc *info)
>> +{
>> +    struct device *dev_dma;
>> +    u8 *rx_buf;
>> +
>> +    info->dma_chan = devm_dma_request_chan(dev, "rx");
>> +    if (IS_ERR(info->dma_chan))
>> +        return PTR_ERR(info->dma_chan);
>> +
>> +    dev_dma = info->dma_chan->device->dev;
>> +    rx_buf = dma_alloc_coherent(dev_dma, NXP_SAR_ADC_DMA_BUFF_SZ,
>> +                    &info->rx_dma_buf, GFP_KERNEL);
> 
> maybe dmam_alloc_coherent() for the managed version?
> This would save some LoC.

Ok, thanks for the suggestion, I'll do the change.





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      reply	other threads:[~2025-09-18 14:08 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-16 20:26 [PATCH v3 0/2] NXP SAR ADC IIO driver for s32g2/3 platforms Daniel Lezcano
2025-09-16 20:26 ` [PATCH v3 1/2] dt-bindings: iio: adc: Add the NXP SAR ADC " Daniel Lezcano
2025-09-16 20:26 ` [PATCH v3 2/2] iio: adc: Add the NXP SAR ADC support for the " Daniel Lezcano
2025-09-16 20:53   ` Christophe JAILLET
2025-09-18 14:08     ` Daniel Lezcano [this message]

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