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Fri, 26 Sep 2025 05:10:22 -0700 (PDT) Message-ID: <3550caed57f460a3d28ed585eda2d955bd846930.camel@gmail.com> Subject: Re: [PATCH v2 3/7] iio: adc: add RZ/T2H / RZ/N2H ADC driver From: Nuno =?ISO-8859-1?Q?S=E1?= To: Cosmin Tanislav Cc: Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Fri, 26 Sep 2025 13:10:49 +0100 In-Reply-To: <20250925224013.2146983-4-cosmin-gabriel.tanislav.xa@renesas.com> References: <20250925224013.2146983-1-cosmin-gabriel.tanislav.xa@renesas.com> <20250925224013.2146983-4-cosmin-gabriel.tanislav.xa@renesas.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.0 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-09-26 at 01:40 +0300, Cosmin Tanislav wrote: > Add support for the A/D 12-Bit successive approximation converters found > in the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. >=20 > RZ/T2H has two ADCs with 4 channels and one with 6. > RZ/N2H has two ADCs with 4 channels and one with 15. >=20 > Conversions can be performed in single or continuous mode. Result of the > conversion is stored in a 16-bit data register corresponding to each > channel. >=20 > The conversions can be started by a software trigger, a synchronous > trigger (from MTU or from ELC) or an asynchronous external trigger (from > ADTRGn# pin). >=20 > Only single mode with software trigger is supported for now. >=20 > Signed-off-by: Cosmin Tanislav > --- Just one small nit from me. With it: Reviewed-by: Nuno S=C3=A1 > =C2=A0MAINTAINERS=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 1 + > =C2=A0drivers/iio/adc/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 10 ++ > =C2=A0drivers/iio/adc/Makefile=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 1 + > =C2=A0drivers/iio/adc/rzt2h_adc.c | 306 +++++++++++++++++++++++++++++++++= +++ > =C2=A04 files changed, 318 insertions(+) > =C2=A0create mode 100644 drivers/iio/adc/rzt2h_adc.c >=20 > diff --git a/MAINTAINERS b/MAINTAINERS > index eed08d25cb7a..220d17039084 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -21837,6 +21837,7 @@ L: linux-iio@vger.kernel.org > =C2=A0L: linux-renesas-soc@vger.kernel.org > =C2=A0S: Supported > =C2=A0F: Documentation/devicetree/bindings/iio/adc/renesas,r9a09g077-adc.= yaml > +F: drivers/iio/adc/rzt2h_adc.c > =C2=A0 > =C2=A0RENESAS RTCA-3 RTC DRIVER > =C2=A0M: Claudiu Beznea > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig > index 58a14e6833f6..cab5eeba48fe 100644 > --- a/drivers/iio/adc/Kconfig > +++ b/drivers/iio/adc/Kconfig > @@ -1403,6 +1403,16 @@ config RZG2L_ADC > =C2=A0 =C2=A0 To compile this driver as a module, choose M here: the > =C2=A0 =C2=A0 module will be called rzg2l_adc. > =C2=A0 > +config RZT2H_ADC > + tristate "Renesas RZ/T2H / RZ/N2H ADC driver" > + select IIO_ADC_HELPER > + help > + =C2=A0 Say yes here to build support for the ADC found in Renesas > + =C2=A0 RZ/T2H / RZ/N2H SoCs. > + > + =C2=A0 To compile this driver as a module, choose M here: the > + =C2=A0 module will be called rzt2h_adc. > + > =C2=A0config SC27XX_ADC > =C2=A0 tristate "Spreadtrum SC27xx series PMICs ADC" > =C2=A0 depends on MFD_SC27XX_PMIC || COMPILE_TEST > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile > index d008f78dc010..ed647a734c51 100644 > --- a/drivers/iio/adc/Makefile > +++ b/drivers/iio/adc/Makefile > @@ -123,6 +123,7 @@ obj-$(CONFIG_ROHM_BD79112) +=3D rohm-bd79112.o > =C2=A0obj-$(CONFIG_ROHM_BD79124) +=3D rohm-bd79124.o > =C2=A0obj-$(CONFIG_ROCKCHIP_SARADC) +=3D rockchip_saradc.o > =C2=A0obj-$(CONFIG_RZG2L_ADC) +=3D rzg2l_adc.o > +obj-$(CONFIG_RZT2H_ADC) +=3D rzt2h_adc.o > =C2=A0obj-$(CONFIG_SC27XX_ADC) +=3D sc27xx_adc.o > =C2=A0obj-$(CONFIG_SD_ADC_MODULATOR) +=3D sd_adc_modulator.o > =C2=A0obj-$(CONFIG_SOPHGO_CV1800B_ADC) +=3D sophgo-cv1800b-adc.o > diff --git a/drivers/iio/adc/rzt2h_adc.c b/drivers/iio/adc/rzt2h_adc.c > new file mode 100644 > index 000000000000..6a49788a5c67 > --- /dev/null > +++ b/drivers/iio/adc/rzt2h_adc.c > @@ -0,0 +1,306 @@ > +// SPDX-License-Identifier: GPL-2.0 > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + ... >=20 > + > +static int rzt2h_adc_pm_runtime_resume(struct device *dev) > +{ > + struct iio_dev *indio_dev =3D dev_get_drvdata(dev); > + struct rzt2h_adc *adc =3D iio_priv(indio_dev); Not seeing the point of the pointer arithmetic. You can pass your device po= inter (adc) directly in platform_set_drvdata() - Nuno S=C3=A1