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([2001:818:ea56:d000:94c4:fb0e:28f:2a8d]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483209af8e0sm103494245e9.5.2026.02.08.01.36.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Feb 2026 01:36:10 -0800 (PST) Message-ID: <3baf38e130d84cd18a313439191597bdea1fca6e.camel@gmail.com> Subject: Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082 From: Nuno =?ISO-8859-1?Q?S=E1?= To: Antoniu Miclaus , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Sun, 08 Feb 2026 09:37:15 +0000 In-Reply-To: <51281e19fe2955cb10ffb77b62b0d7738e9b5a93.1770382796.git.antoniu.miclaus@analog.com> References: <51281e19fe2955cb10ffb77b62b0d7738e9b5a93.1770382796.git.antoniu.miclaus@analog.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-2.fc42) Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote: > Add support for AD4082 20-bit SAR ADC. The AD4082 has the same > resolution as AD4080 (20-bit) but differs in LVDS CNV clock count > maximum (8 vs 7). >=20 > Changes: > - Add AD4082_CHIP_ID definition (0x0052) > - Create ad4082_channel with 20-bit resolution and 32-bit storage > - Add ad4082_chip_info with lvds_cnv_clk_cnt_max =3D 8 > - Register AD4082 in device ID and OF match tables >=20 > Signed-off-by: Antoniu Miclaus > --- And same, Reviewed-by: Nuno S=C3=A1 > =C2=A0drivers/iio/adc/ad4080.c | 15 +++++++++++++++ > =C2=A01 file changed, 15 insertions(+) >=20 > diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c > index 7cf3b6ed7940..7cbbe284dea7 100644 > --- a/drivers/iio/adc/ad4080.c > +++ b/drivers/iio/adc/ad4080.c > @@ -127,6 +127,7 @@ > =C2=A0#define AD4080_SPI_READ BIT(7) > =C2=A0#define AD4080_CHIP_ID 0x0050 > =C2=A0#define AD4081_CHIP_ID 0x0051 > +#define AD4082_CHIP_ID 0x0052 > =C2=A0#define AD4083_CHIP_ID 0x0053 > =C2=A0#define AD4084_CHIP_ID 0x0054 > =C2=A0#define AD4086_CHIP_ID 0x0056 > @@ -442,6 +443,8 @@ static const struct iio_chan_spec ad4080_channel =3D > AD4080_CHANNEL_DEFINE(20, 32) > =C2=A0 > =C2=A0static const struct iio_chan_spec ad4081_channel =3D AD4080_CHANNEL= _DEFINE(20, 32); > =C2=A0 > +static const struct iio_chan_spec ad4082_channel =3D AD4080_CHANNEL_DEFI= NE(20, 32); > + > =C2=A0static const struct iio_chan_spec ad4083_channel =3D AD4080_CHANNEL= _DEFINE(16, 16); > =C2=A0 > =C2=A0static const struct iio_chan_spec ad4084_channel =3D AD4080_CHANNEL= _DEFINE(16, 16); > @@ -470,6 +473,16 @@ static const struct ad4080_chip_info ad4081_chip_inf= o =3D { > =C2=A0 .lvds_cnv_clk_cnt_max =3D 2, > =C2=A0}; > =C2=A0 > +static const struct ad4080_chip_info ad4082_chip_info =3D { > + .name =3D "ad4082", > + .product_id =3D AD4082_CHIP_ID, > + .scale_table =3D ad4080_scale_table, > + .num_scales =3D ARRAY_SIZE(ad4080_scale_table), > + .num_channels =3D 1, > + .channels =3D &ad4082_channel, > + .lvds_cnv_clk_cnt_max =3D 8, > +}; > + > =C2=A0static const struct ad4080_chip_info ad4083_chip_info =3D { > =C2=A0 .name =3D "ad4083", > =C2=A0 .product_id =3D AD4083_CHIP_ID, > @@ -666,6 +679,7 @@ static int ad4080_probe(struct spi_device *spi) > =C2=A0static const struct spi_device_id ad4080_id[] =3D { > =C2=A0 { "ad4080", (kernel_ulong_t)&ad4080_chip_info }, > =C2=A0 { "ad4081", (kernel_ulong_t)&ad4081_chip_info }, > + { "ad4082", (kernel_ulong_t)&ad4082_chip_info }, > =C2=A0 { "ad4083", (kernel_ulong_t)&ad4083_chip_info }, > =C2=A0 { "ad4084", (kernel_ulong_t)&ad4084_chip_info }, > =C2=A0 { "ad4086", (kernel_ulong_t)&ad4086_chip_info }, > @@ -677,6 +691,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id); > =C2=A0static const struct of_device_id ad4080_of_match[] =3D { > =C2=A0 { .compatible =3D "adi,ad4080", &ad4080_chip_info }, > =C2=A0 { .compatible =3D "adi,ad4081", &ad4081_chip_info }, > + { .compatible =3D "adi,ad4082", &ad4082_chip_info }, > =C2=A0 { .compatible =3D "adi,ad4083", &ad4083_chip_info }, > =C2=A0 { .compatible =3D "adi,ad4084", &ad4084_chip_info }, > =C2=A0 { .compatible =3D "adi,ad4086", &ad4086_chip_info },