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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3dd33d400b4sm2326958b6e.11.2024.08.19.08.33.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Aug 2024 08:33:42 -0700 (PDT) Message-ID: <3c4edf41-fd3b-4258-9b9e-a81b25568403@baylibre.com> Date: Mon, 19 Aug 2024 10:33:41 -0500 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/7] iio: adc: ad7606: add support for AD7606C-{16,18} parts To: Alexandru Ardelean , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com References: <20240819064721.91494-1-aardelean@baylibre.com> <20240819064721.91494-8-aardelean@baylibre.com> Content-Language: en-US From: David Lechner In-Reply-To: <20240819064721.91494-8-aardelean@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 8/19/24 1:47 AM, Alexandru Ardelean wrote: > The AD7606C-16 and AD7606C-18 are pretty similar with the AD7606B. > The main difference between AD7606C-16 & AD7606C-18 is the precision in > bits (16 vs 18). > Because of that, some scales need to be defined for the 18-bit variants, as > they need to be computed against 2**18 (vs 2**16 for the 16 bit-variants). > > Because the AD7606C-16,18 also supports bipolar & differential channels, > for SW-mode, the default range of 10 V or ±10V should be set at probe. > On reset, the default range (in the registers) is set to value 0x3 which > corresponds to '±10 V single-ended range', regardless of bipolar or > differential configuration. > > Aside from the scale/ranges, the AD7606C-16 is similar to the AD7606B. > > And the AD7606C-18 variant offers 18-bit precision. The unfortunate effect > of this 18-bit sample size, is that there is no simple/neat way to get the > samples into a 32-bit array without having to do a home-brewed bit-buffer. > The ADC must read all samples (from all 8 channels) in order to get the > N-th sample (this could be reworked to do up-to-N-th sample for scan-direct). > There doesn't seem to be any quick-trick to be usable to pad the samples > up to at least 24 bits. > Even the optional status-header is 8-bits, which would mean 26-bits of data > per sample. > That means that when using a simple SPI controller (which can usually read > 8 bit multiples) a simple bit-buffer trick is required. > Maybe it would be better to just use .bits_per_word = 18 for the 18-bit ADC and not worry about "simple" SPI controller support for that one?