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Fri, 26 Sep 2025 07:40:47 -0700 (PDT) Message-ID: <3f93a0dad6ba5dea8db84973ae1518bbb98d3aed.camel@gmail.com> Subject: Re: [PATCH v2 3/7] iio: adc: add RZ/T2H / RZ/N2H ADC driver From: Nuno =?ISO-8859-1?Q?S=E1?= To: Cosmin-Gabriel Tanislav Cc: Jonathan Cameron , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , "magnus.damm" , "linux-iio@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Date: Fri, 26 Sep 2025 15:41:14 +0100 In-Reply-To: References: <20250925224013.2146983-1-cosmin-gabriel.tanislav.xa@renesas.com> <20250925224013.2146983-4-cosmin-gabriel.tanislav.xa@renesas.com> <3550caed57f460a3d28ed585eda2d955bd846930.camel@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.0 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-09-26 at 12:41 +0000, Cosmin-Gabriel Tanislav wrote: >=20 >=20 > > -----Original Message----- > > From: Nuno S=C3=A1 > > Sent: Friday, September 26, 2025 3:11 PM > > To: Cosmin-Gabriel Tanislav > > Cc: Jonathan Cameron ; David Lechner > > ; Nuno S=C3=A1 > > ; Andy Shevchenko ; Rob Herring > > ; Krzysztof > > Kozlowski ; Conor Dooley ; Gee= rt > > Uytterhoeven > > ; magnus.damm ; > > linux-iio@vger.kernel.org; linux- > > renesas-soc@vger.kernel.org; devicetree@vger.kernel.org; > > linux-kernel@vger.kernel.org > > Subject: Re: [PATCH v2 3/7] iio: adc: add RZ/T2H / RZ/N2H ADC driver > >=20 > > On Fri, 2025-09-26 at 01:40 +0300, Cosmin Tanislav wrote: > > > Add support for the A/D 12-Bit successive approximation converters fo= und > > > in the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. > > >=20 > > > RZ/T2H has two ADCs with 4 channels and one with 6. > > > RZ/N2H has two ADCs with 4 channels and one with 15. > > >=20 > > > Conversions can be performed in single or continuous mode. Result of = the > > > conversion is stored in a 16-bit data register corresponding to each > > > channel. > > >=20 > > > The conversions can be started by a software trigger, a synchronous > > > trigger (from MTU or from ELC) or an asynchronous external trigger (f= rom > > > ADTRGn# pin). > > >=20 > > > Only single mode with software trigger is supported for now. > > >=20 > > > Signed-off-by: Cosmin Tanislav > > > --- > >=20 > > Just one small nit from me. With it: > >=20 > > Reviewed-by: Nuno S=C3=A1 > >=20 > > > =C2=A0MAINTAINERS=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 1 + > > > =C2=A0drivers/iio/adc/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 10 ++ > > > =C2=A0drivers/iio/adc/Makefile=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0 1 + > > > =C2=A0drivers/iio/adc/rzt2h_adc.c | 306 +++++++++++++++++++++++++++++= +++++++ > > > =C2=A04 files changed, 318 insertions(+) > > > =C2=A0create mode 100644 drivers/iio/adc/rzt2h_adc.c > > >=20 > > > diff --git a/MAINTAINERS b/MAINTAINERS > > > index eed08d25cb7a..220d17039084 100644 > > > --- a/MAINTAINERS > > > +++ b/MAINTAINERS > > > @@ -21837,6 +21837,7 @@ L:=C2=A0 linux-iio@vger.kernel.org > > > =C2=A0L: linux-renesas-soc@vger.kernel.org > > > =C2=A0S: Supported > > > =C2=A0F: Documentation/devicetree/bindings/iio/adc/renesas,r9a09g077-= adc.yaml > > > +F: drivers/iio/adc/rzt2h_adc.c > > >=20 > > > =C2=A0RENESAS RTCA-3 RTC DRIVER > > > =C2=A0M: Claudiu Beznea > > > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig > > > index 58a14e6833f6..cab5eeba48fe 100644 > > > --- a/drivers/iio/adc/Kconfig > > > +++ b/drivers/iio/adc/Kconfig > > > @@ -1403,6 +1403,16 @@ config RZG2L_ADC > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 To compile this driver as a module, ch= oose M here: the > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 module will be called rzg2l_adc. > > >=20 > > > +config RZT2H_ADC > > > +=C2=A0=C2=A0 tristate "Renesas RZ/T2H / RZ/N2H ADC driver" > > > +=C2=A0=C2=A0 select IIO_ADC_HELPER > > > +=C2=A0=C2=A0 help > > > +=C2=A0=C2=A0=C2=A0=C2=A0 Say yes here to build support for the ADC f= ound in Renesas > > > +=C2=A0=C2=A0=C2=A0=C2=A0 RZ/T2H / RZ/N2H SoCs. > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0 To compile this driver as a module, choose = M here: the > > > +=C2=A0=C2=A0=C2=A0=C2=A0 module will be called rzt2h_adc. > > > + > > > =C2=A0config SC27XX_ADC > > > =C2=A0=C2=A0=C2=A0 tristate "Spreadtrum SC27xx series PMICs ADC" > > > =C2=A0=C2=A0=C2=A0 depends on MFD_SC27XX_PMIC || COMPILE_TEST > > > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile > > > index d008f78dc010..ed647a734c51 100644 > > > --- a/drivers/iio/adc/Makefile > > > +++ b/drivers/iio/adc/Makefile > > > @@ -123,6 +123,7 @@ obj-$(CONFIG_ROHM_BD79112) +=3D rohm-bd79112.o > > > =C2=A0obj-$(CONFIG_ROHM_BD79124) +=3D rohm-bd79124.o > > > =C2=A0obj-$(CONFIG_ROCKCHIP_SARADC) +=3D rockchip_saradc.o > > > =C2=A0obj-$(CONFIG_RZG2L_ADC) +=3D rzg2l_adc.o > > > +obj-$(CONFIG_RZT2H_ADC) +=3D rzt2h_adc.o > > > =C2=A0obj-$(CONFIG_SC27XX_ADC) +=3D sc27xx_adc.o > > > =C2=A0obj-$(CONFIG_SD_ADC_MODULATOR) +=3D sd_adc_modulator.o > > > =C2=A0obj-$(CONFIG_SOPHGO_CV1800B_ADC) +=3D sophgo-cv1800b-adc.o > > > diff --git a/drivers/iio/adc/rzt2h_adc.c b/drivers/iio/adc/rzt2h_adc.= c > > > new file mode 100644 > > > index 000000000000..6a49788a5c67 > > > --- /dev/null > > > +++ b/drivers/iio/adc/rzt2h_adc.c > > > @@ -0,0 +1,306 @@ > > > +// SPDX-License-Identifier: GPL-2.0 > > > + > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > +#include > > > + > >=20 > > ... > >=20 > > >=20 > > > + > > > +static int rzt2h_adc_pm_runtime_resume(struct device *dev) > > > +{ > > > +=C2=A0=C2=A0 struct iio_dev *indio_dev =3D dev_get_drvdata(dev); > > > +=C2=A0=C2=A0 struct rzt2h_adc *adc =3D iio_priv(indio_dev); > >=20 > > Not seeing the point of the pointer arithmetic. You can pass your devic= e > > pointer > > (adc) directly in platform_set_drvdata() > >=20 >=20 > Thanks Nuno, I'll do that. I also have another change to make to the driv= er so > I will have to send a new version and you'll have to give your Reviewed-b= y > again. >=20 > Here's the change I'm planning to make, maybe I could keep the Reviewed-b= y > if you agree. >=20 > Without this change, pm_runtime_resume_and_get() is inside the mutex, > while pm_runtime_put_autosuspend() is outside of it. This is mostly for I guess you meant the other way around. > symmetry, although it's not excluded for some subtle bugs to be able to > occur without it. >=20 Fell free to keep my tag. - Nuno S=C3=A1 > diff --git a/drivers/iio/adc/rzt2h_adc.c b/drivers/iio/adc/rzt2h_adc.c > index 708029dc8949..79053bbc71c9 100644 > --- a/drivers/iio/adc/rzt2h_adc.c > +++ b/drivers/iio/adc/rzt2h_adc.c > @@ -81,9 +81,9 @@ static int rzt2h_adc_read_single(struct rzt2h_adc *adc, > unsigned int ch, int *va > =C2=A0=C2=A0=C2=A0=C2=A0 ret =3D pm_runtime_resume_and_get(adc->dev); > =C2=A0=C2=A0=C2=A0=C2=A0 if (ret) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return ret; >=20 > -=C2=A0=C2=A0=C2=A0 guard(mutex)(&adc->lock); > +=C2=A0=C2=A0=C2=A0 mutex_lock(&adc->lock); >=20 > =C2=A0=C2=A0=C2=A0=C2=A0 reinit_completion(&adc->completion); >=20 > =C2=A0=C2=A0=C2=A0=C2=A0 /* Enable a single channel */ > @@ -106,8 +106,10 @@ static int rzt2h_adc_read_single(struct rzt2h_adc *a= dc, > unsigned int ch, int *va >=20 > =C2=A0disable: > =C2=A0=C2=A0=C2=A0=C2=A0 rzt2h_adc_start_stop(adc, false, 0); >=20 > +=C2=A0=C2=A0=C2=A0 mutex_unlock(&adc->lock); > + > =C2=A0=C2=A0=C2=A0=C2=A0 pm_runtime_put_autosuspend(adc->dev); >=20 > =C2=A0=C2=A0=C2=A0=C2=A0 return ret; > =C2=A0} >=20 > > - Nuno S=C3=A1 >=20 > ________________________________ >=20 > Renesas Electronics Europe GmbH > Registered Office: Arcadiastrasse 10 > DE-40472 Duesseldorf > Commercial Registry: Duesseldorf, HRB 3708 > Managing Director: Carsten Jauch > VAT-No.: DE 14978647 > Tax-ID-No: 105/5839/1793 >=20 > Legal Disclaimer: This e-mail communication (and any attachment/s) is > confidential and contains proprietary information, some or all of which m= ay be > legally privileged. It is intended solely for the use of the individual o= r > entity to which it is addressed. Access to this email by anyone else is > unauthorized. If you are not the intended recipient, any disclosure, copy= ing, > distribution or any action taken or omitted to be taken in reliance on it= , is > prohibited and may be unlawful.