Re: [PATCH v2 1/5] iio: adc: ad400: Set transfer bits_per_word to have data in CPU endianness

[David Lechner <dlechner@baylibre.com>]

On 3/19/25 9:57 AM, Marcelo Schmitt wrote:
> When SPI `bits_per_word` is not set, SPI transfers default 8-bit word size
> and ADC data gets stored in big-endian format in memory. Because of that,
> the IIO driver requests ADC data to be rearranged from BE to CPU
> endianness. However, with `bits_per_word` set to the number of ADC
> precision bits, transfers use larger word sizes that get stored in
> 'in-memory wordsizes' and can be read in CPU endianness.
> 
> Use proper `bits_per_word` size for SPI transfers thus saving the driver
> from requesting endianness conversions. With that, shifting the buffer
> data is also no longer needed. This change has no impact on IIO device
> functionality.
> 
> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
> ---

This is a breaking change. Some SPI controllers, like RPi can only do 8-bit
transfers, so this driver would stop working on those platforms. Also, if
anyone made software already that depended on the big-endian ordering without
checking the scan_type attribute, it would break that software.

I would leave this as-is (drop this patch) and just make it:

	.endianness = _offl ? IIO_CPU : IIO_BE,

in the next patch.