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Thu, 21 May 2026 03:46:24 -0700 (PDT) X-Received: by 2002:a17:90b:2b8b:b0:368:6159:980c with SMTP id 98e67ed59e1d1-36a45642699mr2467142a91.20.1779360384209; Thu, 21 May 2026 03:46:24 -0700 (PDT) Received: from [10.217.217.28] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36a3d1e9300sm2494766a91.13.2026.05.21.03.46.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 21 May 2026 03:46:23 -0700 (PDT) Message-ID: <6c876a92-e572-4cb9-8c31-bbf681a4770b@oss.qualcomm.com> Date: Thu, 21 May 2026 16:16:17 +0530 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver To: Jonathan Cameron Cc: David Lechner , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Kamal Wadhwa , David Collins , Anjelique Melendez , Neil Armstrong , Stephan Gerhold References: <20260515-gen3_adc_tm-v1-0-39ba29f9b4ab@oss.qualcomm.com> <20260515-gen3_adc_tm-v1-1-39ba29f9b4ab@oss.qualcomm.com> <20260515145450.3b1e9c3d@jic23-huawei> Content-Language: en-US From: Jishnu Prakash In-Reply-To: <20260515145450.3b1e9c3d@jic23-huawei> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIxMDEwNiBTYWx0ZWRfX+x5GENV8/38M /nNvAxhDrJxJ1MlnnredaC8uxkMsgNEW4mN0Vzpu4JsWHIqts4rvvBrL3yakKDmyjJzrE5FQTFg Nge4AtcGohyAJ1HbMypEoCoP4zZm+q7wiL5Cs5HL6sEqvaW1pl+0gJvCXMY8t0yt5mkwyH1Diup KKKwbY2Nm1uYkDOZ6sC/M/xxbcb/0ASiDsxlD2wF+PZ8qcfNFekgzQTaKwLG+aATdRcGSfn35Qc lz5n9pvba/Fw2sYhleTFYlkKsb+I2Q58tPN9ohXLLZejJVtlgGd3N6ctzIT/a8UliphkHl3YNuE 3hj1N+Q83/rgq5zVXWXSLzKrGio0/SXitzfOM/BUBdHac0AJiKPxD9SFqXoc/xVXscBLwWikQ1L eBQgB56JGAqhLZcoXQN5FgHrJElnwkU6E4TOgzOjpVRbbLoUV56hpTZ8/Y395RqTwKx/xuzFYvZ Q5/pxDtyF9ElY60/zKg== X-Authority-Analysis: v=2.4 cv=aueCzyZV c=1 sm=1 tr=0 ts=6a0ee281 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=c92rfblmAAAA:8 a=EUspDBNiAAAA:8 a=4cpjoD5cMJYPUXxCrlAA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=GvGzcOZaWPEFPQC_NcjD:22 X-Proofpoint-GUID: 4CTmJGWvlv0SpPyQnrapsyIsx_xwAZxG X-Proofpoint-ORIG-GUID: 4CTmJGWvlv0SpPyQnrapsyIsx_xwAZxG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-21_01,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 adultscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605210106 Hi Jonathan, On 5/15/2026 7:24 PM, Jonathan Cameron wrote: > On Fri, 15 May 2026 14:23:44 +0530 > Jishnu Prakash wrote: > >> The SDAM0 IRQ can be triggered for both EOC (end of conversion) events for >> immediate ADC reads done in this driver and for threshold violation events, >> based on ADC_TM thresholds configured from the auxiliary ADC_TM driver on >> TM channels on the first SDAM. >> >> At present, this interrupt is handled only in the ISR in the main ADC driver. >> When the ISR is triggered for an ADC_TM event, this driver notifies the ADC_TM >> driver by calling a notifier callback exposed from it for this purpose. >> >> To simplify the interrupt handling in both drivers, share the interrupt between >> the drivers. With this, ADC_TM interrupts on SDAM0 will be handled directly in >> the ADC_TM driver, so remove the notifier callback and all TM interrupt >> handling in the main ADC ISR. >> >> Signed-off-by: Jishnu Prakash >> --- > > Some stuff from Sashiko on this one: > https://sashiko.dev/#/patchset/20260515-gen3_adc_tm-v1-0-39ba29f9b4ab%40oss.qualcomm.com > > Given I assume you didn't see the warning (I'm fairly sure the bots analysis is correct > as we've been busy fixing similar cases all cycle), can I just check, have you tested > this on latest upstream? I had tested on a build based on top of Linux 7.1-rc2 and verified the driver's basic functionality, but I think I overlooked the warning from the interrupt management code, sorry about the miss. > > Thanks, > > Jonathan > > >> drivers/iio/adc/qcom-spmi-adc5-gen3.c | 52 +++++---------------------- >> include/linux/iio/adc/qcom-adc5-gen3-common.h | 2 -- >> 2 files changed, 8 insertions(+), 46 deletions(-) >> >> diff --git a/drivers/iio/adc/qcom-spmi-adc5-gen3.c b/drivers/iio/adc/qcom-spmi-adc5-gen3.c >> index f8168a14b907..a819c3e627a0 100644 >> --- a/drivers/iio/adc/qcom-spmi-adc5-gen3.c >> +++ b/drivers/iio/adc/qcom-spmi-adc5-gen3.c > >> static int adc5_gen3_probe(struct platform_device *pdev) >> { >> struct device *dev = &pdev->dev; >> @@ -818,7 +782,7 @@ static int adc5_gen3_probe(struct platform_device *pdev) >> } >> >> ret = devm_request_irq(dev, adc->dev_data.base[ADC5_GEN3_VADC_SDAM].irq, >> - adc5_gen3_isr, 0, >> + adc5_gen3_isr, IRQF_ONESHOT | IRQF_SHARED, > > Sashikio points out that IRQF_ONESHOT is never correct for a non threaded > interrupt. The point of that flag is to ensure we don't handle another interrupt > until the thread is done. If there isn't a thread then it doesn't do anything > (other than omit a warning!) I tried at first keeping only the IRQF_SHARED flag here, but it seems that shared interrupts need to agree on the ONESHOT flag configuration, else the second interrupt's IRQ request call fails. And the ADC_TM interrupt needs to be ONESHOT, since we don't want that interrupt to be rearmed before we have notified the thermal framework from the threaded part of the handler. So I had to add the IRQF_ONESHOT here too, though it is not useful here. I think it's best to use a threaded IRQ handler in this driver too. I don't really see any meaningful way to split the actions in the interrupt handler here into a primary handler and a threaded handler, so is it fine if I just make the primary handler NULL and move all the ISR functionality into the threaded handler part ? Thanks, Jishnu > >> adc->dev_data.base[ADC5_GEN3_VADC_SDAM].irq_name, >> adc); >> if (ret) >> diff --git a/include/linux/iio/adc/qcom-adc5-gen3-common.h b/include/linux/iio/adc/qcom-adc5-gen3-common.h >> index 6303eaa6640b..39cbfcbdb101 100644 >> --- a/include/linux/iio/adc/qcom-adc5-gen3-common.h >> +++ b/include/linux/iio/adc/qcom-adc5-gen3-common.h >> @@ -205,7 +205,5 @@ int adc5_gen3_get_scaled_reading(struct device *dev, >> int adc5_gen3_therm_code_to_temp(struct device *dev, >> struct adc5_channel_common_prop *common_props, >> u16 code, int *val); >> -void adc5_gen3_register_tm_event_notifier(struct device *dev, >> - void (*handler)(struct auxiliary_device *)); >> >> #endif /* QCOM_ADC5_GEN3_COMMON_H */ >> >