From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1111EC43334 for ; Tue, 21 Jun 2022 15:39:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352887AbiFUPjk (ORCPT ); Tue, 21 Jun 2022 11:39:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353027AbiFUPja (ORCPT ); Tue, 21 Jun 2022 11:39:30 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 973232CCBD; Tue, 21 Jun 2022 08:39:26 -0700 (PDT) Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 25LCNK4x006621; Tue, 21 Jun 2022 17:38:54 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=selector1; bh=7wHS4RrrYBEtrsvSBNdXWADwm7X95Mf23VVgUaHRP10=; b=HoLxW7TLAl7UigaZQ6mU4IMQYuNMnW1PQDVsSZuYQEQs2QftbIOcBFYzyRtVU+Cf3DQG +TKucfW1Civp6sCeGFdgGVYeTFJl4GsaaGrEA6WDBnWunsFMQz8wPxrv2i8PZEVtgUA1 DmeQQM7uLXUyINSEJd+kkEskZ9M3yG4W1Hm0Vwq0sbRdydV4pJ/wX1MiLY8yp6INIrtx TuXV6RXBH2Pvx3mTLkNtyLwcJvLfdvrMfzIFqVfaawW7pzpq9Hqi4tpHXSb/jvL9cPPn SSSl3FOZCaVsCqGI/tYAkNj9FWej/loQr+sEcu29IK81DRQA1Z59h3TabIxag/5VRTDO ZQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3gua1n2td5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Jun 2022 17:38:54 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 15F0B10002A; Tue, 21 Jun 2022 17:38:54 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0E1C122F7A2; Tue, 21 Jun 2022 17:38:54 +0200 (CEST) Received: from [10.252.18.52] (10.75.127.116) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2308.20; Tue, 21 Jun 2022 17:38:53 +0200 Message-ID: <9b43b142-e62c-d46b-8b42-449720682463@foss.st.com> Date: Tue, 21 Jun 2022 17:38:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 1/2] iio: adc: stm32-adc: make safe adc disable Content-Language: en-US To: Olivier Moysan , Alexandre Torgue , Jonathan Cameron , Lars-Peter Clausen , Maxime Coquelin , Paul Cercueil , Wan Jiabing CC: , , , References: <20220620154738.801706-1-olivier.moysan@foss.st.com> <20220620154738.801706-2-olivier.moysan@foss.st.com> From: Fabrice Gasnier In-Reply-To: <20220620154738.801706-2-olivier.moysan@foss.st.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.116] X-ClientProxiedBy: GPXDAG2NODE5.st.com (10.75.127.69) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-21_08,2022-06-21_01,2022-02-23_01 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org On 6/20/22 17:47, Olivier Moysan wrote: > From ADC reference manual the software is allowed to write the > control bit ADDIS of the ADC_CR register only if the ADC is enabled. > Return immediately from stm32h7_adc_disable() if ADC is already disabled. > > Signed-off-by: Olivier Moysan Hi Olivier, You can add my: Reviewed-by: Fabrice Gasnier Thanks, Fabrice > --- > drivers/iio/adc/stm32-adc.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c > index a68ecbda6480..80e333f65ddd 100644 > --- a/drivers/iio/adc/stm32-adc.c > +++ b/drivers/iio/adc/stm32-adc.c > @@ -876,6 +876,9 @@ static void stm32h7_adc_disable(struct iio_dev *indio_dev) > int ret; > u32 val; > > + if (!(stm32_adc_readl(adc, STM32H7_ADC_CR) & STM32H7_ADEN)) > + return; > + > /* Disable ADC and wait until it's effectively disabled */ > stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS); > ret = stm32_adc_readl_poll_timeout(STM32H7_ADC_CR, val,