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[76.88.115.8]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73bd21c65c9sm9401091b3a.61.2025.04.15.15.20.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Apr 2025 15:20:41 -0700 (PDT) Date: Tue, 15 Apr 2025 15:20:38 -0700 From: Sukrut Bellary To: Jonathan Cameron Cc: Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Angelo Compagnucci , Nishanth Menon , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] iio: adc: ti-adc128s052: Add lower resolution devices support Message-ID: References: <20250408132120.836461-1-sbellary@baylibre.com> <20250408132120.836461-3-sbellary@baylibre.com> <20250412141253.6d57032e@jic23-huawei> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250412141253.6d57032e@jic23-huawei> On Sat, Apr 12, 2025 at 02:12:53PM +0100, Jonathan Cameron wrote: > On Tue, 8 Apr 2025 06:21:20 -0700 > Sukrut Bellary wrote: > > > The adcxx4s communicates with a host processor via an SPI/Microwire Bus > > interface. The device family responds with 12-bit data, of which the LSB > > bits are transmitted by the lower resolution devices as 0. > > The unavailable bits are 0 in LSB. > > Shift is calculated per resolution and used in scaling and > > raw data read. > > > > Lets reuse the driver to support the family of devices with name > > ADCS, where > > * bb is the resolution in number of bits (8, 10, 12) > > * c is the number of channels (1, 2, 4, 8) > > * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS > > and 101 for 1 MSPS) > > > > Complete datasheets are available at TI's website here: > > https://www.ti.com/lit/gpn/adcs.pdf > > > > Tested only with ti-adc102s051 on BegalePlay SBC. > > https://www.beagleboard.org/boards/beagleplay > > > > Co-developed-by: Nishanth Menon > > Signed-off-by: Nishanth Menon > > Signed-off-by: Sukrut Bellary > > --- > > Changes in v3: > > - used be16_to_cpu() for the endian conversion. > > - used config index enum while setting up the adc128_config[] > > > > - Link to v2: > > https://lore.kernel.org/lkml/20231022031203.632153-1-sukrut.bellary@linux.com/ > > > > Changes in v2: > > - Arranged of_device_id and spi_device_id in numeric order. > > - Used enum to index into adc128_config. > > - Reorder adc128_config in alphabetical. > > - Include channel resolution information. > > - Shift is calculated per resolution and used in scaling and > > raw data read. > > > > - Link to v1: https://lore.kernel.org/all/20220701042919.18180-1-nm@ti.com/ > > --- > > drivers/iio/adc/ti-adc128s052.c | 149 ++++++++++++++++++++++++-------- > > 1 file changed, 112 insertions(+), 37 deletions(-) > > > > diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c > > index a456ea78462f..d4b76fd85abd 100644 > > --- a/drivers/iio/adc/ti-adc128s052.c > > +++ b/drivers/iio/adc/ti-adc128s052.c > > @@ -7,6 +7,22 @@ > > * https://www.ti.com/lit/ds/symlink/adc128s052.pdf > > * https://www.ti.com/lit/ds/symlink/adc122s021.pdf > > * https://www.ti.com/lit/ds/symlink/adc124s021.pdf > > + * > > + * The adcxx4s communicates with a host processor via an SPI/Microwire Bus > > + * interface. This driver supports the whole family of devices with a name > > + * ADCS, where > > + * bb is the resolution in number of bits (8, 10, 12) > > + * c is the number of channels (1, 2, 4, 8) > > + * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS > > + * and 101 for 1 MSPS) > > + * > > + * Complete datasheets are available at TI's website here: > > + * https://www.ti.com/lit/gpn/adcs.pdf > > + * > > + * 8, 10, and 12 bits converters send 12-bit data with > > + * unavailable bits set to 0 in LSB. > > + * Shift is calculated per resolution and used in scaling and > > + * raw data read. > > */ > > > > #include > > @@ -53,7 +69,7 @@ static int adc128_adc_conversion(struct adc128 *adc, u8 channel) > > if (ret < 0) > > return ret; > > > > - return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF); > > + return be16_to_cpu(*((__be16 *)adc->buffer)); > > I think we now have a convenient adc->buffer16 (probably introduced in Matti's > series. Sorry I missed the overlap of the two series until now. These part numbers > are too long and confusing to stick in my head! > > Matti took on maintaining that driver because he wanted to see any changes > that might affect the Rohm part it now supports. If anyone wants to volunteer > from the TI side of things that would be ideal - just send a patch adding to > the new MAINTAINERS entry. Thanks for the review. Sure, I can work on the TI side of things. > Jonathan > > > > }