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([2600:8803:e7e4:500:3533:aa22:9a69:df1c]) by smtp.gmail.com with ESMTPSA id 00721157ae682-80f877b6738sm10710947b3.34.2026.06.29.07.21.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Jun 2026 07:21:31 -0700 (PDT) Message-ID: Date: Mon, 29 Jun 2026 09:21:30 -0500 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/7] dt-bindings: iio: adc: Add TI ADS126x ADC family To: Kurt Borja , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260628-ads126x-v2-0-4b1b231325ba@gmail.com> <20260628-ads126x-v2-1-4b1b231325ba@gmail.com> <946a30c9-01e9-42f1-bd2b-b7934fda85cf@baylibre.com> Content-Language: en-US From: David Lechner In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/28/26 2:12 PM, Kurt Borja wrote: > On Sun Jun 28, 2026 at 10:45 AM -05, David Lechner wrote: >> On 6/28/26 12:36 AM, Kurt Borja wrote: >>> The ADS1262 and ADS1263 are 32-bit, 38.4-kSPS delta-sigma ADCs with an >>> integrated PGA, internal reference, excitation and burn-out current >>> sources for sensor biasing and diagnostics. The ADS1263 adds a second, >>> 24-bit delta-sigma ADC (ADC2) for background measurements. >>> ... >>> + >>> +patternProperties: >>> + "^channel@[0-9]+$": >>> + $ref: /schemas/iio/adc/adc.yaml# >>> + unevaluatedProperties: false >>> + >>> + properties: >>> + reg: >>> + maxItems: 1 >>> + >> >> If we want to allow single-ended/pseudo-differential inputs, then we should >> also allow single-channel (positive pin) and common-mode-channel (negative >> pin) properties. >> >> This will also require additional common-mode--supply properties to allow >> for the negative pin connected to something other than GND. > > Ah interesting. Why the N though? wouldn't a single supply connected to > AINCOM be enough here? In theory, any AINx could be a common mode input by connecting it to a constant voltage supply. >>> + $ref: /schemas/types.yaml#/definitions/flag >>> + description: >>> + Automatically swap the IDAC1 and IDAC2 connections of alternate >>> + conversions. The ADC averages the alternate conversions to eliminate >>> + IDAC mismatch. >>> + >>> + ti,pga-bypass: >>> + $ref: /schemas/types.yaml#/definitions/flag >>> + description: Bypass the Programmable Gain Amplifier (PGA). >> >> Why would this need to be a DT property? I didn't read this datasheet >> too much, but in other chips I have seen there are usually rules that >> PGA has to be bypassed under certain conditions, but not others, so >> this seems like something for the driver to handle rather than the >> devicetree. > > To be honest, I don't know what would be the application for this. AFAIK > when the PGA is bypassed the analog inputs are read unbuffered (?) In > that case shouldn't this belong DT? > Let's leave it out of the DT for now until we learn more about how it is intended to be used.