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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-72bb274e95dsm2442600a34.52.2025.03.19.07.10.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Mar 2025 07:10:27 -0700 (PDT) Message-ID: Date: Wed, 19 Mar 2025 09:10:26 -0500 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] iio: dac: ad3552r-hs: add debugfs reg access To: Angelo Dureghello , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250319-wip-bl-ad3552r-fixes-v2-1-2656bdd6778e@baylibre.com> From: David Lechner Content-Language: en-US In-Reply-To: <20250319-wip-bl-ad3552r-fixes-v2-1-2656bdd6778e@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 3/19/25 8:30 AM, Angelo Dureghello wrote: > From: Angelo Dureghello > > Add debugfs register access. > Forgot to pick up Nuno's review tag or explain why not. > Signed-off-by: Angelo Dureghello > --- > Changes in v2: > - set reg size setup as inline. > - Link to v1: https://lore.kernel.org/r/20250319-wip-bl-ad3552r-fixes-v1-1-cf10d6fae52a@baylibre.com > --- > drivers/iio/dac/ad3552r-hs.c | 26 ++++++++++++++++++++++++++ > drivers/iio/dac/ad3552r.h | 2 ++ > 2 files changed, 28 insertions(+) > > diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c > index cd8dabb60c5548780f0fce5d1b68c494cd71321d..fdea9984547ae338a51c4671024133be82ed854f 100644 > --- a/drivers/iio/dac/ad3552r-hs.c > +++ b/drivers/iio/dac/ad3552r-hs.c > @@ -7,6 +7,7 @@ > */ > > #include > +#include Is this header actually needed? > #include > #include > #include > @@ -464,6 +465,30 @@ static int ad3552r_hs_setup_custom_gain(struct ad3552r_hs_state *st, > gain, 1); > } > > +static int ad3552r_hs_reg_access(struct iio_dev *indio_dev, unsigned int reg, > + unsigned int writeval, unsigned int *readval) > +{ > + struct ad3552r_hs_state *st = iio_priv(indio_dev); > + int size_xfer, max_reg_addr; > + > + max_reg_addr = (st->model_data->num_hw_channels == 2) ? > + AD3552R_REG_ADDR_MAX : AD3551R_REG_ADDR_MAX; Might as well add max reg to the model_data struct and read it directly instead of inferring it from other info. > + > + if (reg > max_reg_addr) > + return -EINVAL; > + > + /* > + * There is no 3 or 4 bytes r/w len possible in HDL, so keeping 2 > + * also for the 24bit area. > + */ > + size_xfer = (reg > AD3552R_SECONDARY_REGION_START) ? 2 : 1; If we are reading both bytes of a 16-bit register at the same time, we should only allow reading the lower of the two addresses, otherwise reading the high register address could return 1 byte from one register and 1 byte from another register. And if we can't read the 24-bit and 32-bit registers all at once, I think we should read them as 8-bit instead of 16-bit because the 24-bit registers are not 16-bit aligned. Or to keep it consistent, just allow accessing everything as 8-bit registers. > + > + if (readval) > + return ad3552r_hs_reg_read(st, reg, readval, size_xfer); > + > + return st->data->bus_reg_write(st->back, reg, writeval, size_xfer); > +}