Re: [PATCH v5 7/9] spi: axi-spi-engine: support SPI_MULTI_LANE_MODE_STRIPE

David Lechner
2026-01-16T22:43:15Z

On 1/14/26 3:16 AM, Jonathan Cameron wrote:
> On Mon, 12 Jan 2026 11:45:25 -0600
> David Lechner <dlechner@baylibre.com> wrote:
>
>> Add support for SPI_MULTI_LANE_MODE_STRIPE to the AXI SPI engine driver.
>>
>> The v2.0.0 version of the AXI SPI Engine IP core supports multiple
>> lanes. This can be used with SPI_MULTI_LANE_MODE_STRIPE to support
>> reading from simultaneous sampling ADCs that have a separate SDO line
>> for each analog channel. This allows reading all channels at the same
>> time to increase throughput.
>>
>> Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
>> Signed-off-by: David Lechner <dlechner@baylibre.com>
> Hi David,
>
> I kind of hope ADI make their versions backwards compatible (or at
> least try to) so the version check might be a bit over the top.

FWIW, I was the one that actually pushed for the FPGA IP block major
version change. There wasn't a default value for the new bit fields
that worked in every case, so there wasn't a way to make it fully
backwards compatible with older drivers that don't set those bits.

>
> Anyhow, not my problem and the code is nice and clean.
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>