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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Jonathan Cameron , David Lechner , Nuno =?iso-8859-1?Q?S=E1?= , Andy Shevchenko , Ping-Ke Shih , Richard Cochran , Andrew Lunn , "David S. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?SgJdau4ntgtKZsDJuKpWMEYFaDsEd8oYD73nYnRk2eR6h4hBJlEQf6qQOtow?= =?us-ascii?Q?3km5Qd+n4sVvxWKggzs1qjTcBLZpXbC2DYEtXZMXe4y2Yps9lAeACHbNind1?= =?us-ascii?Q?m5gH7VsSgjGtLLeYfKHZ9G/AgD9wIdBKNXFVAdwZaCxmuXvg32qgqQyCEHwD?= =?us-ascii?Q?7BkytXX6IC5bA7K3o8565y4p0oXypNfu8ITpCVEigrez90yEYsZSi22CC1An?= =?us-ascii?Q?DayeMJyepdjTzTH72AKwwStH37gh9DUBmybo+nrAvy/ZwsRzmk8DLmpEtKtO?= =?us-ascii?Q?6gJuoq2yQlqddwKjffMadqX8753MNXbmrYrW1nZ9GuGGCgb8a+3hTeTEyogA?= =?us-ascii?Q?vXc8TOlseW1phkbJL43bSKtvb8ePdehMzlAmO9PQ0qr0mZd8LCpqTUAKj124?= =?us-ascii?Q?veLP8Et36swzDhgR8AO1m1aNujzKFGjsiPPADOGqJbU1qLBh4/LPbRJP3gb6?= =?us-ascii?Q?96FCBxOJHrEuJ/6/CxkXsosY+4ZPf8Ey/z1epRuGL20LODAJGyFQHnx7otBm?= =?us-ascii?Q?XKiYX4u7/efQHOCwsBC6V9ekmGC0/RTLWNwLBzBgI+GjS7gxghTB6XzoOSpN?= =?us-ascii?Q?jw+6Hc001jT0GGgmNg5/+/hg7y6++YxOkAu8VkL9MOZ67rUy0zMU2GUif+96?= =?us-ascii?Q?Qcx09pthyrQYZgpZYxFXf4DtN8qfMjEUGsesv7309x5FHKb/BDmV9AEyp4Zj?= =?us-ascii?Q?26R1eEQbbVWvVQ3hskN9HH+vqSV1v3eG8n1v/3AAC+EDk89c0ckkCbkdAE8U?= =?us-ascii?Q?3xNxbrEqmwyXidBWEi8N7VQVphbdlx6Fgw+GlzltRA69ZhHx4JDNw0TSpQw1?= =?us-ascii?Q?rGjRyCkWDxs5pzQDz76J/HUmd94XrWkPk3wr8owGYRZCvWvDGRbUpNNjUm3C?= =?us-ascii?Q?EY88sO7q/uABA6MNPqNwJBNIG4I4HtAiT0ibzsifVGfrk5zLMEFaq9ol9iAv?= =?us-ascii?Q?GMiIxWWOycUG4zsQuIBTPrHyTxfOHv29TxtTHJqCWeaN4O1kqGnozMR3UWpd?= =?us-ascii?Q?H7yFyMRE+XQXWgFGNkXS+4vN04iYGAABW19751FwpUgcpJngJMObiEGaJvQr?= =?us-ascii?Q?lqe61+XR9t/q7w6D8i5B1/lc5bCS/uTOHTs7y7+NIWyU6Mmgf3LXkSvmsxLD?= =?us-ascii?Q?RrOhf54G1bLt8pEdwo0FbUSAvL22cE5AipLtrSnq0RBY58WoJTdXvWxa5jIf?= =?us-ascii?Q?dgDfaaABoUAB6YAO1UYfhLtxkLkt5u9hfRkKuljhpioqdkF2Iq2d5uZEU+ax?= =?us-ascii?Q?IB3FZzgPKvFHRthS0+MHE7eymR/ePYJaRhfjobtMcYfXTXc2C+EuO7LptlJB?= =?us-ascii?Q?af/5nx8ZEOggtz8MD9/3i1ef1bqDQK5l2Aa8++BH6K41WJWWzMln4kb7cYEb?= =?us-ascii?Q?oMOA8vufq8b9ppmhq5AohfD3G0LB4VeTz50PGKNW3vgi9sDL6wyLVE8eqYuO?= =?us-ascii?Q?v6JGwseLzU28hlBghV0pFmOIIQV5EvW1dz+U0jnoJcCkUHk4f+aHUDT0LfEy?= =?us-ascii?Q?uyxjze7WfBg08oJU0s6ALjTJAbWl31i4FsUDmBIrIUyur6vpAidg+vRvI71x?= =?us-ascii?Q?mHdC2h269KjLD9ledBeWv+jd/AWgsMFh1Jw/1DjNzdnGL82r8Hh5K5hR7Oj5?= =?us-ascii?Q?3lpbP6V5KYNlA1LnQUnqpxKZQCUme8ssHA42rITQbwv5LyolLW+zLxoI2lAV?= =?us-ascii?Q?hUQKyhWYrVP6y7BN7QiiLcgIVc1KkO3vCwmRQtHS65GVCAFwGxGwsJjS3mbo?= =?us-ascii?Q?ny2IkX0+XSd/gxDX3zG9cDaLwgmfxbUSdZT0KU04ZtdbPI6gLlRL?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3be48ee0-159a-4382-2ea2-08de9cc5a1f5 X-MS-Exchange-CrossTenant-AuthSource: CY8PR12MB8300.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Apr 2026 21:09:37.5201 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 9TV0Bi+ee/xAZAiV7ZIelQMjv09RIg7Ul8NeBwWcRnfll05I3RsgqzfHXKAsPVBpEFj71Wn00PhrGMAIQf0FzQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9562 On Fri, Apr 17, 2026 at 08:43:55PM +0100, David Laight wrote: > On Fri, 17 Apr 2026 13:36:12 -0400 > Yury Norov wrote: > > > The bitfields are designed in assumption that fields contain unsigned > > integer values, thus extracting the values from the field implies > > zero-extending. > > > > Some drivers need to sign-extend their fields, and currently do it like: > > > > dc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11); > > dc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11); > > > > It's error-prone because it relies on user to provide the correct > > index of the most significant bit and proper 32 vs 64 function flavor. > > > > Thus, introduce a FIELD_GET_SIGNED() macro, which is the more > > convenient and compiles (on x86_64) to just a couple instructions: > > shl and sar. > > > > Signed-off-by: Yury Norov > > --- > > include/linux/bitfield.h | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h > > index 54aeeef1f0ec..35ef63972810 100644 > > --- a/include/linux/bitfield.h > > +++ b/include/linux/bitfield.h > > @@ -178,6 +178,22 @@ > > __FIELD_GET(_mask, _reg, "FIELD_GET: "); \ > > }) > > > > +/** > > + * FIELD_GET_SIGNED() - extract a signed bitfield element > > + * @mask: shifted mask defining the field's length and position > > + * @reg: value of entire bitfield > > + * > > + * Returns the sign-extended field specified by @_mask from the > > + * bitfield passed in as @_reg by masking and shifting it down. > > + */ > > +#define FIELD_GET_SIGNED(mask, reg) \ > > + ({ \ > > + __BF_FIELD_CHECK(mask, reg, 0U, "FIELD_GET_SIGNED: "); \ > > + ((__signed_scalar_typeof(mask))((long long)(reg) << \ > > + __builtin_clzll(mask) >> (__builtin_clzll(mask) + \ > > + __builtin_ctzll(mask))));\ > > Have you looked at what that generates on a typical 32bit architecture? Yes, for arm32: #define FIELD_GET_SIGNED(mask, reg) \ ((long long)(reg) << \ __builtin_clzll(mask) >> (__builtin_clzll(mask) + \ __builtin_ctzll(mask))) long long foo(long long reg) { return FIELD_GET_SIGNED(0x00f00000ULL, reg); } generates: foo(long long): lsls r1, r0, #8 asrs r0, r1, #28 asrs r1, r1, #31 bx lr Just as good as x86_64. https://godbolt.org/z/eMnKrnocq > It really a bad idea to use __signed_scalar_typeof() on anything that isn't > a simple variable. > The bloat from all this when 'mask' is an expansion of GENMASK() is horrid. > Indeed both signed_scalar_typeof() and unsigned_scalar_typeof() should > really not be used - there are generally much better ways. David, it's not the first time you're throwing "bad idea, horrid bloat, really not be used"-like rant with absolutely no evidence that people do something wrong. Today I became another random victim of your style of communication, and I don't think there's any benefit to tolerate it for me or anybody else. I encourage you to change your attitude, and use professional and specific communication style in the kernel mailing list. Starting from now, I'm not a free tester for your ideas anymore. If you think that my patch is wrong, please prove it yourself. If you think that 32-bit or whatever code generation is bad - please send an example. If you believe that your implementation is any better - please bother yourself to convince me. I will continue receiving patches from you in my tree, but if your patch is claimed to improve code generation, performance of any sort, or similar things, and doesn't provide any numbers - I'll not waste my time on it. Thanks, Yury > In this case you can just write: > ({ > auto _mask = mask; > unsigned int __sl = __builtin_clzll(_mask); > unsigned int __sr = __sl + __builtin_ctzll(_mask); > __builtin_chose_expr(sizeof(_mask) <= 4, > (int)(reg) << __sl - 32 >> __sr - 32, > ((long long)(reg) << __sl >> __sr) > }) > and let the compiler do any more integer promotions (etc). > > I'm also not convinced that the checks __BF_FIELD_CHECK() does > on 'reg' are in any sense worth the effort. > > I have tried some simpler alternatives, eg: > !__builtin_constant_p(reg) && statically_true((reg & mask) == 0) > however that throws up some false positives due to some of weird ways > people have used FIELD_GET() where it is nothing like the simplest > (or most obvious) way to do things. > That might have been the code that split a 32bit value into bytes > in a printf with: > FIELD_GET(GENMASK(7, 0), val), FIELD_GET(GENMASK(15, 8), val), > FIELD_GET(GENMASK(23, 16), val), FIELD_GET(GENMASK(31, 24), val), > > David > > > + }) > > + > > /** > > * FIELD_MODIFY() - modify a bitfield element > > * @_mask: shifted mask defining the field's length and position