Re: [PATCH v2 2/2] iio: light: vcnl4000: add shared IRQ support

[Tsz Shan Chan <tsz.chan.dev@gmail.com>]

On Tue, Aug 25, 2026 at 11:48:55AM +0300, Andy Shevchenko wrote:
> On Tue, Aug 25, 2026 at 01:22:13PM +1000, Tsz Shan Chan wrote:
> > On Mon, Aug 24, 2026 at 11:24:26AM +0300, Andy Shevchenko wrote:
> > > On Sat, Aug 22, 2026 at 03:25:50AM +0100, Jonathan Cameron wrote:
> > > > On Fri, 14 Aug 2026 14:30:43 +1000
> > > > Tsz Shan Chan <tsz.chan.dev@gmail.com> wrote:
> > > 
> > > > > The INT output of vcnl4010/4020 and vcnl4040/4200 is open drain active
> > > > > low which can be shared with other devices.
> > > > > Add IRQF_SHARED and switch the trigger type from IRQF_TRIGGER_FALLING to
> > > > > IRQF_TRIGGER_LOW. Edge triggering can miss interrupts on a shared line.
> > > > Fairly low risk change but I guess we'll see.
> > > > 
> > > > It used to be annoyingly common for interrupt controllers to support
> > > > only edge based interrupts, but hopefully that silliness is a thing
> > > > of the past.
> > > > 
> > > > So crossed fingers, I'll apply this and see if we get anyone shouting.
> > > > I think we'll get away with it
> > > 
> > > In another thread somebody mentioned a type of the signal that HW generates.
> > > Having OD output doesn't prevent HW to behave like it does edge interrupts,
> > > id est generating a pulse instead of keeping the level until it gets acked.
> > > With that being said, I would ask the datasheet citation to clarify the case.
> > > 
> > 
> > vcnl4010/4020 datasheet, Page 11 Table 15 Notes:
> >   "Once an interrupt is generated the corresponding status bit goes to 1
> >   and stays there unless it is cleared by writing a 1 in the
> >   corresponding bit. The int pad will be pulled down while at least one
> >   of the status bit is 1."
> > 
> > vcnl4040/4200 datasheet, Page 13 Section Interrupt Flag:
> >   "INT_Flag represents all of the interrupt trigger statuses for ALS and
> >   PS. If any of these flags trigger from "0" to "1", the INT pin will be
> >   pulled low. Once the host reads INT_Flag register, all the flags are
> >   cleared (reset to "0"), and the INT pin is reset to high."
> > 
> > The interrupt is latched. The line stays low until the driver clears it.
> 
> Please, add the summary of these to the commit message.
> 
> -- 
> With Best Regards,
> Andy Shevchenko
> 
> 

Will update the commit message in v3.