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Thu, 30 Oct 2025 02:28:19 -0700 (PDT) Message-ID: Subject: Re: [PATCH v6 8/8] iio: adc: ad4030: Support common-mode channels with SPI offloading From: Nuno =?ISO-8859-1?Q?S=E1?= To: Marcelo Schmitt , Jonathan Cameron Cc: Marcelo Schmitt , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, michael.hennerich@analog.com, nuno.sa@analog.com, eblanc@baylibre.com, dlechner@baylibre.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net Date: Thu, 30 Oct 2025 09:28:54 +0000 In-Reply-To: References: <3fadbf22973098c4be9e5f0edd8c22b8b9b18ca6.1760984107.git.marcelo.schmitt@analog.com> <20251027140423.61d96e88@jic23-huawei> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.1 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2025-10-29 at 15:11 -0300, Marcelo Schmitt wrote: > On 10/27, Jonathan Cameron wrote: > > On Mon, 20 Oct 2025 16:15:39 -0300 > > Marcelo Schmitt wrote: > >=20 > > > AD4030 and similar devices can read common-mode voltage together with > > > ADC sample data. When enabled, common-mode voltage data is provided i= n a > > > separate IIO channel since it measures something other than the prima= ry > > > ADC input signal and requires separate scaling to convert to voltage > > > units. The initial SPI offload support patch for AD4030 only provided > > > differential channels. Now, extend the AD4030 driver to also provide > > > common-mode IIO channels when setup with SPI offloading capability. > > >=20 > > > Signed-off-by: Marcelo Schmitt > > > --- > > > New patch. > > > I hope this works for ADCs with two channels. It's not clear if works= as > > > expected with current HDL and single-channel ADCs (like ADAQ4216). > > >=20 > > > The ad4630_fmc HDL project was designed for ADCs with two channels an= d > > > always streams two data channels to DMA (even when the ADC has only o= ne > > > physical channel). Though, if the ADC has only one physical channel, = the > > > data that would come from the second ADC channel comes in as noise an= d > > > would have to be discarded. Because of that, when using single-channe= l > > > ADCs, the ADC driver would need to use a special DMA buffer to filter= out > > > half of the data that reaches DMA memory. With that, the ADC sample d= ata > > > could be delivered to user space without any noise being added to the= IIO > > > buffer. I have implemented a prototype of such specialized buffer > > > (industrialio-buffer-dmaengine-filtered), but it is awful and only wo= rked > > > with CONFIG_IIO_DMA_BUF_MMAP_LEGACY (only present in ADI Linux tree).= Usual > > > differential channel data is also affected by the extra 0xFFFFFFFF da= ta > > > pushed to DMA. Though, for the differential channel, it's easier to s= ee it > > > shall work for two-channel ADCs (the sine wave appears "filled" in > > > iio-oscilloscope). > > >=20 > > > So, I sign this, but don't guarantee it to work. > >=20 > > So what's the path to resolve this?=C2=A0 Waiting on HDL changes or not= support > > those devices until we have a clean solution? >=20 > Waiting for HDL to get updated I'd say. Agree. We kind of control the IP here so why should we do awful tricks in SW right :)? At the very least I would expect hdl to be capable to discard = the data in HW. >=20 > >=20 > > Also, just to check, is this only an issue with the additional stuff th= is > > patch adds or do we have a problem with SPI offload in general (+ this > > IP) and those single channel devices? >=20 > IMO, one solution would be to update the HDL project for AD4630 and simil= ar ADCs > to not send data from channel 2 to DMA memory when single-channel ADCs ar= e > connected. Another possibility would be to intercept and filter out the e= xtra > data before pushing it to user space. My first attempt of doing that didn= 't > work out with upstream kernel but I may revisit that. I'm also confused. Is this also an issue with the current series without co= mmon mode? If I'm getting things right, one channel ADCs pretty much do not work right= now with spi offload? If the above is correct I would just not support it for 1 channel ADCs. - Nuno S=C3=A1