linux-iio.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Cc: jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, agross@kernel.org, andersson@kernel.org,
	dmitry.baryshkov@linaro.org, konradybcio@kernel.org,
	daniel.lezcano@linaro.org, sboyd@kernel.org, amitk@kernel.org,
	thara.gopinath@gmail.com, lee@kernel.org, rafael@kernel.org,
	subbaraman.narayanamurthy@oss.qualcomm.com,
	david.collins@oss.qualcomm.com,
	anjelique.melendez@oss.qualcomm.com, quic_kamalw@quicinc.com,
	rui.zhang@intel.com, lukasz.luba@arm.com, lars@metafoo.de,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, cros-qcom-dts-watchers@chromium.org,
	quic_skakitap@quicinc.com, neil.armstrong@linaro.org
Subject: Re: [PATCH V5 3/5] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC
Date: Wed, 26 Feb 2025 10:42:40 +0100	[thread overview]
Message-ID: <e3713d6c-acf1-45eb-90a6-3a135a281562@kernel.org> (raw)
In-Reply-To: <b5707f37-cc5d-47fb-a8d6-a1da8a9a7ff1@oss.qualcomm.com>

On 26/02/2025 09:51, Jishnu Prakash wrote:
>>> +
>>> +  interrupts:
>>> +    items:
>>> +      - description: SDAM0 end of conversion (EOC) interrupt
>>> +      - description: SDAM1 EOC interrupt
>>> +    minItems: 1
>>
>> Same question.
> 
> To explain why "reg" and "interrupts" are flexible:
> 
> We need to add one item under each of these properties, per ADC SDAM. The number of PMIC SDAM peripherals allocated for ADC is not correlated with the PMIC used, 
> it is programmed in FW (PBS) and is fixed per SOC, based on the SOC requirements.
> 
> The number of ADC SDAMs used on a given SOC with a given PMIC (like PMK8550) will be fixed, but it is possible for
> the same PMIC to have 1 of its SDAMs allocated for ADC when used on one SOC and 2 SDAMs allocated for ADC when used on another SOC.  
> 
> All boards using a particular (SOC + PMIC) combination will have the same number of ADC SDAMs supported on that PMIC.

OK. Parts of above should be captured in commit msg or binding description.


Best regards,
Krzysztof

  reply	other threads:[~2025-02-26  9:42 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-31 18:32 [PATCH V5 0/5] Add support for QCOM SPMI PMIC5 Gen3 ADC Jishnu Prakash
2025-01-31 18:32 ` [PATCH V5 1/5] dt-bindings: iio/adc: Move QCOM ADC bindings to iio/adc folder Jishnu Prakash
2025-01-31 19:41   ` Rob Herring (Arm)
2025-02-02 13:29   ` Krzysztof Kozlowski
2025-02-26  8:51     ` Jishnu Prakash
2025-02-26  9:11       ` Krzysztof Kozlowski
2025-03-03 13:56         ` Jishnu Prakash
2025-03-10 14:19           ` Jishnu Prakash
2025-01-31 18:32 ` [PATCH V5 2/5] dt-bindings: iio: adc: Split out QCOM VADC channel properties Jishnu Prakash
2025-01-31 19:41   ` Rob Herring (Arm)
2025-02-02 13:32   ` Krzysztof Kozlowski
2025-01-31 18:32 ` [PATCH V5 3/5] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC Jishnu Prakash
2025-01-31 19:42   ` Rob Herring (Arm)
2025-02-01 11:33   ` Jonathan Cameron
2025-02-26  8:51     ` Jishnu Prakash
2025-02-02 13:38   ` Krzysztof Kozlowski
2025-02-26  8:51     ` Jishnu Prakash
2025-02-26  9:42       ` Krzysztof Kozlowski [this message]
2025-01-31 18:32 ` [PATCH V5 4/5] " Jishnu Prakash
2025-02-01 10:06   ` kernel test robot
2025-02-01 12:11   ` Jonathan Cameron
2025-02-26  8:52     ` Jishnu Prakash
2025-03-01  3:25       ` Jonathan Cameron
2025-03-03 13:56         ` Jishnu Prakash
2025-03-04  0:09           ` Jonathan Cameron
2025-02-01 23:36   ` kernel test robot
2025-01-31 18:32 ` [PATCH V5 5/5] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2025-02-01 12:27   ` Jonathan Cameron
2025-02-26  8:52     ` Jishnu Prakash
2025-03-01  3:29       ` Jonathan Cameron

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e3713d6c-acf1-45eb-90a6-3a135a281562@kernel.org \
    --to=krzk@kernel.org \
    --cc=agross@kernel.org \
    --cc=amitk@kernel.org \
    --cc=andersson@kernel.org \
    --cc=anjelique.melendez@oss.qualcomm.com \
    --cc=conor+dt@kernel.org \
    --cc=cros-qcom-dts-watchers@chromium.org \
    --cc=daniel.lezcano@linaro.org \
    --cc=david.collins@oss.qualcomm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=jic23@kernel.org \
    --cc=jishnu.prakash@oss.qualcomm.com \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=lars@metafoo.de \
    --cc=lee@kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-iio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=lukasz.luba@arm.com \
    --cc=neil.armstrong@linaro.org \
    --cc=quic_kamalw@quicinc.com \
    --cc=quic_skakitap@quicinc.com \
    --cc=rafael@kernel.org \
    --cc=robh@kernel.org \
    --cc=rui.zhang@intel.com \
    --cc=sboyd@kernel.org \
    --cc=subbaraman.narayanamurthy@oss.qualcomm.com \
    --cc=thara.gopinath@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).