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Mon, 07 Jul 2025 01:06:04 -0700 (PDT) Message-ID: Subject: Re: [PATCH v3] iio: adc: ad7173: fix num_slots From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Date: Mon, 07 Jul 2025 09:06:16 +0100 In-Reply-To: <20250706-iio-adc-ad7173-fix-num_slots-on-most-chips-v3-1-d1f5453198a7@baylibre.com> References: <20250706-iio-adc-ad7173-fix-num_slots-on-most-chips-v3-1-d1f5453198a7@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Sun, 2025-07-06 at 13:53 -0500, David Lechner wrote: > Fix the num_slots value for most chips in the ad7173 driver. The correct > value is the number of CHANNELx registers on the chip. >=20 > In commit 4310e15b3140 ("iio: adc: ad7173: don't make copy of > ad_sigma_delta_info struct"), we refactored struct ad_sigma_delta_info > to be static const data instead of being dynamically populated during > driver probe. However, there was an existing bug in commit 76a1e6a42802 > ("iio: adc: ad7173: add AD7173 driver") where num_slots was incorrectly > set to the number of CONFIGx registers instead of the number of > CHANNELx registers. This bug was partially propagated to the refactored > code in that the 16-channel chips were only given 8 slots instead of > 16 although we did managed to fix the 8-channel chips and one of the > 4-channel chips in that commit. However, we botched two of the 4-channel > chips and ended up incorrectly giving them 8 slots during the > refactoring. >=20 > This patch fixes that mistake on the 4-channel chips and also > corrects the 16-channel chips to have 16 slots. >=20 > Fixes: 4310e15b3140 ("iio: adc: ad7173: don't make copy of ad_sigma_delta= _info > struct") > Signed-off-by: David Lechner > --- Reviewed-by: Nuno S=C3=A1 > Here is the patch that actually compiles on the fixes-togreg branch. > --- > Changes in v3: > - Drop supports_spi_offload field. > - Link to v2: > https://lore.kernel.org/r/20250704-iio-adc-ad7173-fix-num_slots-on-most-c= hips-v2-1-a74941609143@baylibre.com >=20 > Changes in v2: > - Improve commit message. > - Link to v1: > https://lore.kernel.org/r/20250703-iio-adc-ad7173-fix-num_slots-on-most-c= hips-v1-1-326c5d113e15@baylibre.com > --- > =C2=A0drivers/iio/adc/ad7173.c | 36 ++++++++++++++++++++++++++---------- > =C2=A01 file changed, 26 insertions(+), 10 deletions(-) >=20 > diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c > index > 1966a9bc331401af118334a7be4c1a5b8d381473..c41bc5b9ac597f57eea6a097cc3a118= de7b4 > 2210 100644 > --- a/drivers/iio/adc/ad7173.c > +++ b/drivers/iio/adc/ad7173.c > @@ -772,10 +772,26 @@ static const struct ad_sigma_delta_info > ad7173_sigma_delta_info_8_slots =3D { > =C2=A0 .num_slots =3D 8, > =C2=A0}; > =C2=A0 > +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_16_slots= =3D { > + .set_channel =3D ad7173_set_channel, > + .append_status =3D ad7173_append_status, > + .disable_all =3D ad7173_disable_all, > + .disable_one =3D ad7173_disable_one, > + .set_mode =3D ad7173_set_mode, > + .has_registers =3D true, > + .has_named_irqs =3D true, > + .addr_shift =3D 0, > + .read_mask =3D BIT(6), > + .status_ch_mask =3D GENMASK(3, 0), > + .data_reg =3D AD7173_REG_DATA, > + .num_resetclks =3D 64, > + .num_slots =3D 16, > +}; > + > =C2=A0static const struct ad7173_device_info ad4111_device_info =3D { > =C2=A0 .name =3D "ad4111", > =C2=A0 .id =3D AD4111_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in_div =3D 8, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -797,7 +813,7 @@ static const struct ad7173_device_info ad4111_device_= info > =3D { > =C2=A0static const struct ad7173_device_info ad4112_device_info =3D { > =C2=A0 .name =3D "ad4112", > =C2=A0 .id =3D AD4112_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in_div =3D 8, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -818,7 +834,7 @@ static const struct ad7173_device_info ad4112_device_= info > =3D { > =C2=A0static const struct ad7173_device_info ad4113_device_info =3D { > =C2=A0 .name =3D "ad4113", > =C2=A0 .id =3D AD4113_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in_div =3D 8, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -837,7 +853,7 @@ static const struct ad7173_device_info ad4113_device_= info > =3D { > =C2=A0static const struct ad7173_device_info ad4114_device_info =3D { > =C2=A0 .name =3D "ad4114", > =C2=A0 .id =3D AD4114_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in_div =3D 16, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -856,7 +872,7 @@ static const struct ad7173_device_info ad4114_device_= info > =3D { > =C2=A0static const struct ad7173_device_info ad4115_device_info =3D { > =C2=A0 .name =3D "ad4115", > =C2=A0 .id =3D AD4115_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in_div =3D 16, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -875,7 +891,7 @@ static const struct ad7173_device_info ad4115_device_= info > =3D { > =C2=A0static const struct ad7173_device_info ad4116_device_info =3D { > =C2=A0 .name =3D "ad4116", > =C2=A0 .id =3D AD4116_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in_div =3D 11, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -894,7 +910,7 @@ static const struct ad7173_device_info ad4116_device_= info > =3D { > =C2=A0static const struct ad7173_device_info ad7172_2_device_info =3D { > =C2=A0 .name =3D "ad7172-2", > =C2=A0 .id =3D AD7172_2_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_4_slots, > =C2=A0 .num_voltage_in =3D 5, > =C2=A0 .num_channels =3D 4, > =C2=A0 .num_configs =3D 4, > @@ -927,7 +943,7 @@ static const struct ad7173_device_info > ad7172_4_device_info =3D { > =C2=A0static const struct ad7173_device_info ad7173_8_device_info =3D { > =C2=A0 .name =3D "ad7173-8", > =C2=A0 .id =3D AD7173_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in =3D 17, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, > @@ -944,7 +960,7 @@ static const struct ad7173_device_info > ad7173_8_device_info =3D { > =C2=A0static const struct ad7173_device_info ad7175_2_device_info =3D { > =C2=A0 .name =3D "ad7175-2", > =C2=A0 .id =3D AD7175_2_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_4_slots, > =C2=A0 .num_voltage_in =3D 5, > =C2=A0 .num_channels =3D 4, > =C2=A0 .num_configs =3D 4, > @@ -961,7 +977,7 @@ static const struct ad7173_device_info > ad7175_2_device_info =3D { > =C2=A0static const struct ad7173_device_info ad7175_8_device_info =3D { > =C2=A0 .name =3D "ad7175-8", > =C2=A0 .id =3D AD7175_8_ID, > - .sd_info =3D &ad7173_sigma_delta_info_8_slots, > + .sd_info =3D &ad7173_sigma_delta_info_16_slots, > =C2=A0 .num_voltage_in =3D 17, > =C2=A0 .num_channels =3D 16, > =C2=A0 .num_configs =3D 8, >=20 > --- > base-commit: 731bfc181896a4dfd20a8c219bef1c205dd1d708 > change-id: 20250703-iio-adc-ad7173-fix-num_slots-on-most-chips-b982206a20= b1 >=20 > Best regards,