* [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver
@ 2014-06-16 9:28 Denis Carikli
2014-06-16 9:28 ` [PATCH v3 2/6] input: touchscreen: imx25 tcq driver Denis Carikli
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
0 siblings, 2 replies; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 9:28 UTC (permalink / raw)
To: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann, Denis Carikli
From: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
This is the core driver for imx25 touchscreen/adc driver. The module
has one shared ADC and two different conversion queues which use the
ADC. The two queues are identical. Both can be used for general purpose
ADC but one is meant to be used for touchscreens.
This driver is the core which manages the central components and
registers of the TSC/ADC unit. It manages the IRQs and forwards them to
the correct components.
Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
---
Changelog v2->v3:
- None
---
.../devicetree/bindings/mfd/fsl-imx25-tsadc.txt | 46 ++++
drivers/mfd/Kconfig | 9 +
drivers/mfd/Makefile | 2 +
drivers/mfd/fsl-imx25-tsadc.c | 232 ++++++++++++++++++++
include/linux/mfd/imx25-tsadc.h | 138 ++++++++++++
5 files changed, 427 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
create mode 100644 include/linux/mfd/imx25-tsadc.h
diff --git a/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
new file mode 100644
index 0000000..a857af0e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
@@ -0,0 +1,46 @@
+Freescale mx25 ADC/TSC multifunction device
+
+This device combines two general purpose conversion queues one used for general
+ADC and the other used for touchscreens.
+
+Required properties:
+ - compatible: Should be "fsl,imx25-tsadc".
+ - reg: Memory range of the device.
+ - interrupts: Interrupt for this device as described in
+ interrupts/interrupts.txt
+ - clocks: An 'ipg' clock defined as described in clocks/clock.txt
+ - interrupt-controller: This device is an interrupt controller. It controls
+ the interrupts of both conversion queues.
+ - #interrupt-cells: Should be '<1>'.
+ - #address-cells: Should be '<1>'.
+ - #size-cells: Should be '<1>'.
+ - ranges
+
+This device includes two conversion queues which can be added as subnodes.
+The first queue is for the touchscreen, the second for general purpose ADC.
+
+Example:
+ tscadc: tscadc@50030000 {
+ compatible = "fsl,imx25-tsadc";
+ reg = <0x50030000 0xc>;
+ interrupts = <46>;
+ clocks = <&clks 119>;
+ clock-names = "ipg";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ tsc: tcq@50030400 {
+ compatible = "fsl,imx25-tcq";
+ reg = <0x50030400 0x60>;
+ ...
+ };
+
+ adc: gcq@50030800 {
+ compatible = "fsl,imx25-gcq";
+ reg = <0x50030800 0x60>;
+ ...
+ };
+ };
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index ee8204c..73f4e66 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -183,6 +183,15 @@ config MFD_DA9063
Additional drivers must be enabled in order to use the functionality
of the device.
+config MFD_MX25_TSADC
+ tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
+ depends on ARCH_MXC
+ select REGMAP_MMIO
+ help
+ Enable support for the integrated Touchscreen and ADC unit of the
+ i.MX25 processors. They consist of a conversion queue for general
+ purpose ADC and a queue for Touchscreens.
+
config MFD_MC13XXX
tristate
depends on (SPI_MASTER || I2C)
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 8afedba..7ff1013 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -78,6 +78,8 @@ obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o
obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o
obj-$(CONFIG_TWL6040_CORE) += twl6040.o
+obj-$(CONFIG_MFD_MX25_TSADC) += fsl-imx25-tsadc.o
+
obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o
obj-$(CONFIG_MFD_MC13XXX_I2C) += mc13xxx-i2c.o
diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
new file mode 100644
index 0000000..10332c2
--- /dev/null
+++ b/drivers/mfd/fsl-imx25-tsadc.c
@@ -0,0 +1,232 @@
+/*
+ * Copyright 2014 Markus Pargmann, Pengutronix <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqdesc.h>
+#include <linux/irqdomain.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/mfd/imx25-tsadc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+struct mx25_tsadc_priv {
+ struct regmap *regs;
+ struct irq_domain *domain;
+ struct clk *clk;
+};
+
+static struct regmap_config mx25_tsadc = {
+ .fast_io = true,
+ .max_register = 0x8,
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
+
+struct regmap *mx25_tsadc_get_regmap(struct device *dev)
+{
+ struct platform_device *pdev;
+ struct mx25_tsadc_priv *priv;
+
+ if (!dev)
+ return NULL;
+
+ pdev = container_of(dev, struct platform_device, dev);
+ priv = platform_get_drvdata(pdev);
+ if (IS_ERR_OR_NULL(priv->regs))
+ return NULL;
+
+ return priv->regs;
+}
+EXPORT_SYMBOL(mx25_tsadc_get_regmap);
+
+struct clk *mx25_tsadc_get_ipg(struct device *dev)
+{
+ struct platform_device *pdev;
+ struct mx25_tsadc_priv *priv;
+
+ if (!dev)
+ return NULL;
+
+ pdev = container_of(dev, struct platform_device, dev);
+ priv = platform_get_drvdata(pdev);
+ if (IS_ERR_OR_NULL(priv->clk))
+ return NULL;
+
+ return priv->clk;
+}
+EXPORT_SYMBOL(mx25_tsadc_get_ipg);
+
+static void mx25_tsadc_irq_handler(u32 irq, struct irq_desc *desc)
+{
+ struct mx25_tsadc_priv *priv = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_get_chip(irq);
+ u32 status;
+
+ chained_irq_enter(chip, desc);
+
+ regmap_read(priv->regs, MX25_TSC_TGSR, &status);
+
+ if (status & MX25_TGSR_GCQ_INT)
+ generic_handle_irq(irq_find_mapping(priv->domain, 1));
+
+ if (status & MX25_TGSR_TCQ_INT)
+ generic_handle_irq(irq_find_mapping(priv->domain, 0));
+
+ chained_irq_exit(chip, desc);
+}
+
+static void mx25_tsadc_nop(struct irq_data *d)
+{
+}
+
+static int mx25_tsadc_set_wake_nop(struct irq_data *d, unsigned int state)
+{
+ return 0;
+}
+
+static struct irq_chip mx25_tsadc_irq_chip = {
+ .name = "mx25-tsadc",
+ .irq_ack = mx25_tsadc_nop,
+ .irq_mask = mx25_tsadc_nop,
+ .irq_unmask = mx25_tsadc_nop,
+ .irq_set_wake = mx25_tsadc_set_wake_nop,
+};
+
+static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hwirq)
+{
+ struct mx25_tsadc_priv *priv = d->host_data;
+
+ irq_set_chip_data(irq, priv);
+ irq_set_chip_and_handler(irq, &mx25_tsadc_irq_chip,
+ handle_level_irq);
+
+
+ set_irq_flags(irq, IRQF_VALID);
+
+ return 0;
+}
+
+static struct irq_domain_ops mx25_tsadc_domain_ops = {
+ .map = mx25_tsadc_domain_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int mx25_tsadc_setup_irq(struct platform_device *pdev,
+ struct mx25_tsadc_priv *priv)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ int irq;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(dev, "Failed to get irq\n");
+ return irq;
+ }
+
+ priv->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
+ priv);
+ if (!priv->domain) {
+ dev_err(dev, "Failed to add irq domain\n");
+ return -ENOMEM;
+ }
+
+ irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
+ irq_set_handler_data(irq, priv);
+
+ return 0;
+}
+
+static int mx25_tsadc_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct mx25_tsadc_priv *priv;
+ struct resource *iores;
+ int ret;
+ void __iomem *iomem;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ iomem = devm_ioremap_resource(dev, iores);
+ if (IS_ERR(iomem)) {
+ dev_err(dev, "Failed to remap iomem\n");
+ return PTR_ERR(iomem);
+ }
+
+ priv->regs = regmap_init_mmio(dev, iomem, &mx25_tsadc);
+ if (IS_ERR(priv->regs)) {
+ dev_err(dev, "Failed to initialize regmap\n");
+ return PTR_ERR(priv->regs);
+ }
+
+ priv->clk = devm_clk_get(dev, "ipg");
+ if (IS_ERR(priv->clk)) {
+ dev_err(dev, "Failed to get ipg clock\n");
+ return PTR_ERR(priv->clk);
+ }
+
+ /* Enable clock and reset the component */
+ regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
+ MX25_TGCR_CLK_EN);
+ regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
+ MX25_TGCR_TSC_RST);
+
+ /* Setup powersaving mode, but enable internal reference voltage */
+ regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
+ MX25_TGCR_POWERMODE_SAVE);
+ regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
+ MX25_TGCR_INTREFEN);
+
+ ret = mx25_tsadc_setup_irq(pdev, priv);
+ if (ret) {
+ dev_err(dev, "Failed to setup irqs\n");
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, priv);
+
+ of_platform_populate(np, NULL, NULL, dev);
+
+ dev_info(dev, "i.MX25 Touchscreen and ADC core driver loaded\n");
+
+ return 0;
+}
+
+static const struct of_device_id mx25_tsadc_ids[] = {
+ { .compatible = "fsl,imx25-tsadc", },
+ { /* Sentinel */ }
+};
+
+static struct platform_driver mx25_tsadc_driver = {
+ .driver = {
+ .name = "mx25-tsadc",
+ .owner = THIS_MODULE,
+ .of_match_table = mx25_tsadc_ids,
+ },
+ .probe = mx25_tsadc_probe,
+};
+module_platform_driver(mx25_tsadc_driver);
+
+MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
+MODULE_AUTHOR("Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:mx25-tsadc");
diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
new file mode 100644
index 0000000..6fba341
--- /dev/null
+++ b/include/linux/mfd/imx25-tsadc.h
@@ -0,0 +1,138 @@
+#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
+#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
+
+struct regmap;
+struct device;
+struct clk;
+
+struct regmap *mx25_tsadc_get_regmap(struct device *dev);
+struct clk *mx25_tsadc_get_ipg(struct device *dev);
+
+#define MX25_TSC_TGCR 0x00
+#define MX25_TSC_TGSR 0x04
+#define MX25_TSC_TICR 0x08
+
+/* The same register layout for TC and GC queue */
+#define MX25_ADCQ_FIFO 0x00
+#define MX25_ADCQ_CR 0x04
+#define MX25_ADCQ_SR 0x08
+#define MX25_ADCQ_MR 0x0c
+#define MX25_ADCQ_ITEM_7_0 0x20
+#define MX25_ADCQ_ITEM_15_8 0x24
+#define MX25_ADCQ_CFG(n) (0x40 + ((n) * 0x4))
+
+/* Register values */
+/* Queue Config register */
+#define MX25_ADCQ_MR_MASK 0xffffffff
+
+/* TGCR */
+#define MX25_TGCR_PDBTIME(x) ((x) << 25)
+#define MX25_TGCR_PDBTIME_MASK MX25_TGCR_PDBTIME(0x7f)
+#define MX25_TGCR_PDBEN (1 << 24)
+#define MX25_TGCR_PDEN (1 << 23)
+#define MX25_TGCR_ADCCLKCFG(x) ((x) << 16)
+#define MX25_TGCR_GET_ADCCLK(x) (((x) >> 16) & 0x1f)
+#define MX25_TGCR_INTREFEN (1 << 10)
+#define MX25_TGCR_POWERMODE_MASK (3 << 8)
+#define MX25_TGCR_POWERMODE_SAVE (1 << 8)
+#define MX25_TGCR_POWERMODE_ON (2 << 8)
+#define MX25_TGCR_STLC (1 << 5)
+#define MX25_TGCR_SLPC (1 << 4)
+#define MX25_TGCR_FUNC_RST (1 << 2)
+#define MX25_TGCR_TSC_RST (1 << 1)
+#define MX25_TGCR_CLK_EN (1 << 0)
+
+/* TGSR */
+#define MX25_TGSR_SLP_INT (1 << 2)
+#define MX25_TGSR_GCQ_INT (1 << 1)
+#define MX25_TGSR_TCQ_INT (1 << 0)
+
+/* ADCQ_ITEM_* */
+#define _MX25_ADCQ_ITEM(item, x) ((x) << ((item) * 4))
+#define MX25_ADCQ_ITEM(item, x) ((item) >= 8 ? \
+ _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
+
+/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
+#define MX25_ADCQ_FIFO_DATA(x) (((x) >> 4) & 0xfff)
+#define MX25_ADCQ_FIFO_ID(x) ((x) & 0xf)
+
+/* ADCQ_CR (TCQR and GCQR) */
+#define MX25_ADCQ_CR_PDCFG_LEVEL (1 << 19)
+#define MX25_ADCQ_CR_PDMSK (1 << 18)
+#define MX25_ADCQ_CR_FRST (1 << 17)
+#define MX25_ADCQ_CR_QRST (1 << 16)
+#define MX25_ADCQ_CR_RWAIT_MASK (0xf << 12)
+#define MX25_ADCQ_CR_RWAIT(x) ((x) << 12)
+#define MX25_ADCQ_CR_WMRK_MASK (0xf << 8)
+#define MX25_ADCQ_CR_WMRK(x) ((x) << 8)
+#define MX25_ADCQ_CR_LITEMID_MASK (0xf << 4)
+#define MX25_ADCQ_CR_LITEMID(x) ((x) << 4)
+#define MX25_ADCQ_CR_RPT (1 << 3)
+#define MX25_ADCQ_CR_FQS (1 << 2)
+#define MX25_ADCQ_CR_QSM_MASK 0x3
+#define MX25_ADCQ_CR_QSM_PD 0x1
+#define MX25_ADCQ_CR_QSM_FQS 0x2
+#define MX25_ADCQ_CR_QSM_FQS_PD 0x3
+
+/* ADCQ_SR (TCQSR and GCQSR) */
+#define MX25_ADCQ_SR_FDRY (1 << 15)
+#define MX25_ADCQ_SR_FULL (1 << 14)
+#define MX25_ADCQ_SR_EMPT (1 << 13)
+#define MX25_ADCQ_SR_FDN(x) (((x) >> 8) & 0x1f)
+#define MX25_ADCQ_SR_FRR (1 << 6)
+#define MX25_ADCQ_SR_FUR (1 << 5)
+#define MX25_ADCQ_SR_FOR (1 << 4)
+#define MX25_ADCQ_SR_EOQ (1 << 1)
+#define MX25_ADCQ_SR_PD (1 << 0)
+
+/* ADCQ_MR (TCQMR and GCQMR) */
+#define MX25_ADCQ_MR_FDRY_DMA (1 << 31)
+#define MX25_ADCQ_MR_FER_DMA (1 << 22)
+#define MX25_ADCQ_MR_FUR_DMA (1 << 21)
+#define MX25_ADCQ_MR_FOR_DMA (1 << 20)
+#define MX25_ADCQ_MR_EOQ_DMA (1 << 17)
+#define MX25_ADCQ_MR_PD_DMA (1 << 16)
+#define MX25_ADCQ_MR_FDRY_IRQ (1 << 15)
+#define MX25_ADCQ_MR_FER_IRQ (1 << 6)
+#define MX25_ADCQ_MR_FUR_IRQ (1 << 5)
+#define MX25_ADCQ_MR_FOR_IRQ (1 << 4)
+#define MX25_ADCQ_MR_EOQ_IRQ (1 << 1)
+#define MX25_ADCQ_MR_PD_IRQ (1 << 0)
+
+/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
+#define MX25_ADCQ_CFG_SETTLING_TIME(x) ((x) << 24)
+#define MX25_ADCQ_CFG_IGS (1 << 20)
+#define MX25_ADCQ_CFG_NOS_MASK (0xf << 16)
+#define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16)
+#define MX25_ADCQ_CFG_WIPER (1 << 15)
+#define MX25_ADCQ_CFG_YNLR (1 << 14)
+#define MX25_ADCQ_CFG_YPLL_HIGH 0
+#define MX25_ADCQ_CFG_YPLL_OFF (1 << 12)
+#define MX25_ADCQ_CFG_YPLL_LOW (3 << 12)
+#define MX25_ADCQ_CFG_XNUR_HIGH 0
+#define MX25_ADCQ_CFG_XNUR_OFF (1 << 10)
+#define MX25_ADCQ_CFG_XNUR_LOW (3 << 10)
+#define MX25_ADCQ_CFG_XPUL_OFF (1 << 9)
+#define MX25_ADCQ_CFG_XPUL_HIGH 0
+#define MX25_ADCQ_CFG_REFP_YP 0
+#define MX25_ADCQ_CFG_REFP_XP (1 << 7)
+#define MX25_ADCQ_CFG_REFP_EXT (2 << 7)
+#define MX25_ADCQ_CFG_REFP_INT (3 << 7)
+#define MX25_ADCQ_CFG_REFP_MASK (3 << 7)
+#define MX25_ADCQ_CFG_IN_XP 0
+#define MX25_ADCQ_CFG_IN_YP (1 << 4)
+#define MX25_ADCQ_CFG_IN_XN (2 << 4)
+#define MX25_ADCQ_CFG_IN_YN (3 << 4)
+#define MX25_ADCQ_CFG_IN_WIPER (4 << 4)
+#define MX25_ADCQ_CFG_IN_AUX0 (5 << 4)
+#define MX25_ADCQ_CFG_IN_AUX1 (6 << 4)
+#define MX25_ADCQ_CFG_IN_AUX2 (7 << 4)
+#define MX25_ADCQ_CFG_REFN_XN 0
+#define MX25_ADCQ_CFG_REFN_YN (1 << 2)
+#define MX25_ADCQ_CFG_REFN_NGND (2 << 2)
+#define MX25_ADCQ_CFG_REFN_NGND2 (3 << 2)
+#define MX25_ADCQ_CFG_REFN_MASK (3 << 2)
+#define MX25_ADCQ_CFG_PENIACK (1 << 1)
+
+
+#endif /* _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_ */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 2/6] input: touchscreen: imx25 tcq driver
2014-06-16 9:28 [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver Denis Carikli
@ 2014-06-16 9:28 ` Denis Carikli
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
1 sibling, 0 replies; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 9:28 UTC (permalink / raw)
To: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer, linux-arm-kernel, Lee Jones,
linux-input, linux-iio, Lars-Peter Clausen, Markus Pargmann,
Denis Carikli
From: Markus Pargmann <mpa@pengutronix.de>
This is a driver for the imx25 ADC/TSC module. It controls the
touchscreen conversion queue and creates a touchscreen input device.
The driver currently only supports 4 wire touchscreens. The driver uses
a simple conversion queue of precharge, touch detection, X measurement,
Y measurement, precharge and another touch detection.
This driver uses the regmap from the parent to setup some touch specific
settings in the core driver and setup a idle configuration with touch
detection.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Denis Carikli <denis@eukrea.com>
---
Changelog v2->v3:
- Fixed the 'Senitel' typo.
- Fixed input_report_key to report 1 for BTN_TOUCH events.
- Removed useless explicit casts.
- Also disable clock when devm_request_threaded_irq failed.
---
.../bindings/input/touchscreen/fsl-mx25-tcq.txt | 29 +
drivers/input/touchscreen/Kconfig | 6 +
drivers/input/touchscreen/Makefile | 1 +
drivers/input/touchscreen/fsl-imx25-tcq.c | 575 ++++++++++++++++++++
4 files changed, 611 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
create mode 100644 drivers/input/touchscreen/fsl-imx25-tcq.c
diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
new file mode 100644
index 0000000..4214a99
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
@@ -0,0 +1,29 @@
+Freescale mx25 TS conversion queue module
+
+mx25 touchscreen conversion queue module which controls the ADC unit of the
+mx25 for attached touchscreens.
+
+Required properties:
+ - compatible: Should be "fsl,imx25-tcq".
+ - reg: Memory range of the device.
+ - interrupts: Should be the interrupt number associated with this module within
+ the tscadc unit (<0>).
+ - interrupt-parent: Should be a phandle to the tscadc unit.
+ - fsl,wires: Should be '<4>' or '<5>'
+
+Optional properties:
+ - fsl,pen-debounce: Pen debounce time.
+ - fsl,pen-threshold: Pen-down threshold for the touchscreen.
+ - fsl,settling-time: Settling time in nanoseconds.
+
+This device includes two conversion queues which can be added as subnodes.
+The first queue is for the touchscreen, the second for general purpose ADC.
+
+Example:
+ tsc: tcq@50030400 {
+ compatible = "fsl,imx25-tcq";
+ reg = <0x50030400 0x60>;
+ interrupt-parent = <&tscadc>;
+ interrupts = <0>;
+ fsl,wires = <4>;
+ };
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index a23a94b..a2290b9 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -699,6 +699,12 @@ config TOUCHSCREEN_USB_COMPOSITE
To compile this driver as a module, choose M here: the
module will be called usbtouchscreen.
+config TOUCHSCREEN_MX25
+ tristate "Freescale i.MX25 touchscreen input driver"
+ depends on MFD_MX25_TSADC
+ help
+ Enable support for touchscreen connected to your i.MX25.
+
config TOUCHSCREEN_MC13783
tristate "Freescale MC13783 touchscreen input driver"
depends on MFD_MC13XXX
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 126479d..537d591 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_TOUCHSCREEN_INEXIO) += inexio.o
obj-$(CONFIG_TOUCHSCREEN_INTEL_MID) += intel-mid-touch.o
obj-$(CONFIG_TOUCHSCREEN_LPC32XX) += lpc32xx_ts.o
obj-$(CONFIG_TOUCHSCREEN_MAX11801) += max11801_ts.o
+obj-$(CONFIG_TOUCHSCREEN_MX25) += fsl-imx25-tcq.o
obj-$(CONFIG_TOUCHSCREEN_MC13783) += mc13783_ts.o
obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o
obj-$(CONFIG_TOUCHSCREEN_MIGOR) += migor_ts.o
diff --git a/drivers/input/touchscreen/fsl-imx25-tcq.c b/drivers/input/touchscreen/fsl-imx25-tcq.c
new file mode 100644
index 0000000..8c5e2e7
--- /dev/null
+++ b/drivers/input/touchscreen/fsl-imx25-tcq.c
@@ -0,0 +1,575 @@
+/*
+ * Copyright 2014 Markus Pargmann, Pengutronix <mpa@pengutronix.de>
+ * Based on driver from 2011:
+ * Juergen Beisert, Pengutronix <kernel@pengutronix.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * This is the driver for the imx25 TCQ (Touchscreen Conversion Queue)
+ * connected to the imx25 ADC.
+ */
+
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/input.h>
+#include <linux/mfd/imx25-tsadc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+static const char mx25_tcq_name[] = "mx25-tcq";
+
+enum mx25_tcq_mode {
+ MX25_TS_4WIRE,
+};
+
+struct mx25_tcq_priv {
+ struct regmap *regs;
+ struct regmap *core_regs;
+ struct input_dev *idev;
+ enum mx25_tcq_mode mode;
+ unsigned int pen_threshold;
+ unsigned int sample_count;
+ unsigned int expected_samples;
+ unsigned int pen_debounce;
+ unsigned int settling_time;
+ struct clk *clk;
+};
+
+static struct regmap_config mx25_tcq_regconfig = {
+ .fast_io = true,
+ .max_register = 0x5c,
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
+
+static struct of_device_id mx25_tcq_ids[] = {
+ { .compatible = "fsl,imx25-tcq", },
+ { /* Sentinel */ }
+};
+
+#define TSC_4WIRE_PRE_INDEX 0
+#define TSC_4WIRE_X_INDEX 1
+#define TSC_4WIRE_Y_INDEX 2
+#define TSC_4WIRE_POST_INDEX 3
+#define TSC_4WIRE_LEAVE 4
+
+#define MX25_TSC_DEF_THRESHOLD 80
+#define TSC_MAX_SAMPLES 16
+
+
+enum mx25_adc_configurations {
+ MX25_CFG_PRECHARGE = 0,
+ MX25_CFG_TOUCH_DETECT,
+ MX25_CFG_X_MEASUREMENT,
+ MX25_CFG_Y_MEASUREMENT,
+};
+
+#define MX25_PRECHARGE_VALUE (\
+ MX25_ADCQ_CFG_YPLL_OFF | \
+ MX25_ADCQ_CFG_XNUR_OFF | \
+ MX25_ADCQ_CFG_XPUL_HIGH | \
+ MX25_ADCQ_CFG_REFP_INT | \
+ MX25_ADCQ_CFG_IN_XP | \
+ MX25_ADCQ_CFG_REFN_NGND2 | \
+ MX25_ADCQ_CFG_IGS)
+
+#define MX25_TOUCH_DETECT_VALUE (\
+ MX25_ADCQ_CFG_YNLR | \
+ MX25_ADCQ_CFG_YPLL_OFF | \
+ MX25_ADCQ_CFG_XNUR_OFF | \
+ MX25_ADCQ_CFG_XPUL_OFF | \
+ MX25_ADCQ_CFG_REFP_INT | \
+ MX25_ADCQ_CFG_IN_XP | \
+ MX25_ADCQ_CFG_REFN_NGND2 | \
+ MX25_ADCQ_CFG_PENIACK)
+
+static void imx25_setup_queue_cfgs(struct mx25_tcq_priv *priv,
+ unsigned int settling_time)
+{
+ u32 precharge_cfg =
+ MX25_PRECHARGE_VALUE |
+ MX25_ADCQ_CFG_SETTLING_TIME(settling_time);
+ u32 touch_detect_cfg =
+ MX25_TOUCH_DETECT_VALUE |
+ MX25_ADCQ_CFG_NOS(1) |
+ MX25_ADCQ_CFG_SETTLING_TIME(settling_time);
+
+ regmap_write(priv->core_regs, MX25_TSC_TICR, precharge_cfg);
+
+ /* PRECHARGE */
+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_PRECHARGE),
+ precharge_cfg);
+
+ /* TOUCH_DETECT */
+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_TOUCH_DETECT),
+ touch_detect_cfg);
+
+ /* X Measurement */
+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_X_MEASUREMENT),
+ MX25_ADCQ_CFG_YPLL_OFF |
+ MX25_ADCQ_CFG_XNUR_LOW |
+ MX25_ADCQ_CFG_XPUL_HIGH |
+ MX25_ADCQ_CFG_REFP_XP |
+ MX25_ADCQ_CFG_IN_YP |
+ MX25_ADCQ_CFG_REFN_XN |
+ MX25_ADCQ_CFG_NOS(priv->sample_count) |
+ MX25_ADCQ_CFG_SETTLING_TIME(settling_time));
+
+ /* Y Measurement */
+ regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_Y_MEASUREMENT),
+ MX25_ADCQ_CFG_YNLR |
+ MX25_ADCQ_CFG_YPLL_HIGH |
+ MX25_ADCQ_CFG_XNUR_OFF |
+ MX25_ADCQ_CFG_XPUL_OFF |
+ MX25_ADCQ_CFG_REFP_YP |
+ MX25_ADCQ_CFG_IN_XP |
+ MX25_ADCQ_CFG_REFN_YN |
+ MX25_ADCQ_CFG_NOS(priv->sample_count) |
+ MX25_ADCQ_CFG_SETTLING_TIME(settling_time));
+
+ /* Enable the touch detection right now */
+ regmap_write(priv->core_regs, MX25_TSC_TICR, touch_detect_cfg |
+ MX25_ADCQ_CFG_IGS);
+}
+
+static int imx25_setup_queue_4wire(struct mx25_tcq_priv *priv,
+ unsigned settling_time, int *items)
+{
+ imx25_setup_queue_cfgs(priv, settling_time);
+
+ /* Setup the conversion queue */
+ regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
+ MX25_ADCQ_ITEM(0, MX25_CFG_PRECHARGE) |
+ MX25_ADCQ_ITEM(1, MX25_CFG_TOUCH_DETECT) |
+ MX25_ADCQ_ITEM(2, MX25_CFG_X_MEASUREMENT) |
+ MX25_ADCQ_ITEM(3, MX25_CFG_Y_MEASUREMENT) |
+ MX25_ADCQ_ITEM(4, MX25_CFG_PRECHARGE) |
+ MX25_ADCQ_ITEM(5, MX25_CFG_TOUCH_DETECT));
+
+ /* We measure X/Y with 'sample_count' number of samples and execute a
+ * touch detection twice, with 1 sample each */
+ priv->expected_samples = priv->sample_count * 2 + 2;
+ *items = 6;
+
+ return 0;
+}
+
+static void mx25_tcq_disable_touch_irq(struct mx25_tcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK,
+ MX25_ADCQ_CR_PDMSK);
+}
+
+static void mx25_tcq_enable_touch_irq(struct mx25_tcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK, 0);
+}
+
+static void mx25_tcq_disable_fifo_irq(struct mx25_tcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ,
+ MX25_ADCQ_MR_FDRY_IRQ);
+}
+
+static void mx25_tcq_enable_fifo_irq(struct mx25_tcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ, 0);
+}
+
+static void mx25_tcq_force_queue_start(struct mx25_tcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
+ MX25_ADCQ_CR_FQS);
+
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
+}
+
+static void mx25_tcq_force_queue_stop(struct mx25_tcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
+}
+
+static void mx25_tcq_fifo_reset(struct mx25_tcq_priv *priv)
+{
+ u32 tcqcr;
+
+ regmap_read(priv->regs, MX25_ADCQ_CR, &tcqcr);
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST,
+ MX25_ADCQ_CR_FRST);
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST,
+ 0);
+ regmap_write(priv->regs, MX25_ADCQ_CR, tcqcr);
+}
+
+static void mx25_tcq_re_enable_touch_detection(struct mx25_tcq_priv *priv)
+{
+ /* stop the queue from looping */
+ mx25_tcq_force_queue_stop(priv);
+
+ /* for a clean touch detection, preload the X plane */
+ regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_PRECHARGE_VALUE);
+
+ /* waste some time now to pre-load the X plate to high voltage */
+ mx25_tcq_fifo_reset(priv);
+
+ /* re-enable the detection right now */
+ regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_TOUCH_DETECT_VALUE |
+ MX25_ADCQ_CFG_IGS);
+
+ regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_PD,
+ MX25_ADCQ_SR_PD);
+
+ /* enable the pen down event to be a source for the interrupt */
+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_PD_IRQ, 0);
+
+ /* lets fire the next IRQ if someone touches the touchscreen */
+ mx25_tcq_enable_touch_irq(priv);
+}
+
+static int mx25_tcq_create_event_for_4wire(struct mx25_tcq_priv *priv,
+ u32 *sample_buf, int samples)
+{
+ unsigned int x_pos = 0;
+ unsigned int y_pos = 0;
+ unsigned int touch_pre = 0;
+ unsigned int touch_post = 0;
+ unsigned i;
+ int ret = 0;
+
+ for (i = 0; i < samples; i++) {
+ unsigned int index = MX25_ADCQ_FIFO_ID(sample_buf[i]);
+ unsigned int val = MX25_ADCQ_FIFO_DATA(sample_buf[i]);
+
+ switch (index) {
+ case 1:
+ touch_pre = val;
+ break;
+ case 2:
+ x_pos = val;
+ break;
+ case 3:
+ y_pos = val;
+ break;
+ case 5:
+ touch_post = val;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ }
+
+ if (ret == 0 && samples != 0) {
+ /*
+ * only if both touch measures are below a treshold,
+ * the position is valid
+ */
+ if (touch_pre < priv->pen_threshold &&
+ touch_post < priv->pen_threshold) {
+ /* valid samples, generate a report */
+ x_pos /= priv->sample_count;
+ y_pos /= priv->sample_count;
+ input_report_abs(priv->idev, ABS_X, x_pos);
+ input_report_abs(priv->idev, ABS_Y, y_pos);
+ input_report_key(priv->idev, BTN_TOUCH, 1);
+ input_sync(priv->idev);
+
+ /* get next sample */
+ mx25_tcq_force_queue_start(priv);
+ mx25_tcq_enable_fifo_irq(priv);
+ } else if (touch_pre >= priv->pen_threshold &&
+ touch_post >= priv->pen_threshold) {
+ /*
+ * if both samples are invalid,
+ * generate a release report
+ */
+ input_report_key(priv->idev, BTN_TOUCH, 0);
+ input_sync(priv->idev);
+ mx25_tcq_re_enable_touch_detection(priv);
+ } else {
+ /*
+ * if only one of both touch measurements are
+ * below the threshold, still some bouncing
+ * happens. Take additional samples in this
+ * case to be sure
+ */
+ mx25_tcq_force_queue_start(priv);
+ mx25_tcq_enable_fifo_irq(priv);
+ }
+ }
+
+ return ret;
+}
+
+static irqreturn_t mx25_tcq_irq_thread(int irq, void *dev_id)
+{
+ struct mx25_tcq_priv *priv = dev_id;
+ u32 sample_buf[TSC_MAX_SAMPLES];
+ int samples = 0;
+
+ /* read all samples */
+ while (1) {
+ u32 stats;
+
+ regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
+ if (stats & MX25_ADCQ_SR_EMPT)
+ break;
+
+ if (samples < TSC_MAX_SAMPLES) {
+ regmap_read(priv->regs, MX25_ADCQ_FIFO,
+ &sample_buf[samples]);
+ ++samples;
+ } else {
+ u32 discarded;
+ /* discard samples */
+ regmap_read(priv->regs, MX25_ADCQ_FIFO, &discarded);
+ }
+ }
+
+ mx25_tcq_create_event_for_4wire(priv, sample_buf, samples);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t mx25_tcq_irq(int irq, void *dev_id)
+{
+ struct mx25_tcq_priv *priv = dev_id;
+ u32 stat;
+ int ret = IRQ_HANDLED;
+
+ regmap_read(priv->regs, MX25_ADCQ_SR, &stat);
+
+ if (stat & (MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR))
+ mx25_tcq_fifo_reset(priv);
+
+ if (stat & MX25_ADCQ_SR_PD) {
+ mx25_tcq_disable_touch_irq(priv);
+ mx25_tcq_force_queue_start(priv);
+ mx25_tcq_enable_fifo_irq(priv);
+ }
+
+ if (stat & MX25_ADCQ_SR_FDRY) {
+ mx25_tcq_disable_fifo_irq(priv);
+ ret = IRQ_WAKE_THREAD;
+ }
+
+ regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
+ MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_PD |
+ MX25_ADCQ_SR_EOQ,
+ MX25_ADCQ_SR_FRR |
+ MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_PD |
+ MX25_ADCQ_SR_EOQ);
+
+ return ret;
+}
+
+/* configure the statemachine for a 4-wire touchscreen */
+static int mx25_tcq_init(struct mx25_tcq_priv *priv)
+{
+ u32 tgcr;
+ unsigned int ipg_div;
+ unsigned int adc_period;
+ unsigned int debounce_cnt;
+ unsigned int settling_time;
+ int itemct;
+ int ret;
+
+ regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr);
+ ipg_div = max_t(unsigned int, 4, MX25_TGCR_GET_ADCCLK(tgcr));
+ adc_period = clk_get_rate(priv->clk) / (ipg_div * 2 + 2);
+ debounce_cnt = DIV_ROUND_UP(priv->pen_debounce, adc_period * 8) - 1;
+ settling_time = DIV_ROUND_UP(priv->settling_time, adc_period);
+
+
+ /* Reset */
+ regmap_write(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QRST |
+ MX25_ADCQ_CR_FRST);
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QRST |
+ MX25_ADCQ_CR_FRST, 0);
+
+ /* up to 128 * 8 ADC clocks are possible */
+ if (debounce_cnt > 127)
+ debounce_cnt = 127;
+
+ ret = imx25_setup_queue_4wire(priv, 0x0, &itemct);
+ if (ret)
+ return ret;
+
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_LITEMID_MASK |
+ MX25_ADCQ_CR_WMRK_MASK,
+ MX25_ADCQ_CR_LITEMID(itemct - 1) |
+ MX25_ADCQ_CR_WMRK(priv->expected_samples - 1));
+
+ /* setup debounce count */
+ regmap_update_bits(priv->core_regs, MX25_TSC_TGCR,
+ MX25_TGCR_PDBTIME_MASK,
+ MX25_TGCR_PDBTIME(debounce_cnt));
+
+ /* enable debounce */
+ regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDBEN,
+ MX25_TGCR_PDBEN);
+ regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDEN,
+ MX25_TGCR_PDEN);
+
+ /* enable the engine on demand */
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QSM_FQS,
+ MX25_ADCQ_CR_QSM_FQS);
+
+ mx25_tcq_re_enable_touch_detection(priv);
+
+ return 0;
+}
+
+static int mx25_tcq_parse_dt(struct platform_device *pdev,
+ struct mx25_tcq_priv *priv)
+{
+ struct device_node *np = pdev->dev.of_node;
+ u32 wires;
+ int ret;
+
+ /* Setup defaults */
+ priv->pen_threshold = 500;
+ priv->sample_count = 3;
+ priv->pen_debounce = 1000000;
+ priv->settling_time = 250000;
+
+ ret = of_property_read_u32(np, "fsl,wires", &wires);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to find fsl,wires properties\n");
+ return ret;
+ }
+
+ if (wires == 4) {
+ priv->mode = MX25_TS_4WIRE;
+ } else {
+ dev_err(&pdev->dev, "%u-wire mode not supported\n", wires);
+ return -EINVAL;
+ }
+
+ /* These are optional, we don't care about the return values */
+ of_property_read_u32(np, "fsl,pen-threshold", &priv->pen_threshold);
+ of_property_read_u32(np, "fsl,settling-time", &priv->settling_time);
+ of_property_read_u32(np, "fsl,pen-debounce", &priv->pen_debounce);
+
+ return 0;
+}
+
+static int mx25_tcq_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct input_dev *idev;
+ struct mx25_tcq_priv *priv;
+ struct resource *res;
+ void __iomem *mem;
+ int ret;
+ int irq;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mem = devm_ioremap_resource(dev, res);
+ if (!mem)
+ return -ENOMEM;
+
+ ret = mx25_tcq_parse_dt(pdev, priv);
+ if (ret)
+ return ret;
+
+ priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_tcq_regconfig);
+ if (IS_ERR(priv->regs)) {
+ dev_err(dev, "Failed to initialize regmap\n");
+ return PTR_ERR(priv->regs);
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq <= 0) {
+ dev_err(dev, "Failed to get IRQ\n");
+ return irq;
+ }
+
+ idev = devm_input_allocate_device(dev);
+ if (!idev) {
+ dev_err(dev, "Failed to allocate input device\n");
+ return -ENOMEM;
+ }
+
+ idev->name = mx25_tcq_name;
+ idev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+ idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+ input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0);
+ input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0);
+
+ idev->id.bustype = BUS_HOST;
+
+ ret = input_register_device(idev);
+ if (ret) {
+ dev_err(dev, "Failed to register input device\n");
+ return ret;
+ }
+
+ priv->idev = idev;
+
+ priv->core_regs = mx25_tsadc_get_regmap(pdev->dev.parent);
+ priv->clk = mx25_tsadc_get_ipg(pdev->dev.parent);
+
+ ret = clk_prepare_enable(priv->clk);
+ if (ret) {
+ dev_err(dev, "Failed to enable ipg clock\n");
+ return ret;
+ }
+
+ ret = devm_request_threaded_irq(dev, irq, mx25_tcq_irq,
+ mx25_tcq_irq_thread, IRQF_ONESHOT, pdev->name, priv);
+ if (ret) {
+ dev_err(dev, "Failed requesting IRQ\n");
+ goto error_tcq_init;
+ }
+
+ ret = mx25_tcq_init(priv);
+ if (ret) {
+ dev_err(dev, "Failed to init tcq\n");
+ goto error_tcq_init;
+ }
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+
+error_tcq_init:
+ clk_disable_unprepare(priv->clk);
+ return ret;
+}
+
+static int mx25_tcq_remove(struct platform_device *pdev)
+{
+ struct mx25_tcq_priv *priv = platform_get_drvdata(pdev);
+
+ clk_disable_unprepare(priv->clk);
+
+ return 0;
+}
+
+static struct platform_driver mx25_tcq_driver = {
+ .driver = {
+ .name = "mx25-tcq",
+ .owner = THIS_MODULE,
+ .of_match_table = mx25_tcq_ids,
+ },
+ .probe = mx25_tcq_probe,
+ .remove = mx25_tcq_remove,
+};
+module_platform_driver(mx25_tcq_driver);
+
+MODULE_DESCRIPTION("TS input driver for Freescale mx25");
+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
+MODULE_LICENSE("GPL v2");
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
@ 2014-06-16 9:28 ` Denis Carikli
[not found] ` <1402910933-20534-3-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
2014-06-16 9:28 ` [PATCH v3 4/6] ARM: dts: imx25: Add TSC and ADC support Denis Carikli
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 9:28 UTC (permalink / raw)
To: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann, Denis Carikli
From: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
This is a conversion queue driver for the mx25 SoC. It uses the central
ADC which is used by two seperate independent queues. This driver
prepares different conversion configurations for each possible input.
For a conversion it creates a conversionqueue of one item with the
correct configuration for the chosen channel. It then executes the queue
once and disables the conversion queue afterwards.
The reference voltages are configurable through devicetree subnodes,
depending on the connections of the ADC inputs.
Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
---
Changelog v2->v3:
- Fixed compilation: I forgott to tell that this IIO patch was untested
in the previous cover letter. Now it is tested at runtime:
I left the touchscreen connected but I configured the TSC as an ADC
instead, set the refp to internal reference, and the refn to ngnd_adc(3)
for the first 4 channels(xp,yp,xn,yn) and observed the values changing
while touching the resistive 4-wire touchscreen.
- MX25_IIO_CHAN now became MX25_GCQ_CHAN and its .address is now gone
and the code using it adapted.
- The instances of struct iio_dev were renamed from idev to indio_dev.
- regmap_read return value is now checked in mx25_gcq_read_raw.
- Comparisons with MX25_NUM_CFGS are now fixed
- Cosmetics fix in a multiline comment.
---
.../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt | 54 ++++
drivers/iio/adc/Kconfig | 7 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/fsl-imx25-gcq.c | 342 ++++++++++++++++++++
4 files changed, 404 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
new file mode 100644
index 0000000..333fc55
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
@@ -0,0 +1,54 @@
+Freescale i.MX25 ADC GCQ device
+
+This is a generic conversion queue device that can convert any of the analog
+inputs using the ADC unit of the i.MX25.
+
+Required properties:
+ - compatible: Should be "fsl,imx25-gcq".
+ - reg: Should be the register range of the module.
+ - interrupts: Should be the interrupt number of the module. Typically this is <1>.
+ - interrupt-parent: phandle to the tsadc module of the i.MX25.
+ - #address-cells: Should be <1> (setting for the subnodes)
+ - #size-cells: Should be <0> (setting for the subnodes)
+
+Optionally you can define subnodes which define the positive and negative
+reference voltage for one of the analog inputs.
+
+Required properties for subnodes:
+ - reg: Should be the number of the analog input.
+ 0: xp
+ 1: yp
+ 2: xn
+ 3: yn
+ 4: wiper
+ 5: inaux0
+ 6: inaux1
+ 7: inaux2
+ - fsl,adc-refp: Positive reference input
+ 0: yp
+ 1: xp
+ 2: External reference
+ 3: Internal reference
+ - fsl,adc-refn: Negative reference input
+ 0: xn
+ 1: yn
+ 2: ngnd_adc
+ 3: ngnd_adc
+
+
+Example:
+
+ adc: adc@50030800 {
+ compatible = "fsl,imx25-gcq";
+ reg = <0x50030800 0x60>;
+ interrupt-parent = <&tscadc>;
+ interrupts = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ inaux@5 {
+ reg = <5>;
+ fsl,adc-refp = <3>;
+ fsl,adc-refn = <3>;
+ };
+ };
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index a80d236..58efb8d 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -125,6 +125,13 @@ config EXYNOS_ADC
of SoCs for drivers such as the touchscreen and hwmon to use to share
this resource.
+config FSL_MX25_ADC
+ tristate "Freescale MX25 ADC driver"
+ depends on MFD_MX25_TSADC
+ help
+ Generic Conversion Queue driver used for general purpose ADC in the
+ MX25. This driver supports single measurements using the MX25 ADC.
+
config LP8788_ADC
tristate "LP8788 ADC driver"
depends on MFD_LP8788
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 9d60f2d..2767fd6 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_AD7887) += ad7887.o
obj-$(CONFIG_AD799X) += ad799x.o
obj-$(CONFIG_AT91_ADC) += at91_adc.o
obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
+obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
obj-$(CONFIG_MAX1363) += max1363.o
obj-$(CONFIG_MCP320X) += mcp320x.o
diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
new file mode 100644
index 0000000..685cac5
--- /dev/null
+++ b/drivers/iio/adc/fsl-imx25-gcq.c
@@ -0,0 +1,342 @@
+/*
+ * Copyright 2014 Markus Pargmann, Pengutronix <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * This is the driver for the imx25 GCQ (Generic Conversion Queue)
+ * connected to the imx25 ADC.
+ */
+
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/iio/iio.h>
+#include <linux/mfd/imx25-tsadc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
+
+enum mx25_gcq_cfgs {
+ MX25_CFG_XP = 0,
+ MX25_CFG_YP,
+ MX25_CFG_XN,
+ MX25_CFG_YN,
+ MX25_CFG_WIPER,
+ MX25_CFG_INAUX0,
+ MX25_CFG_INAUX1,
+ MX25_CFG_INAUX2,
+ MX25_NUM_CFGS,
+};
+
+struct mx25_gcq_priv {
+ struct regmap *regs;
+ struct completion completed;
+ unsigned int settling_time;
+ struct clk *clk;
+ int irq;
+};
+
+#define MX25_CQG_CHAN(chan, id) {\
+ .type = IIO_VOLTAGE,\
+ .indexed = 1,\
+ .channel = chan,\
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
+ .datasheet_name = id, \
+ }
+
+static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
+ MX25_CQG_CHAN(0, "xp"),
+ MX25_CQG_CHAN(1, "yp"),
+ MX25_CQG_CHAN(2, "xn"),
+ MX25_CQG_CHAN(3, "yn"),
+ MX25_CQG_CHAN(4, "wiper"),
+ MX25_CQG_CHAN(5, "inaux0"),
+ MX25_CQG_CHAN(6, "inaux1"),
+ MX25_CQG_CHAN(7, "inaux2"),
+};
+
+static void mx25_gcq_disable_eoq(struct mx25_gcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ,
+ MX25_ADCQ_MR_EOQ_IRQ);
+}
+
+static void mx25_gcq_enable_eoq(struct mx25_gcq_priv *priv)
+{
+ regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
+}
+
+static irqreturn_t mx25_gcq_irq(int irq, void *data)
+{
+ struct mx25_gcq_priv *priv = data;
+ u32 stats;
+
+ regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
+
+ if (stats & MX25_ADCQ_SR_EOQ) {
+ mx25_gcq_disable_eoq(priv);
+ complete(&priv->completed);
+ }
+
+ /* Disable conversion queue run */
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
+
+ /* Acknowledge all possible irqs */
+ regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
+ MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_EOQ |
+ MX25_ADCQ_SR_PD);
+
+ return IRQ_HANDLED;
+}
+
+static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
+ struct iio_chan_spec const *chan, int *val, int *val2,
+ long mask)
+{
+ struct mx25_gcq_priv *priv = iio_priv(indio_dev);
+ long timeout;
+ u32 data;
+ int ret;
+
+ if (mask != IIO_CHAN_INFO_RAW)
+ return -EINVAL;
+
+ mutex_lock(&indio_dev->mlock);
+
+ /* Setup the configuration we want to use */
+ regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
+ MX25_ADCQ_ITEM(0, chan->channel));
+
+ mx25_gcq_enable_eoq(priv);
+
+ /* Trigger queue for one run */
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
+ MX25_ADCQ_CR_FQS);
+
+ timeout = wait_for_completion_interruptible_timeout(&priv->completed,
+ MX25_GCQ_TIMEOUT);
+ if (timeout < 0) {
+ dev_err(&indio_dev->dev, "ADC wait for measurement failed\n");
+ ret = timeout;
+ goto out;
+ } else if (timeout == 0) {
+ dev_err(&indio_dev->dev, "ADC timed out\n");
+ ret = -ETIMEDOUT;
+ goto out;
+ }
+
+ ret = regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
+ if (ret)
+ return ret;
+
+ *val = MX25_ADCQ_FIFO_DATA(data);
+
+ ret = IIO_VAL_INT;
+
+out:
+ mutex_unlock(&indio_dev->mlock);
+
+ return ret;
+}
+
+static const struct iio_info mx25_gcq_iio_info = {
+ .read_raw = mx25_gcq_read_raw,
+};
+
+static const struct regmap_config mx25_gcq_regconfig = {
+ .max_register = 0x5c,
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+};
+
+static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
+ struct mx25_gcq_priv *priv)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct device_node *child;
+ struct device *dev = &pdev->dev;
+ int ret;
+ int i;
+
+ /* Setup all configurations registers with a default conversion
+ * configuration for each input
+ */
+ for (i = 0; i < MX25_NUM_CFGS; ++i)
+ regmap_write(priv->regs, MX25_ADCQ_CFG(i),
+ MX25_ADCQ_CFG_YPLL_OFF |
+ MX25_ADCQ_CFG_XNUR_OFF |
+ MX25_ADCQ_CFG_XPUL_OFF |
+ MX25_ADCQ_CFG_REFP_INT |
+ (i << 4) |
+ MX25_ADCQ_CFG_REFN_NGND2);
+
+ for_each_child_of_node(np, child) {
+ u32 reg;
+ u32 refn;
+ u32 refp;
+
+ ret = of_property_read_u32(child, "reg", ®);
+ if (ret) {
+ dev_err(dev, "Failed to get reg property\n");
+ return ret;
+ }
+
+ if (reg >= MX25_NUM_CFGS) {
+ dev_err(dev, "reg value is greater than the number of available configuration registers\n");
+ return -EINVAL;
+ }
+
+ ret = of_property_read_u32(child, "fsl,adc-refn", &refn);
+ if (ret) {
+ dev_err(dev, "Failed to get fsl,adc-refn property\n");
+ return ret;
+ }
+ if (refn < 0 || refn > 3) {
+ dev_err(dev, "Invalid fsl,adc-refn property value %d\n",
+ refn);
+ return -EINVAL;
+ }
+
+ ret = of_property_read_u32(child, "fsl,adc-refp", &refp);
+ if (ret) {
+ dev_err(dev, "Failed to get fsl,adc-refp property\n");
+ return ret;
+ }
+ if (refp < 0 || refp > 3) {
+ dev_err(dev, "Invalid fsl,adc-refp property value %d\n",
+ refp);
+ return -EINVAL;
+ }
+
+ regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
+ MX25_ADCQ_CFG_REFP_MASK |
+ MX25_ADCQ_CFG_REFN_MASK,
+ (refp << 7) | (refn << 2));
+ }
+ regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+ MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
+ MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
+
+ regmap_write(priv->regs, MX25_ADCQ_CR,
+ MX25_ADCQ_CR_PDMSK |
+ MX25_ADCQ_CR_QSM_FQS);
+
+ return 0;
+}
+
+static int mx25_gcq_probe(struct platform_device *pdev)
+{
+ struct iio_dev *indio_dev;
+ struct mx25_gcq_priv *priv;
+ struct resource *res;
+ struct device *dev = &pdev->dev;
+ int ret;
+ void __iomem *mem;
+
+ indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ priv = iio_priv(indio_dev);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mem = devm_ioremap_resource(dev, res);
+ if (!mem)
+ return -ENOMEM;
+
+ priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
+ if (IS_ERR(priv->regs)) {
+ dev_err(dev, "Failed to initialize regmap\n");
+ return PTR_ERR(priv->regs);
+ }
+
+ init_completion(&priv->completed);
+
+ ret = mx25_gcq_setup_cfgs(pdev, priv);
+ if (ret)
+ goto err_irq_free;
+
+ priv->clk = mx25_tsadc_get_ipg(pdev->dev.parent);
+ ret = clk_prepare_enable(priv->clk);
+ if (ret) {
+ dev_err(dev, "Failed to enable clock\n");
+ return ret;
+ }
+
+ priv->irq = platform_get_irq(pdev, 0);
+ if (priv->irq <= 0) {
+ dev_err(dev, "Failed to get IRQ\n");
+ ret = priv->irq;
+ goto err_clk_unprepare;
+ }
+
+ ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name,
+ priv);
+ if (ret) {
+ dev_err(dev, "Failed requesting IRQ\n");
+ goto err_clk_unprepare;
+ }
+
+ indio_dev->dev.parent = &pdev->dev;
+ indio_dev->channels = mx25_gcq_channels;
+ indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
+ indio_dev->info = &mx25_gcq_iio_info;
+
+ ret = iio_device_register(indio_dev);
+ if (ret) {
+ dev_err(dev, "Failed to register iio device\n");
+ goto err_irq_free;
+ }
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+
+err_irq_free:
+ free_irq(priv->irq, (void *)priv);
+
+err_clk_unprepare:
+ clk_disable_unprepare(priv->clk);
+
+ return ret;
+}
+
+static int mx25_gcq_remove(struct platform_device *pdev)
+{
+ struct mx25_gcq_priv *priv = platform_get_drvdata(pdev);
+ struct iio_dev *indio_dev = iio_priv_to_dev(pdev);
+
+ iio_device_unregister(indio_dev);
+ free_irq(priv->irq, (void *)priv);
+ clk_disable_unprepare(priv->clk);
+
+ return 0;
+}
+
+static struct of_device_id mx25_gcq_ids[] = {
+ { .compatible = "fsl,imx25-gcq", },
+ { /* Sentinel */ }
+};
+
+static struct platform_driver mx25_gcq_driver = {
+ .driver = {
+ .name = "mx25-gcq",
+ .owner = THIS_MODULE,
+ .of_match_table = mx25_gcq_ids,
+ },
+ .probe = mx25_gcq_probe,
+ .remove = mx25_gcq_remove,
+};
+module_platform_driver(mx25_gcq_driver);
+
+MODULE_DESCRIPTION("ADC driver for Freescale mx25");
+MODULE_AUTHOR("Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>");
+MODULE_LICENSE("GPL v2");
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 4/6] ARM: dts: imx25: Add TSC and ADC support
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
2014-06-16 9:28 ` [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver Denis Carikli
@ 2014-06-16 9:28 ` Denis Carikli
2014-06-16 9:28 ` [PATCH v3 5/6] ARM: dts: imx25: mbimxsd25: Add touchscreen support Denis Carikli
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 9:28 UTC (permalink / raw)
To: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann, Denis Carikli
Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
---
Changelog v2->v3:
- Added ADC controller support: making a separate patch
for it would have been overkill.
- Moved the common TSC and ADC sub-nodes inside this patch
instead of having a copy in each dts using it.
---
arch/arm/boot/dts/imx25.dtsi | 30 +++++++++++++++++++++++++++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 98783f5..3187342 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -264,13 +264,37 @@
status = "disabled";
};
- tsc: tsc@50030000 {
- compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
- reg = <0x50030000 0x4000>;
+ tscadc: tscadc@50030000 {
+ compatible = "fsl,imx25-tsadc";
+ reg = <0x50030000 0xc>;
interrupts = <46>;
clocks = <&clks 119>;
clock-names = "ipg";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
status = "disabled";
+
+ adc: adc@50030800 {
+ compatible = "fsl,imx25-gcq";
+ reg = <0x50030800 0x60>;
+ interrupt-parent = <&tscadc>;
+ interrupts = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ tsc: tcq@50030400 {
+ compatible = "fsl,imx25-tcq";
+ reg = <0x50030400 0x60>;
+ interrupt-parent = <&tscadc>;
+ interrupts = <0>;
+ fsl,wires = <4>;
+ status = "disabled";
+ };
};
ssi1: ssi@50034000 {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 5/6] ARM: dts: imx25: mbimxsd25: Add touchscreen support.
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
2014-06-16 9:28 ` [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver Denis Carikli
2014-06-16 9:28 ` [PATCH v3 4/6] ARM: dts: imx25: Add TSC and ADC support Denis Carikli
@ 2014-06-16 9:28 ` Denis Carikli
2014-06-16 9:28 ` [PATCH v3 6/6] ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC support Denis Carikli
2014-06-16 11:26 ` [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver Lee Jones
4 siblings, 0 replies; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 9:28 UTC (permalink / raw)
To: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann, Denis Carikli
Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
---
Changelog v2->v3:
- Most of the non-board specific tsc and tscadc
parts were moved to imx25.dtsi. So this patch
was adapted to that.
- Thanks to a fix in the tsc driver, the
'fsl,pen-debounce = <100>;' is not necessary anymore.
---
.../imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
index 9797280..df24046 100644
--- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
+++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
@@ -70,3 +70,11 @@
lcd-supply = <®_lcd_3v3>;
status = "okay";
};
+
+&tsc {
+ status = "okay";
+};
+
+&tscadc {
+ status = "okay";
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 6/6] ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC support.
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
` (2 preceding siblings ...)
2014-06-16 9:28 ` [PATCH v3 5/6] ARM: dts: imx25: mbimxsd25: Add touchscreen support Denis Carikli
@ 2014-06-16 9:28 ` Denis Carikli
2014-06-16 11:26 ` [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver Lee Jones
4 siblings, 0 replies; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 9:28 UTC (permalink / raw)
To: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann, Denis Carikli
Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
---
Changelog v2->v3:
- Added ADC support, splitting it would be overkill.
---
arch/arm/configs/imx_v4_v5_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 397f43c..580c367 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -98,6 +98,7 @@ CONFIG_KEYBOARD_IMX=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_MX25=y
CONFIG_TOUCHSCREEN_MC13783=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
@@ -118,6 +119,7 @@ CONFIG_HWMON=m
CONFIG_SENSORS_MC13783_ADC=m
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
+CONFIG_MFD_MX25_TSADC=y
CONFIG_MFD_MC13XXX_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -184,6 +186,8 @@ CONFIG_DMADEVICES=y
CONFIG_IMX_SDMA=y
CONFIG_IMX_DMA=y
# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=y
+CONFIG_FSL_MX25_ADC=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
--
1.7.9.5
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
` (3 preceding siblings ...)
2014-06-16 9:28 ` [PATCH v3 6/6] ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC support Denis Carikli
@ 2014-06-16 11:26 ` Lee Jones
2014-06-16 15:55 ` Denis Carikli
4 siblings, 1 reply; 12+ messages in thread
From: Lee Jones @ 2014-06-16 11:26 UTC (permalink / raw)
To: Denis Carikli
Cc: Shawn Guo, Samuel Ortiz, Dmitry Torokhov, Jonathan Cameron,
Fabio Estevam, Peter Meerwald, Hartmut Knaack, Eric Bénard,
Sascha Hauer, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann
> From: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>
> This is the core driver for imx25 touchscreen/adc driver. The module
> has one shared ADC and two different conversion queues which use the
> ADC. The two queues are identical. Both can be used for general purpose
> ADC but one is meant to be used for touchscreens.
>
> This driver is the core which manages the central components and
> registers of the TSC/ADC unit. It manages the IRQs and forwards them to
> the correct components.
>
> Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
> ---
> Changelog v2->v3:
> - None
> ---
> .../devicetree/bindings/mfd/fsl-imx25-tsadc.txt | 46 ++++
> drivers/mfd/Kconfig | 9 +
> drivers/mfd/Makefile | 2 +
> drivers/mfd/fsl-imx25-tsadc.c | 232 ++++++++++++++++++++
> include/linux/mfd/imx25-tsadc.h | 138 ++++++++++++
> 5 files changed, 427 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
> create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
> create mode 100644 include/linux/mfd/imx25-tsadc.h
[...]
> diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
> new file mode 100644
> index 0000000..10332c2
> --- /dev/null
> +++ b/drivers/mfd/fsl-imx25-tsadc.c
[...]
> +static struct regmap_config mx25_tsadc = {
> + .fast_io = true,
> + .max_register = 0x8,
Why are you representing this and this alone, in hex?
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> +};
> +
> +struct regmap *mx25_tsadc_get_regmap(struct device *dev)
> +{
> + struct platform_device *pdev;
> + struct mx25_tsadc_priv *priv;
> +
> + if (!dev)
> + return NULL;
> +
> + pdev = container_of(dev, struct platform_device, dev);
> + priv = platform_get_drvdata(pdev);
> + if (IS_ERR_OR_NULL(priv->regs))
> + return NULL;
What? Why are you going to all the trouble of requesting driver data
through pdev?
In fact, why have this function at all? Just pull out the information
you need from the child device driver.
> + return priv->regs;
> +}
> +EXPORT_SYMBOL(mx25_tsadc_get_regmap);
> +
> +struct clk *mx25_tsadc_get_ipg(struct device *dev)
> +{
> + struct platform_device *pdev;
> + struct mx25_tsadc_priv *priv;
> +
> + if (!dev)
> + return NULL;
> +
> + pdev = container_of(dev, struct platform_device, dev);
> + priv = platform_get_drvdata(pdev);
> + if (IS_ERR_OR_NULL(priv->clk))
> + return NULL;
> +
> + return priv->clk;
As above - both points.
> +}
> +EXPORT_SYMBOL(mx25_tsadc_get_ipg);
[...]
> +static void mx25_tsadc_nop(struct irq_data *d)
> +{
> +}
Err, no, this is not required. Just don't populate the call-backs.
> +static int mx25_tsadc_set_wake_nop(struct irq_data *d, unsigned int state)
> +{
> + return 0;
> +}
> +
> +static struct irq_chip mx25_tsadc_irq_chip = {
> + .name = "mx25-tsadc",
> + .irq_ack = mx25_tsadc_nop,
> + .irq_mask = mx25_tsadc_nop,
> + .irq_unmask = mx25_tsadc_nop,
No need to do this.
> + .irq_set_wake = mx25_tsadc_set_wake_nop,
> +};
> +
> +static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
> + irq_hw_number_t hwirq)
> +{
> + struct mx25_tsadc_priv *priv = d->host_data;
> +
> + irq_set_chip_data(irq, priv);
> + irq_set_chip_and_handler(irq, &mx25_tsadc_irq_chip,
> + handle_level_irq);
> +
> +
Too many '\n's here.
> + set_irq_flags(irq, IRQF_VALID);
> +
> + return 0;
> +}
[...]
> +static int mx25_tsadc_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> + struct mx25_tsadc_priv *priv;
> + struct resource *iores;
It would be more consistent if you just called this 'res'.
> + int ret;
> + void __iomem *iomem;
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + iomem = devm_ioremap_resource(dev, iores);
> + if (IS_ERR(iomem)) {
> + dev_err(dev, "Failed to remap iomem\n");
No need for an error message here, devm_ioremap_resource() is noisy
enough.
> + return PTR_ERR(iomem);
> + }
> +
> + priv->regs = regmap_init_mmio(dev, iomem, &mx25_tsadc);
devm_*?
Best to identify the regmap config as such -
mx25_tsadc_regmap_config.
> + if (IS_ERR(priv->regs)) {
> + dev_err(dev, "Failed to initialize regmap\n");
> + return PTR_ERR(priv->regs);
> + }
> +
> + priv->clk = devm_clk_get(dev, "ipg");
> + if (IS_ERR(priv->clk)) {
> + dev_err(dev, "Failed to get ipg clock\n");
> + return PTR_ERR(priv->clk);
> + }
> +
> + /* Enable clock and reset the component */
> + regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
> + MX25_TGCR_CLK_EN);
> + regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
> + MX25_TGCR_TSC_RST);
> +
> + /* Setup powersaving mode, but enable internal reference voltage */
> + regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
> + MX25_TGCR_POWERMODE_SAVE);
> + regmap_update_bits(priv->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
> + MX25_TGCR_INTREFEN);
> +
> + ret = mx25_tsadc_setup_irq(pdev, priv);
> + if (ret) {
> + dev_err(dev, "Failed to setup irqs\n");
mx25_tsadc_setup_irq() is noisy enough. No need for added prints.
> + return ret;
> + }
> +
> + platform_set_drvdata(pdev, priv);
> +
> + of_platform_populate(np, NULL, NULL, dev);
> +
> + dev_info(dev, "i.MX25 Touchscreen and ADC core driver loaded\n");
Remove this.
> + return 0;
> +}
> +
> +static const struct of_device_id mx25_tsadc_ids[] = {
> + { .compatible = "fsl,imx25-tsadc", },
No need for the ',' after the '"'.
> + { /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_tsadc_driver = {
> + .driver = {
You're lining up '=' from different layers here. I suggest you don't
do that.
> + .name = "mx25-tsadc",
> + .owner = THIS_MODULE,
> + .of_match_table = mx25_tsadc_ids,
If this driver DT only?
> + },
> + .probe = mx25_tsadc_probe,
> +};
> +module_platform_driver(mx25_tsadc_driver);
> +
> +MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:mx25-tsadc");
> diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
> new file mode 100644
> index 0000000..6fba341
> --- /dev/null
> +++ b/include/linux/mfd/imx25-tsadc.h
> @@ -0,0 +1,138 @@
> +#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +
> +struct regmap;
> +struct device;
> +struct clk;
> +
> +struct regmap *mx25_tsadc_get_regmap(struct device *dev);
> +struct clk *mx25_tsadc_get_ipg(struct device *dev);
Remove these, they're pointless.
> +#define MX25_TSC_TGCR 0x00
> +#define MX25_TSC_TGSR 0x04
> +#define MX25_TSC_TICR 0x08
> +
> +/* The same register layout for TC and GC queue */
> +#define MX25_ADCQ_FIFO 0x00
> +#define MX25_ADCQ_CR 0x04
> +#define MX25_ADCQ_SR 0x08
> +#define MX25_ADCQ_MR 0x0c
> +#define MX25_ADCQ_ITEM_7_0 0x20
> +#define MX25_ADCQ_ITEM_15_8 0x24
> +#define MX25_ADCQ_CFG(n) (0x40 + ((n) * 0x4))
> +
> +/* Register values */
> +/* Queue Config register */
> +#define MX25_ADCQ_MR_MASK 0xffffffff
> +
> +/* TGCR */
> +#define MX25_TGCR_PDBTIME(x) ((x) << 25)
> +#define MX25_TGCR_PDBTIME_MASK MX25_TGCR_PDBTIME(0x7f)
> +#define MX25_TGCR_PDBEN (1 << 24)
> +#define MX25_TGCR_PDEN (1 << 23)
> +#define MX25_TGCR_ADCCLKCFG(x) ((x) << 16)
> +#define MX25_TGCR_GET_ADCCLK(x) (((x) >> 16) & 0x1f)
> +#define MX25_TGCR_INTREFEN (1 << 10)
> +#define MX25_TGCR_POWERMODE_MASK (3 << 8)
> +#define MX25_TGCR_POWERMODE_SAVE (1 << 8)
> +#define MX25_TGCR_POWERMODE_ON (2 << 8)
> +#define MX25_TGCR_STLC (1 << 5)
> +#define MX25_TGCR_SLPC (1 << 4)
> +#define MX25_TGCR_FUNC_RST (1 << 2)
> +#define MX25_TGCR_TSC_RST (1 << 1)
> +#define MX25_TGCR_CLK_EN (1 << 0)
The (1 << X)'s can be replaced with BIT(X).
> +/* TGSR */
> +#define MX25_TGSR_SLP_INT (1 << 2)
> +#define MX25_TGSR_GCQ_INT (1 << 1)
> +#define MX25_TGSR_TCQ_INT (1 << 0)
> +
> +/* ADCQ_ITEM_* */
> +#define _MX25_ADCQ_ITEM(item, x) ((x) << ((item) * 4))
> +#define MX25_ADCQ_ITEM(item, x) ((item) >= 8 ? \
> + _MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
> +
> +/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
> +#define MX25_ADCQ_FIFO_DATA(x) (((x) >> 4) & 0xfff)
> +#define MX25_ADCQ_FIFO_ID(x) ((x) & 0xf)
> +
> +/* ADCQ_CR (TCQR and GCQR) */
> +#define MX25_ADCQ_CR_PDCFG_LEVEL (1 << 19)
> +#define MX25_ADCQ_CR_PDMSK (1 << 18)
> +#define MX25_ADCQ_CR_FRST (1 << 17)
> +#define MX25_ADCQ_CR_QRST (1 << 16)
> +#define MX25_ADCQ_CR_RWAIT_MASK (0xf << 12)
> +#define MX25_ADCQ_CR_RWAIT(x) ((x) << 12)
> +#define MX25_ADCQ_CR_WMRK_MASK (0xf << 8)
> +#define MX25_ADCQ_CR_WMRK(x) ((x) << 8)
> +#define MX25_ADCQ_CR_LITEMID_MASK (0xf << 4)
> +#define MX25_ADCQ_CR_LITEMID(x) ((x) << 4)
> +#define MX25_ADCQ_CR_RPT (1 << 3)
> +#define MX25_ADCQ_CR_FQS (1 << 2)
> +#define MX25_ADCQ_CR_QSM_MASK 0x3
> +#define MX25_ADCQ_CR_QSM_PD 0x1
> +#define MX25_ADCQ_CR_QSM_FQS 0x2
> +#define MX25_ADCQ_CR_QSM_FQS_PD 0x3
> +
> +/* ADCQ_SR (TCQSR and GCQSR) */
> +#define MX25_ADCQ_SR_FDRY (1 << 15)
> +#define MX25_ADCQ_SR_FULL (1 << 14)
> +#define MX25_ADCQ_SR_EMPT (1 << 13)
> +#define MX25_ADCQ_SR_FDN(x) (((x) >> 8) & 0x1f)
> +#define MX25_ADCQ_SR_FRR (1 << 6)
> +#define MX25_ADCQ_SR_FUR (1 << 5)
> +#define MX25_ADCQ_SR_FOR (1 << 4)
> +#define MX25_ADCQ_SR_EOQ (1 << 1)
> +#define MX25_ADCQ_SR_PD (1 << 0)
> +
> +/* ADCQ_MR (TCQMR and GCQMR) */
> +#define MX25_ADCQ_MR_FDRY_DMA (1 << 31)
> +#define MX25_ADCQ_MR_FER_DMA (1 << 22)
> +#define MX25_ADCQ_MR_FUR_DMA (1 << 21)
> +#define MX25_ADCQ_MR_FOR_DMA (1 << 20)
> +#define MX25_ADCQ_MR_EOQ_DMA (1 << 17)
> +#define MX25_ADCQ_MR_PD_DMA (1 << 16)
> +#define MX25_ADCQ_MR_FDRY_IRQ (1 << 15)
> +#define MX25_ADCQ_MR_FER_IRQ (1 << 6)
> +#define MX25_ADCQ_MR_FUR_IRQ (1 << 5)
> +#define MX25_ADCQ_MR_FOR_IRQ (1 << 4)
> +#define MX25_ADCQ_MR_EOQ_IRQ (1 << 1)
> +#define MX25_ADCQ_MR_PD_IRQ (1 << 0)
> +
> +/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
> +#define MX25_ADCQ_CFG_SETTLING_TIME(x) ((x) << 24)
> +#define MX25_ADCQ_CFG_IGS (1 << 20)
> +#define MX25_ADCQ_CFG_NOS_MASK (0xf << 16)
> +#define MX25_ADCQ_CFG_NOS(x) (((x) - 1) << 16)
> +#define MX25_ADCQ_CFG_WIPER (1 << 15)
> +#define MX25_ADCQ_CFG_YNLR (1 << 14)
> +#define MX25_ADCQ_CFG_YPLL_HIGH 0
> +#define MX25_ADCQ_CFG_YPLL_OFF (1 << 12)
> +#define MX25_ADCQ_CFG_YPLL_LOW (3 << 12)
> +#define MX25_ADCQ_CFG_XNUR_HIGH 0
> +#define MX25_ADCQ_CFG_XNUR_OFF (1 << 10)
> +#define MX25_ADCQ_CFG_XNUR_LOW (3 << 10)
> +#define MX25_ADCQ_CFG_XPUL_OFF (1 << 9)
> +#define MX25_ADCQ_CFG_XPUL_HIGH 0
> +#define MX25_ADCQ_CFG_REFP_YP 0
> +#define MX25_ADCQ_CFG_REFP_XP (1 << 7)
> +#define MX25_ADCQ_CFG_REFP_EXT (2 << 7)
> +#define MX25_ADCQ_CFG_REFP_INT (3 << 7)
> +#define MX25_ADCQ_CFG_REFP_MASK (3 << 7)
> +#define MX25_ADCQ_CFG_IN_XP 0
> +#define MX25_ADCQ_CFG_IN_YP (1 << 4)
> +#define MX25_ADCQ_CFG_IN_XN (2 << 4)
> +#define MX25_ADCQ_CFG_IN_YN (3 << 4)
> +#define MX25_ADCQ_CFG_IN_WIPER (4 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX0 (5 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX1 (6 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX2 (7 << 4)
> +#define MX25_ADCQ_CFG_REFN_XN 0
> +#define MX25_ADCQ_CFG_REFN_YN (1 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND (2 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND2 (3 << 2)
> +#define MX25_ADCQ_CFG_REFN_MASK (3 << 2)
> +#define MX25_ADCQ_CFG_PENIACK (1 << 1)
Can you line up all of the definitions for the entire file with tabs.
They are currently incredibly hard to read.
> +
> +
Extra '\n'.
> +#endif /* _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_ */
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver
2014-06-16 11:26 ` [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver Lee Jones
@ 2014-06-16 15:55 ` Denis Carikli
0 siblings, 0 replies; 12+ messages in thread
From: Denis Carikli @ 2014-06-16 15:55 UTC (permalink / raw)
To: Lee Jones
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Samuel Ortiz, Eric Bénard, linux-iio-u79uwXL29TY76Z2rM5mHXA,
Dmitry Torokhov,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Peter Meerwald,
Hartmut Knaack, Markus Pargmann, Shawn Guo, Fabio Estevam,
Sascha Hauer, Jonathan Cameron
On 06/16/2014 01:26 PM, Lee Jones wrote:
>
>> +static void mx25_tsadc_nop(struct irq_data *d)
>> +{
>> +}
>
> Err, no, this is not required. Just don't populate the call-backs.
>
>> +static int mx25_tsadc_set_wake_nop(struct irq_data *d, unsigned int state)
>> +{
>> + return 0;
>> +}
>> +
>> +static struct irq_chip mx25_tsadc_irq_chip = {
>> + .name = "mx25-tsadc",
>> + .irq_ack = mx25_tsadc_nop,
>> + .irq_mask = mx25_tsadc_nop,
>> + .irq_unmask = mx25_tsadc_nop,
>
> No need to do this.
I can avoid all callbacks but the irq_mask/irq_unmask ones:
Even if I add some flags to prevent it to be called during probe, it
can't be avoided to be called when an IRQ arrives.
It's called by handle_level_irq, which is setup as handler in
mx25_tsadc_domain_map. I don't think it's a good idea to rewrite it not
to depend on irq_mask/irq_unmask.
Here's what happens when an IRQ arrives (Shortened version):
[<c005391c>] (handle_level_irq)
[<c0050930>] (generic_handle_irq)
[<c02dc544>] (mx25_tsadc_irq_handler)
[<c0050930>] (generic_handle_irq)
[<c0009e64>] (handle_IRQ)
[<c0008710>] (avic_handle_irq)
[...]
Then handle_level_irq it runs mask_ack_irq inconditionally.
mask_ack_irq in turn will try to executes irq_mask_ack or else irq_mask
(without checking if it's NULL) and then will provoke the NULL pointer.
Instead when I look in drivers/mfd/ I see the following drivers which
have some dummy handlers:
wm8994-irq.c, ucb1x00-core.c, tc6393xb.c, htc-egpio.c, arizona-irq.c
So I wonder if dummy callbacks are allowed or if it's an old practice
that has been deprecated.
Else I wonder how to avoid them:
- By setting some flags (which ones?).
- Or by re-architecting the IRQ handling between the MFD and its
sub-devices in a way that the mfd driver is responsible for enabling and
disabling the IRQs (instead of its subdevices). That would be done
inside .irq_enable() and a .irq_disable().
Most of the mfd drivers that handle an IRQ controller have theses callbacks.
In the later case, how the subdevice would enable the interrupts, would
it be done automatically? or would it have to enable the parent mfd's
interrupts trough explicit callbacks or wrapper functions that will call
the callbacks(irq_enable and so on, with the irq taken from the mfd's
private struct).
I've fixed the rest of the concerns but I'll wait for an answer before
resending so I can fix this issue too.
Denis.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver
[not found] ` <1402910933-20534-3-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
@ 2014-06-21 10:45 ` Jonathan Cameron
2014-06-21 10:51 ` Jonathan Cameron
1 sibling, 0 replies; 12+ messages in thread
From: Jonathan Cameron @ 2014-06-21 10:45 UTC (permalink / raw)
To: Denis Carikli, Shawn Guo, Samuel Ortiz, Dmitry Torokhov,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann
On 16/06/14 10:28, Denis Carikli wrote:
> From: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>
> This is a conversion queue driver for the mx25 SoC. It uses the central
> ADC which is used by two seperate independent queues. This driver
> prepares different conversion configurations for each possible input.
> For a conversion it creates a conversionqueue of one item with the
> correct configuration for the chosen channel. It then executes the queue
> once and disables the conversion queue afterwards.
>
> The reference voltages are configurable through devicetree subnodes,
> depending on the connections of the ADC inputs.
>
> Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
> ---
> Changelog v2->v3:
> - Fixed compilation: I forgott to tell that this IIO patch was untested
> in the previous cover letter. Now it is tested at runtime:
> I left the touchscreen connected but I configured the TSC as an ADC
> instead, set the refp to internal reference, and the refn to ngnd_adc(3)
> for the first 4 channels(xp,yp,xn,yn) and observed the values changing
> while touching the resistive 4-wire touchscreen.
> - MX25_IIO_CHAN now became MX25_GCQ_CHAN and its .address is now gone
> and the code using it adapted.
> - The instances of struct iio_dev were renamed from idev to indio_dev.
> - regmap_read return value is now checked in mx25_gcq_read_raw.
> - Comparisons with MX25_NUM_CFGS are now fixed
> - Cosmetics fix in a multiline comment.
> ---
> .../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt | 54 ++++
> drivers/iio/adc/Kconfig | 7 +
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/fsl-imx25-gcq.c | 342 ++++++++++++++++++++
> 4 files changed, 404 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> new file mode 100644
> index 0000000..333fc55
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> @@ -0,0 +1,54 @@
> +Freescale i.MX25 ADC GCQ device
> +
> +This is a generic conversion queue device that can convert any of the analog
> +inputs using the ADC unit of the i.MX25.
> +
> +Required properties:
> + - compatible: Should be "fsl,imx25-gcq".
> + - reg: Should be the register range of the module.
> + - interrupts: Should be the interrupt number of the module. Typically this is <1>.
> + - interrupt-parent: phandle to the tsadc module of the i.MX25.
> + - #address-cells: Should be <1> (setting for the subnodes)
> + - #size-cells: Should be <0> (setting for the subnodes)
> +
> +Optionally you can define subnodes which define the positive and negative
> +reference voltage for one of the analog inputs.
> +
> +Required properties for subnodes:
> + - reg: Should be the number of the analog input.
> + 0: xp
> + 1: yp
> + 2: xn
> + 3: yn
> + 4: wiper
> + 5: inaux0
> + 6: inaux1
> + 7: inaux2
> + - fsl,adc-refp: Positive reference input
> + 0: yp
> + 1: xp
> + 2: External reference
> + 3: Internal reference
> + - fsl,adc-refn: Negative reference input
> + 0: xn
> + 1: yn
> + 2: ngnd_adc
> + 3: ngnd_adc
> +
> +
> +Example:
> +
> + adc: adc@50030800 {
> + compatible = "fsl,imx25-gcq";
> + reg = <0x50030800 0x60>;
> + interrupt-parent = <&tscadc>;
> + interrupts = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + inaux@5 {
> + reg = <5>;
> + fsl,adc-refp = <3>;
> + fsl,adc-refn = <3>;
> + };
> + };
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index a80d236..58efb8d 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -125,6 +125,13 @@ config EXYNOS_ADC
> of SoCs for drivers such as the touchscreen and hwmon to use to share
> this resource.
>
> +config FSL_MX25_ADC
> + tristate "Freescale MX25 ADC driver"
> + depends on MFD_MX25_TSADC
> + help
> + Generic Conversion Queue driver used for general purpose ADC in the
> + MX25. This driver supports single measurements using the MX25 ADC.
> +
> config LP8788_ADC
> tristate "LP8788 ADC driver"
> depends on MFD_LP8788
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 9d60f2d..2767fd6 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_AD7887) += ad7887.o
> obj-$(CONFIG_AD799X) += ad799x.o
> obj-$(CONFIG_AT91_ADC) += at91_adc.o
> obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
> +obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
> obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
> obj-$(CONFIG_MAX1363) += max1363.o
> obj-$(CONFIG_MCP320X) += mcp320x.o
> diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
> new file mode 100644
> index 0000000..685cac5
> --- /dev/null
> +++ b/drivers/iio/adc/fsl-imx25-gcq.c
> @@ -0,0 +1,342 @@
> +/*
> + * Copyright 2014 Markus Pargmann, Pengutronix <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + *
> + * This is the driver for the imx25 GCQ (Generic Conversion Queue)
> + * connected to the imx25 ADC.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/interrupt.h>
> +#include <linux/iio/iio.h>
> +#include <linux/mfd/imx25-tsadc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
> +
> +enum mx25_gcq_cfgs {
> + MX25_CFG_XP = 0,
> + MX25_CFG_YP,
> + MX25_CFG_XN,
> + MX25_CFG_YN,
> + MX25_CFG_WIPER,
> + MX25_CFG_INAUX0,
> + MX25_CFG_INAUX1,
> + MX25_CFG_INAUX2,
> + MX25_NUM_CFGS,
> +};
> +
> +struct mx25_gcq_priv {
> + struct regmap *regs;
> + struct completion completed;
> + unsigned int settling_time;
> + struct clk *clk;
> + int irq;
> +};
> +
> +#define MX25_CQG_CHAN(chan, id) {\
> + .type = IIO_VOLTAGE,\
> + .indexed = 1,\
> + .channel = chan,\
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> + .datasheet_name = id, \
> + }
> +
> +static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
> + MX25_CQG_CHAN(0, "xp"),
> + MX25_CQG_CHAN(1, "yp"),
> + MX25_CQG_CHAN(2, "xn"),
> + MX25_CQG_CHAN(3, "yn"),
> + MX25_CQG_CHAN(4, "wiper"),
> + MX25_CQG_CHAN(5, "inaux0"),
> + MX25_CQG_CHAN(6, "inaux1"),
> + MX25_CQG_CHAN(7, "inaux2"),
> +};
> +
> +static void mx25_gcq_disable_eoq(struct mx25_gcq_priv *priv)
> +{
> + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ,
> + MX25_ADCQ_MR_EOQ_IRQ);
> +}
> +
> +static void mx25_gcq_enable_eoq(struct mx25_gcq_priv *priv)
> +{
> + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
> +}
> +
> +static irqreturn_t mx25_gcq_irq(int irq, void *data)
> +{
> + struct mx25_gcq_priv *priv = data;
> + u32 stats;
> +
> + regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
> +
> + if (stats & MX25_ADCQ_SR_EOQ) {
> + mx25_gcq_disable_eoq(priv);
> + complete(&priv->completed);
> + }
> +
> + /* Disable conversion queue run */
> + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
> +
> + /* Acknowledge all possible irqs */
> + regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
> + MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_EOQ |
> + MX25_ADCQ_SR_PD);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan, int *val, int *val2,
> + long mask)
> +{
> + struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> + long timeout;
> + u32 data;
> + int ret;
> +
> + if (mask != IIO_CHAN_INFO_RAW)
> + return -EINVAL;
> +
> + mutex_lock(&indio_dev->mlock);
> +
> + /* Setup the configuration we want to use */
> + regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
> + MX25_ADCQ_ITEM(0, chan->channel));
> +
> + mx25_gcq_enable_eoq(priv);
> +
> + /* Trigger queue for one run */
> + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
> + MX25_ADCQ_CR_FQS);
> +
> + timeout = wait_for_completion_interruptible_timeout(&priv->completed,
> + MX25_GCQ_TIMEOUT);
> + if (timeout < 0) {
> + dev_err(&indio_dev->dev, "ADC wait for measurement failed\n");
> + ret = timeout;
> + goto out;
> + } else if (timeout == 0) {
> + dev_err(&indio_dev->dev, "ADC timed out\n");
> + ret = -ETIMEDOUT;
> + goto out;
> + }
> +
> + ret = regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
> + if (ret)
> + return ret;
> +
> + *val = MX25_ADCQ_FIFO_DATA(data);
> +
> + ret = IIO_VAL_INT;
> +
> +out:
> + mutex_unlock(&indio_dev->mlock);
> +
> + return ret;
> +}
> +
> +static const struct iio_info mx25_gcq_iio_info = {
> + .read_raw = mx25_gcq_read_raw,
> +};
> +
> +static const struct regmap_config mx25_gcq_regconfig = {
> + .max_register = 0x5c,
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> +};
> +
> +static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
> + struct mx25_gcq_priv *priv)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct device_node *child;
> + struct device *dev = &pdev->dev;
> + int ret;
> + int i;
> +
> + /* Setup all configurations registers with a default conversion
> + * configuration for each input
> + */
> + for (i = 0; i < MX25_NUM_CFGS; ++i)
> + regmap_write(priv->regs, MX25_ADCQ_CFG(i),
> + MX25_ADCQ_CFG_YPLL_OFF |
> + MX25_ADCQ_CFG_XNUR_OFF |
> + MX25_ADCQ_CFG_XPUL_OFF |
> + MX25_ADCQ_CFG_REFP_INT |
> + (i << 4) |
> + MX25_ADCQ_CFG_REFN_NGND2);
> +
> + for_each_child_of_node(np, child) {
> + u32 reg;
> + u32 refn;
> + u32 refp;
> +
> + ret = of_property_read_u32(child, "reg", ®);
> + if (ret) {
> + dev_err(dev, "Failed to get reg property\n");
> + return ret;
> + }
> +
> + if (reg >= MX25_NUM_CFGS) {
> + dev_err(dev, "reg value is greater than the number of available configuration registers\n");
> + return -EINVAL;
> + }
> +
> + ret = of_property_read_u32(child, "fsl,adc-refn", &refn);
> + if (ret) {
> + dev_err(dev, "Failed to get fsl,adc-refn property\n");
> + return ret;
> + }
> + if (refn < 0 || refn > 3) {
> + dev_err(dev, "Invalid fsl,adc-refn property value %d\n",
> + refn);
> + return -EINVAL;
> + }
> +
> + ret = of_property_read_u32(child, "fsl,adc-refp", &refp);
> + if (ret) {
> + dev_err(dev, "Failed to get fsl,adc-refp property\n");
> + return ret;
> + }
> + if (refp < 0 || refp > 3) {
> + dev_err(dev, "Invalid fsl,adc-refp property value %d\n",
> + refp);
> + return -EINVAL;
> + }
> +
> + regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
> + MX25_ADCQ_CFG_REFP_MASK |
> + MX25_ADCQ_CFG_REFN_MASK,
> + (refp << 7) | (refn << 2));
> + }
> + regmap_update_bits(priv->regs, MX25_ADCQ_CR,
> + MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
> + MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
> +
> + regmap_write(priv->regs, MX25_ADCQ_CR,
> + MX25_ADCQ_CR_PDMSK |
> + MX25_ADCQ_CR_QSM_FQS);
> +
> + return 0;
> +}
> +
> +static int mx25_gcq_probe(struct platform_device *pdev)
> +{
> + struct iio_dev *indio_dev;
> + struct mx25_gcq_priv *priv;
> + struct resource *res;
> + struct device *dev = &pdev->dev;
> + int ret;
> + void __iomem *mem;
> +
> + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + priv = iio_priv(indio_dev);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mem = devm_ioremap_resource(dev, res);
> + if (!mem)
> + return -ENOMEM;
> +
> + priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
> + if (IS_ERR(priv->regs)) {
> + dev_err(dev, "Failed to initialize regmap\n");
> + return PTR_ERR(priv->regs);
> + }
> +
> + init_completion(&priv->completed);
> +
> + ret = mx25_gcq_setup_cfgs(pdev, priv);
> + if (ret)
> + goto err_irq_free;
> +
> + priv->clk = mx25_tsadc_get_ipg(pdev->dev.parent);
> + ret = clk_prepare_enable(priv->clk);
> + if (ret) {
> + dev_err(dev, "Failed to enable clock\n");
> + return ret;
> + }
> +
> + priv->irq = platform_get_irq(pdev, 0);
> + if (priv->irq <= 0) {
> + dev_err(dev, "Failed to get IRQ\n");
> + ret = priv->irq;
> + goto err_clk_unprepare;
> + }
> +
> + ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name,
> + priv);
> + if (ret) {
> + dev_err(dev, "Failed requesting IRQ\n");
> + goto err_clk_unprepare;
> + }
> +
> + indio_dev->dev.parent = &pdev->dev;
> + indio_dev->channels = mx25_gcq_channels;
> + indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
> + indio_dev->info = &mx25_gcq_iio_info;
> +
> + ret = iio_device_register(indio_dev);
> + if (ret) {
> + dev_err(dev, "Failed to register iio device\n");
> + goto err_irq_free;
> + }
> +
> + platform_set_drvdata(pdev, priv);
> +
> + return 0;
> +
> +err_irq_free:
> + free_irq(priv->irq, (void *)priv);
> +
> +err_clk_unprepare:
> + clk_disable_unprepare(priv->clk);
> +
> + return ret;
> +}
> +
> +static int mx25_gcq_remove(struct platform_device *pdev)
> +{
> + struct mx25_gcq_priv *priv = platform_get_drvdata(pdev);
> + struct iio_dev *indio_dev = iio_priv_to_dev(pdev);
> +
> + iio_device_unregister(indio_dev);
> + free_irq(priv->irq, (void *)priv);
> + clk_disable_unprepare(priv->clk);
> +
> + return 0;
> +}
> +
> +static struct of_device_id mx25_gcq_ids[] = {
> + { .compatible = "fsl,imx25-gcq", },
> + { /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_gcq_driver = {
> + .driver = {
> + .name = "mx25-gcq",
> + .owner = THIS_MODULE,
> + .of_match_table = mx25_gcq_ids,
> + },
> + .probe = mx25_gcq_probe,
> + .remove = mx25_gcq_remove,
> +};
> +module_platform_driver(mx25_gcq_driver);
> +
> +MODULE_DESCRIPTION("ADC driver for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>");
> +MODULE_LICENSE("GPL v2");
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver
[not found] ` <1402910933-20534-3-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
2014-06-21 10:45 ` Jonathan Cameron
@ 2014-06-21 10:51 ` Jonathan Cameron
2014-06-23 16:43 ` Denis Carikli
1 sibling, 1 reply; 12+ messages in thread
From: Jonathan Cameron @ 2014-06-21 10:51 UTC (permalink / raw)
To: Denis Carikli, Shawn Guo, Samuel Ortiz, Dmitry Torokhov,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Lee Jones,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Lars-Peter Clausen,
Markus Pargmann
On 16/06/14 10:28, Denis Carikli wrote:
> From: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>
> This is a conversion queue driver for the mx25 SoC. It uses the central
> ADC which is used by two seperate independent queues. This driver
> prepares different conversion configurations for each possible input.
> For a conversion it creates a conversionqueue of one item with the
> correct configuration for the chosen channel. It then executes the queue
> once and disables the conversion queue afterwards.
>
> The reference voltages are configurable through devicetree subnodes,
> depending on the connections of the ADC inputs.
>
> Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> Signed-off-by: Denis Carikli <denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
Having been unobservant and hence commented on previous version, I've
just quickly lifted the remaining points over from that review to here.
One little bug, but otherwise just small suggestions.
Jonathan
> ---
> Changelog v2->v3:
> - Fixed compilation: I forgott to tell that this IIO patch was untested
> in the previous cover letter. Now it is tested at runtime:
> I left the touchscreen connected but I configured the TSC as an ADC
> instead, set the refp to internal reference, and the refn to ngnd_adc(3)
> for the first 4 channels(xp,yp,xn,yn) and observed the values changing
> while touching the resistive 4-wire touchscreen.
> - MX25_IIO_CHAN now became MX25_GCQ_CHAN and its .address is now gone
> and the code using it adapted.
> - The instances of struct iio_dev were renamed from idev to indio_dev.
> - regmap_read return value is now checked in mx25_gcq_read_raw.
> - Comparisons with MX25_NUM_CFGS are now fixed
> - Cosmetics fix in a multiline comment.
> ---
> .../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt | 54 ++++
> drivers/iio/adc/Kconfig | 7 +
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/fsl-imx25-gcq.c | 342 ++++++++++++++++++++
> 4 files changed, 404 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> new file mode 100644
> index 0000000..333fc55
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> @@ -0,0 +1,54 @@
> +Freescale i.MX25 ADC GCQ device
> +
> +This is a generic conversion queue device that can convert any of the analog
> +inputs using the ADC unit of the i.MX25.
> +
> +Required properties:
> + - compatible: Should be "fsl,imx25-gcq".
> + - reg: Should be the register range of the module.
> + - interrupts: Should be the interrupt number of the module. Typically this is <1>.
> + - interrupt-parent: phandle to the tsadc module of the i.MX25.
> + - #address-cells: Should be <1> (setting for the subnodes)
> + - #size-cells: Should be <0> (setting for the subnodes)
> +
> +Optionally you can define subnodes which define the positive and negative
> +reference voltage for one of the analog inputs.
> +
> +Required properties for subnodes:
> + - reg: Should be the number of the analog input.
> + 0: xp
> + 1: yp
> + 2: xn
> + 3: yn
> + 4: wiper
> + 5: inaux0
> + 6: inaux1
> + 7: inaux2
> + - fsl,adc-refp: Positive reference input
> + 0: yp
> + 1: xp
> + 2: External reference
> + 3: Internal reference
> + - fsl,adc-refn: Negative reference input
> + 0: xn
> + 1: yn
> + 2: ngnd_adc
> + 3: ngnd_adc
> +
> +
> +Example:
> +
> + adc: adc@50030800 {
> + compatible = "fsl,imx25-gcq";
> + reg = <0x50030800 0x60>;
> + interrupt-parent = <&tscadc>;
> + interrupts = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + inaux@5 {
> + reg = <5>;
> + fsl,adc-refp = <3>;
> + fsl,adc-refn = <3>;
> + };
> + };
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index a80d236..58efb8d 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -125,6 +125,13 @@ config EXYNOS_ADC
> of SoCs for drivers such as the touchscreen and hwmon to use to share
> this resource.
>
> +config FSL_MX25_ADC
> + tristate "Freescale MX25 ADC driver"
> + depends on MFD_MX25_TSADC
> + help
> + Generic Conversion Queue driver used for general purpose ADC in the
> + MX25. This driver supports single measurements using the MX25 ADC.
> +
> config LP8788_ADC
> tristate "LP8788 ADC driver"
> depends on MFD_LP8788
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 9d60f2d..2767fd6 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -14,6 +14,7 @@ obj-$(CONFIG_AD7887) += ad7887.o
> obj-$(CONFIG_AD799X) += ad799x.o
> obj-$(CONFIG_AT91_ADC) += at91_adc.o
> obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
> +obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
> obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
> obj-$(CONFIG_MAX1363) += max1363.o
> obj-$(CONFIG_MCP320X) += mcp320x.o
> diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
> new file mode 100644
> index 0000000..685cac5
> --- /dev/null
> +++ b/drivers/iio/adc/fsl-imx25-gcq.c
> @@ -0,0 +1,342 @@
> +/*
> + * Copyright 2014 Markus Pargmann, Pengutronix <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + *
> + * This is the driver for the imx25 GCQ (Generic Conversion Queue)
> + * connected to the imx25 ADC.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/interrupt.h>
> +#include <linux/iio/iio.h>
> +#include <linux/mfd/imx25-tsadc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
> +
> +enum mx25_gcq_cfgs {
> + MX25_CFG_XP = 0,
> + MX25_CFG_YP,
> + MX25_CFG_XN,
> + MX25_CFG_YN,
> + MX25_CFG_WIPER,
> + MX25_CFG_INAUX0,
> + MX25_CFG_INAUX1,
> + MX25_CFG_INAUX2,
> + MX25_NUM_CFGS,
> +};
> +
> +struct mx25_gcq_priv {
> + struct regmap *regs;
> + struct completion completed;
> + unsigned int settling_time;
> + struct clk *clk;
> + int irq;
> +};
> +
> +#define MX25_CQG_CHAN(chan, id) {\
> + .type = IIO_VOLTAGE,\
> + .indexed = 1,\
> + .channel = chan,\
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> + .datasheet_name = id, \
> + }
> +
> +static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
> + MX25_CQG_CHAN(0, "xp"),
> + MX25_CQG_CHAN(1, "yp"),
> + MX25_CQG_CHAN(2, "xn"),
> + MX25_CQG_CHAN(3, "yn"),
> + MX25_CQG_CHAN(4, "wiper"),
> + MX25_CQG_CHAN(5, "inaux0"),
> + MX25_CQG_CHAN(6, "inaux1"),
> + MX25_CQG_CHAN(7, "inaux2"),
> +};
> +
> +static void mx25_gcq_disable_eoq(struct mx25_gcq_priv *priv)
> +{
> + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ,
> + MX25_ADCQ_MR_EOQ_IRQ);
> +}
> +
> +static void mx25_gcq_enable_eoq(struct mx25_gcq_priv *priv)
> +{
> + regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
> +}
> +
> +static irqreturn_t mx25_gcq_irq(int irq, void *data)
> +{
> + struct mx25_gcq_priv *priv = data;
> + u32 stats;
Not that much in here, but perhaps still makes sense for this to be a threaded
irq?
> +
> + regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
> +
> + if (stats & MX25_ADCQ_SR_EOQ) {
> + mx25_gcq_disable_eoq(priv);
> + complete(&priv->completed);
> + }
> +
> + /* Disable conversion queue run */
> + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
> +
> + /* Acknowledge all possible irqs */
> + regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
> + MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_EOQ |
> + MX25_ADCQ_SR_PD);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan, int *val, int *val2,
> + long mask)
> +{
> + struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> + long timeout;
> + u32 data;
> + int ret;
> +
> + if (mask != IIO_CHAN_INFO_RAW)
> + return -EINVAL;
> +
> + mutex_lock(&indio_dev->mlock);
> +
> + /* Setup the configuration we want to use */
> + regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
> + MX25_ADCQ_ITEM(0, chan->channel));
> +
> + mx25_gcq_enable_eoq(priv);
> +
> + /* Trigger queue for one run */
> + regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
> + MX25_ADCQ_CR_FQS);
> +
> + timeout = wait_for_completion_interruptible_timeout(&priv->completed,
> + MX25_GCQ_TIMEOUT);
> + if (timeout < 0) {
> + dev_err(&indio_dev->dev, "ADC wait for measurement failed\n");
> + ret = timeout;
> + goto out;
> + } else if (timeout == 0) {
> + dev_err(&indio_dev->dev, "ADC timed out\n");
> + ret = -ETIMEDOUT;
> + goto out;
> + }
> +
> + ret = regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
> + if (ret)
> + return ret;
> +
> + *val = MX25_ADCQ_FIFO_DATA(data);
> +
> + ret = IIO_VAL_INT;
> +
> +out:
> + mutex_unlock(&indio_dev->mlock);
> +
> + return ret;
> +}
> +
> +static const struct iio_info mx25_gcq_iio_info = {
> + .read_raw = mx25_gcq_read_raw,
> +};
> +
> +static const struct regmap_config mx25_gcq_regconfig = {
> + .max_register = 0x5c,
> + .reg_bits = 32,
> + .val_bits = 32,
> + .reg_stride = 4,
> +};
> +
> +static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
> + struct mx25_gcq_priv *priv)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct device_node *child;
> + struct device *dev = &pdev->dev;
> + int ret;
> + int i;
> +
> + /* Setup all configurations registers with a default conversion
> + * configuration for each input
> + */
> + for (i = 0; i < MX25_NUM_CFGS; ++i)
> + regmap_write(priv->regs, MX25_ADCQ_CFG(i),
> + MX25_ADCQ_CFG_YPLL_OFF |
> + MX25_ADCQ_CFG_XNUR_OFF |
> + MX25_ADCQ_CFG_XPUL_OFF |
> + MX25_ADCQ_CFG_REFP_INT |
> + (i << 4) |
> + MX25_ADCQ_CFG_REFN_NGND2);
> +
> + for_each_child_of_node(np, child) {
> + u32 reg;
> + u32 refn;
> + u32 refp;
> +
> + ret = of_property_read_u32(child, "reg", ®);
> + if (ret) {
> + dev_err(dev, "Failed to get reg property\n");
> + return ret;
> + }
> +
> + if (reg >= MX25_NUM_CFGS) {
> + dev_err(dev, "reg value is greater than the number of available configuration registers\n");
> + return -EINVAL;
> + }
> +
> + ret = of_property_read_u32(child, "fsl,adc-refn", &refn);
> + if (ret) {
> + dev_err(dev, "Failed to get fsl,adc-refn property\n");
> + return ret;
> + }
> + if (refn < 0 || refn > 3) {
> + dev_err(dev, "Invalid fsl,adc-refn property value %d\n",
> + refn);
> + return -EINVAL;
> + }
> +
> + ret = of_property_read_u32(child, "fsl,adc-refp", &refp);
> + if (ret) {
> + dev_err(dev, "Failed to get fsl,adc-refp property\n");
> + return ret;
> + }
> + if (refp < 0 || refp > 3) {
> + dev_err(dev, "Invalid fsl,adc-refp property value %d\n",
> + refp);
> + return -EINVAL;
> + }
> +
> + regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
> + MX25_ADCQ_CFG_REFP_MASK |
> + MX25_ADCQ_CFG_REFN_MASK,
> + (refp << 7) | (refn << 2));
> + }
> + regmap_update_bits(priv->regs, MX25_ADCQ_CR,
> + MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
> + MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
> +
> + regmap_write(priv->regs, MX25_ADCQ_CR,
> + MX25_ADCQ_CR_PDMSK |
> + MX25_ADCQ_CR_QSM_FQS);
> +
> + return 0;
> +}
> +
> +static int mx25_gcq_probe(struct platform_device *pdev)
> +{
> + struct iio_dev *indio_dev;
> + struct mx25_gcq_priv *priv;
> + struct resource *res;
> + struct device *dev = &pdev->dev;
> + int ret;
> + void __iomem *mem;
> +
> + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + priv = iio_priv(indio_dev);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Check this succeeded?
> + mem = devm_ioremap_resource(dev, res);
> + if (!mem)
> + return -ENOMEM;
> +
> + priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
> + if (IS_ERR(priv->regs)) {
> + dev_err(dev, "Failed to initialize regmap\n");
> + return PTR_ERR(priv->regs);
> + }
> +
> + init_completion(&priv->completed);
> +
> + ret = mx25_gcq_setup_cfgs(pdev, priv);
> + if (ret)
Why free an irq here that you haven't got yet? Guessing this is left
over from a different ordering of the code.
> + goto err_irq_free;
> +
> + priv->clk = mx25_tsadc_get_ipg(pdev->dev.parent);
> + ret = clk_prepare_enable(priv->clk);
> + if (ret) {
> + dev_err(dev, "Failed to enable clock\n");
> + return ret;
> + }
> +
> + priv->irq = platform_get_irq(pdev, 0);
> + if (priv->irq <= 0) {
> + dev_err(dev, "Failed to get IRQ\n");
> + ret = priv->irq;
> + goto err_clk_unprepare;
> + }
> +
> + ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name,
> + priv);
Any significant loss in making this a threaded irq? Just a general good
practice question if it doesn't matter.
> + if (ret) {
> + dev_err(dev, "Failed requesting IRQ\n");
> + goto err_clk_unprepare;
> + }
> +
> + indio_dev->dev.parent = &pdev->dev;
> + indio_dev->channels = mx25_gcq_channels;
> + indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
> + indio_dev->info = &mx25_gcq_iio_info;
> +
> + ret = iio_device_register(indio_dev);
> + if (ret) {
> + dev_err(dev, "Failed to register iio device\n");
> + goto err_irq_free;
> + }
> +
> + platform_set_drvdata(pdev, priv);
> +
> + return 0;
> +
> +err_irq_free:
> + free_irq(priv->irq, (void *)priv);
> +
> +err_clk_unprepare:
> + clk_disable_unprepare(priv->clk);
> +
> + return ret;
> +}
> +
> +static int mx25_gcq_remove(struct platform_device *pdev)
> +{
> + struct mx25_gcq_priv *priv = platform_get_drvdata(pdev);
> + struct iio_dev *indio_dev = iio_priv_to_dev(pdev);
> +
> + iio_device_unregister(indio_dev);
> + free_irq(priv->irq, (void *)priv);
> + clk_disable_unprepare(priv->clk);
> +
> + return 0;
> +}
> +
> +static struct of_device_id mx25_gcq_ids[] = {
> + { .compatible = "fsl,imx25-gcq", },
> + { /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_gcq_driver = {
> + .driver = {
> + .name = "mx25-gcq",
> + .owner = THIS_MODULE,
> + .of_match_table = mx25_gcq_ids,
> + },
> + .probe = mx25_gcq_probe,
> + .remove = mx25_gcq_remove,
> +};
> +module_platform_driver(mx25_gcq_driver);
> +
> +MODULE_DESCRIPTION("ADC driver for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>");
> +MODULE_LICENSE("GPL v2");
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver
2014-06-21 10:51 ` Jonathan Cameron
@ 2014-06-23 16:43 ` Denis Carikli
2014-06-23 18:13 ` Jonathan Cameron
0 siblings, 1 reply; 12+ messages in thread
From: Denis Carikli @ 2014-06-23 16:43 UTC (permalink / raw)
To: Jonathan Cameron, Shawn Guo, Samuel Ortiz, Dmitry Torokhov,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer, linux-arm-kernel, Lee Jones,
linux-input, linux-iio, Lars-Peter Clausen, Markus Pargmann
On 06/21/2014 12:51 PM, Jonathan Cameron wrote:
>> +static irqreturn_t mx25_gcq_irq(int irq, void *data)
>> +{
>> + struct mx25_gcq_priv *priv = data;
>> + u32 stats;
> Not that much in here, but perhaps still makes sense for this to be a
> threaded
> irq?
What would be the advantage of converting it to be a threaded IRQ?
I guess that there will be no use of IRQF_SHARED and that only this
driver will have to handle the GCQ IRQ in the future.
Denis.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver
2014-06-23 16:43 ` Denis Carikli
@ 2014-06-23 18:13 ` Jonathan Cameron
0 siblings, 0 replies; 12+ messages in thread
From: Jonathan Cameron @ 2014-06-23 18:13 UTC (permalink / raw)
To: Denis Carikli, Shawn Guo, Samuel Ortiz, Dmitry Torokhov,
Fabio Estevam, Peter Meerwald, Hartmut Knaack
Cc: Eric Bénard, Sascha Hauer, linux-arm-kernel, Lee Jones,
linux-input, linux-iio, Lars-Peter Clausen, Markus Pargmann
On 23/06/14 17:43, Denis Carikli wrote:
> On 06/21/2014 12:51 PM, Jonathan Cameron wrote:
>>> +static irqreturn_t mx25_gcq_irq(int irq, void *data)
>>> +{
>>> + struct mx25_gcq_priv *priv = data;
>>> + u32 stats;
>> Not that much in here, but perhaps still makes sense for this to be a
>> threaded
>> irq?
> What would be the advantage of converting it to be a threaded IRQ?
>
> I guess that there will be no use of IRQF_SHARED and that only this driver will have to handle the GCQ IRQ in the future.
>
Fair enough. Was more of an idle thought that anything else!
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2014-06-23 18:11 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-06-16 9:28 [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver Denis Carikli
2014-06-16 9:28 ` [PATCH v3 2/6] input: touchscreen: imx25 tcq driver Denis Carikli
[not found] ` <1402910933-20534-1-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
2014-06-16 9:28 ` [PATCH v3 3/6] iio: adc: fsl,imx25-gcq driver Denis Carikli
[not found] ` <1402910933-20534-3-git-send-email-denis-fO0SIAKYzcbQT0dZR+AlfA@public.gmane.org>
2014-06-21 10:45 ` Jonathan Cameron
2014-06-21 10:51 ` Jonathan Cameron
2014-06-23 16:43 ` Denis Carikli
2014-06-23 18:13 ` Jonathan Cameron
2014-06-16 9:28 ` [PATCH v3 4/6] ARM: dts: imx25: Add TSC and ADC support Denis Carikli
2014-06-16 9:28 ` [PATCH v3 5/6] ARM: dts: imx25: mbimxsd25: Add touchscreen support Denis Carikli
2014-06-16 9:28 ` [PATCH v3 6/6] ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC support Denis Carikli
2014-06-16 11:26 ` [PATCH v3 1/6] mfd: fsl imx25 Touchscreen ADC driver Lee Jones
2014-06-16 15:55 ` Denis Carikli
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