From mboxrd@z Thu Jan 1 00:00:00 1970 From: Hans de Goede Subject: Re: [BUG] i2c-hid: ELAN Touchpad does not work on ASUS X580GD Date: Fri, 18 May 2018 15:09:29 +0200 Message-ID: <9e49fc42-75be-3bd5-dfa4-9cc61348d501@redhat.com> References: <7728da79-8a7a-b87d-d09c-b36978b3032e@linux.intel.com> <822d5f47cad46ca308d511f7f24cdbc5f4af38b9.camel@linux.intel.com> <9fd4cd99-5a4f-2d9e-88ba-18575e951490@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <9fd4cd99-5a4f-2d9e-88ba-18575e951490@linux.intel.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Jarkko Nikula , Andy Shevchenko , Chris Chiu Cc: Daniel Drake , Jian-Hong Pan , Jiri Kosina , Benjamin Tissoires , Jani Nikula , Dmitry Torokhov , Adrian Salido , Jason Gerecke , linux-input , Mika Westerberg , Wolfram Sang , linux-i2c@vger.kernel.org, Linux Kernel , Linux Upstreaming Team List-Id: linux-input@vger.kernel.org Hi, On 18-05-18 12:58, Jarkko Nikula wrote: > On 05/18/2018 01:20 PM, Andy Shevchenko wrote: >> On Fri, 2018-05-18 at 11:37 +0300, Andy Shevchenko wrote: >>> On Fri, 2018-05-18 at 09:48 +0200, Hans de Goede wrote: >>> >>> >>>> Could it be the i2c input clock definition in drivers/mfd/intel- >>>> lpss- >>>> pci.c >>>> is also wrong for Apollo Lake (N3450) ?  There are lots of people >>>> having >>>> various issues with i2c attached touchpads on Apollo Lake devices, >>>> this bug: >>>> https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1728244 >>>> >>>> Is sort of a collection bug for these. Various models laptops, lots >>>> of >>>> reporters. Note not sure thie is an i2c-designware issue, but it >>>> would >>>> be good to double check the input clock on Apollo Lake. >>>> >>>> I've checked the datasheet and the datasheet mentions 133MHz as >>>> "serial input clk" in the lpio_bxt_regs Registers Summary, which is >>>> also part of the LPSS, no clk is mentioned in the "Summary of >>>> DW_apb_i2c_mem_map_DW_apb_i2c_addr_block1 Registers". >>> >>> The internal datasheet we have access to mentioned in this case for >>> Broxton and Cannonlake together. So, your assumption might be quite >>> close to the truth and the issue is inherited from Broxton. >>> >> > Nope. The specification I have mention the I2C input clock in Broxton is fixed 133 MHz but in Cannon Lake it is derived through non-SW visible divider. > >> Hans, can your reporters try the following patch? Depending on the >> result I may send it out ASAP. >> >> --- a/drivers/mfd/intel-lpss-pci.c >> +++ b/drivers/mfd/intel-lpss-pci.c >> @@ -120,7 +120,7 @@ static struct property_entry apl_i2c_properties[] = >> { >>   }; >>   static const struct intel_lpss_platform_info apl_i2c_info = { >> -       .clk_rate = 133000000, >> +       .clk_rate = 216000000, >>          .properties = apl_i2c_properties, >>   }; >> > Nack. The Apollo Lake HW here shows expected I2C bus clock on oscilloscope so it is indeed clocked at 133 MHz. Ok, thank you for checking this. Regards, Hans