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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c10-20020a2e9d8a000000b002af03f75edasm2775171ljj.80.2023.05.30.02.36.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 May 2023 02:36:09 -0700 (PDT) Message-ID: Date: Tue, 30 May 2023 11:36:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH 2/2] Input: pm8941-powerkey - fix debounce on gen2+ PMICs Content-Language: en-US To: Caleb Connolly , Dmitry Torokhov , Andy Gross , Bjorn Andersson Cc: linux-input@vger.kernel.org, linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org References: <20230529-pm8941-pwrkey-debounce-v1-0-c043a6d5c814@linaro.org> <20230529-pm8941-pwrkey-debounce-v1-2-c043a6d5c814@linaro.org> From: Konrad Dybcio In-Reply-To: <20230529-pm8941-pwrkey-debounce-v1-2-c043a6d5c814@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On 29.05.2023 21:55, Caleb Connolly wrote: > Since PM8998/PM660, the power key debounce register was redefined to > support shorter debounce times. On PM8941 the shortest debounce time > (represented by register value 0) was 15625us, on PM8998 the shortest > debounce time is 62us, with the default being 2ms. > > Adjust the bit shift to correctly program debounce on PM8998 and newer. > > Fixes: 68c581d5e7d8 ("Input: add Qualcomm PM8941 power key driver") > Signed-off-by: Caleb Connolly > --- > This patch shouldn't be backported earlier then 5.4, as that is the > first kernel with support for PM8998. > --- > drivers/input/misc/pm8941-pwrkey.c | 19 +++++++++++++++---- > 1 file changed, 15 insertions(+), 4 deletions(-) > > diff --git a/drivers/input/misc/pm8941-pwrkey.c b/drivers/input/misc/pm8941-pwrkey.c > index b6a27ebae977..74d77d8aaeff 100644 > --- a/drivers/input/misc/pm8941-pwrkey.c > +++ b/drivers/input/misc/pm8941-pwrkey.c > @@ -50,7 +50,10 @@ > #define PON_RESIN_PULL_UP BIT(0) > > #define PON_DBC_CTL 0x71 > -#define PON_DBC_DELAY_MASK 0x7 > +#define PON_DBC_DELAY_MASK_GEN1 0x7 > +#define PON_DBC_DELAY_MASK_GEN2 0xf > +#define PON_DBC_SHIFT_GEN1 6 > +#define PON_DBC_SHIFT_GEN2 14 mask+shift -> field_prep/get? Nice find! Konrad > > struct pm8941_data { > unsigned int pull_up_bit; > @@ -247,7 +250,7 @@ static int pm8941_pwrkey_probe(struct platform_device *pdev) > struct device *parent; > struct device_node *regmap_node; > const __be32 *addr; > - u32 req_delay; > + u32 req_delay, mask, delay_shift; > int error; > > if (of_property_read_u32(pdev->dev.of_node, "debounce", &req_delay)) > @@ -336,12 +339,20 @@ static int pm8941_pwrkey_probe(struct platform_device *pdev) > pwrkey->input->phys = pwrkey->data->phys; > > if (pwrkey->data->supports_debounce_config) { > - req_delay = (req_delay << 6) / USEC_PER_SEC; > + if (pwrkey->subtype >= PON_SUBTYPE_GEN2_PRIMARY) { > + mask = PON_DBC_DELAY_MASK_GEN2; > + delay_shift = PON_DBC_SHIFT_GEN2; > + } else { > + mask = PON_DBC_DELAY_MASK_GEN1; > + delay_shift = PON_DBC_SHIFT_GEN1; > + } > + > + req_delay = (req_delay << delay_shift) / USEC_PER_SEC; > req_delay = ilog2(req_delay); > > error = regmap_update_bits(pwrkey->regmap, > pwrkey->baseaddr + PON_DBC_CTL, > - PON_DBC_DELAY_MASK, > + mask, > req_delay); > if (error) { > dev_err(&pdev->dev, "failed to set debounce: %d\n", >