* [PATCH v2 7/8] ARM: sun7i: dt: Add AXP209 support to various boards
From: Carlo Caione @ 2014-03-15 15:43 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
hdegoede-H+wXaHxf7aLQT0dZR+AlfA, emilio-0Z03zUJReD5OxF6Tv1QG9Q,
wens-jdAy2FN1RRM, sameo-VuQAYsv1563Yd54FQh9/CA,
lee.jones-QSEj5FYQhm4dnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, broonie-DgEjT+Ai2ygdnm+yROfE0A
Cc: Carlo Caione
In-Reply-To: <1394898225-28452-1-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
---
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 12 ++++++++++++
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 13 +++++++++++++
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 12 ++++++++++++
3 files changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 5c51cb8..9ad7da5 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -53,6 +53,18 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ axp: axp20x@34 {
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 8>;
+
+ axp,system-power-controller;
+
+ /include/ "x-powers-axp209.dtsi"
+ };
};
i2c1: i2c@01c2b000 {
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index f9dcb61..aab77f9 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -38,6 +38,19 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ axp: axp20x@34 {
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 8>;
+
+ axp,system-power-controller;
+
+ /include/ "x-powers-axp209.dtsi"
+ };
+
};
i2c1: i2c@01c2b000 {
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index ead3013..a5fe5d0 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -65,6 +65,18 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ axp: axp20x@34 {
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 8>;
+
+ axp,system-power-controller;
+
+ /include/ "x-powers-axp209.dtsi"
+ };
};
i2c1: i2c@01c2b000 {
--
1.8.3.2
^ permalink raw reply related
* [PATCH v2 8/8] ARM: sunxi: Add AXP20x support in defconfig
From: Carlo Caione @ 2014-03-15 15:43 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
hdegoede-H+wXaHxf7aLQT0dZR+AlfA, emilio-0Z03zUJReD5OxF6Tv1QG9Q,
wens-jdAy2FN1RRM, sameo-VuQAYsv1563Yd54FQh9/CA,
lee.jones-QSEj5FYQhm4dnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, broonie-DgEjT+Ai2ygdnm+yROfE0A
Cc: Carlo Caione
In-Reply-To: <1394898225-28452-1-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
Signed-off-by: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
---
arch/arm/configs/sunxi_defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 3e2259b..0cef101 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -39,6 +39,8 @@ CONFIG_SUN4I_EMAC=y
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_WLAN is not set
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_AXP20X_PEK=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=8
@@ -52,6 +54,7 @@ CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=y
+CONFIG_MFD_AXP20X=y
# CONFIG_USB_SUPPORT is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
@@ -66,3 +69,4 @@ CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS=y
CONFIG_PRINTK_TIME=y
+CONFIG_REGULATOR_AXP20X=y
--
1.8.3.2
^ permalink raw reply related
* Re: [PATCH v2 7/8] ARM: sun7i: dt: Add AXP209 support to various boards
From: Hans de Goede @ 2014-03-15 15:45 UTC (permalink / raw)
To: Carlo Caione, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
emilio-0Z03zUJReD5OxF6Tv1QG9Q, wens-jdAy2FN1RRM,
sameo-VuQAYsv1563Yd54FQh9/CA, lee.jones-QSEj5FYQhm4dnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, broonie-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <1394898225-28452-8-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
Hi,
Thanks for your continued work on this.
On 03/15/2014 04:43 PM, Carlo Caione wrote:
> Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
> ---
> arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 12 ++++++++++++
> arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 13 +++++++++++++
> arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 12 ++++++++++++
> 3 files changed, 37 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
> index 5c51cb8..9ad7da5 100644
> --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
> @@ -53,6 +53,18 @@
> pinctrl-names = "default";
> pinctrl-0 = <&i2c0_pins_a>;
> status = "okay";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + axp: axp20x@34 {
> + reg = <0x34>;
> + interrupt-parent = <&nmi_intc>;
> + interrupts = <0 8>;
> +
> + axp,system-power-controller;
Shouldn't this be dropped now (all 3 of them) ?
Regards,
Hans
> +
> + /include/ "x-powers-axp209.dtsi"
> + };
> };
>
> i2c1: i2c@01c2b000 {
> diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
> index f9dcb61..aab77f9 100644
> --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
> @@ -38,6 +38,19 @@
> pinctrl-names = "default";
> pinctrl-0 = <&i2c0_pins_a>;
> status = "okay";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + axp: axp20x@34 {
> + reg = <0x34>;
> + interrupt-parent = <&nmi_intc>;
> + interrupts = <0 8>;
> +
> + axp,system-power-controller;
> +
> + /include/ "x-powers-axp209.dtsi"
> + };
> +
> };
>
> i2c1: i2c@01c2b000 {
> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> index ead3013..a5fe5d0 100644
> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> @@ -65,6 +65,18 @@
> pinctrl-names = "default";
> pinctrl-0 = <&i2c0_pins_a>;
> status = "okay";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + axp: axp20x@34 {
> + reg = <0x34>;
> + interrupt-parent = <&nmi_intc>;
> + interrupts = <0 8>;
> +
> + axp,system-power-controller;
> +
> + /include/ "x-powers-axp209.dtsi"
> + };
> };
>
> i2c1: i2c@01c2b000 {
>
^ permalink raw reply
* Re: [PATCH v2 7/8] ARM: sun7i: dt: Add AXP209 support to various boards
From: Carlo Caione @ 2014-03-15 15:48 UTC (permalink / raw)
To: Hans de Goede
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
emilio-0Z03zUJReD5OxF6Tv1QG9Q, wens-jdAy2FN1RRM,
sameo-VuQAYsv1563Yd54FQh9/CA, lee.jones-QSEj5FYQhm4dnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
lgirdwood-Re5JQEeQqe8AvxtiuMwx3w, broonie-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <53247584.8060701-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
On Sat, Mar 15, 2014 at 04:45:08PM +0100, Hans de Goede wrote:
> Hi,
>
> Thanks for your continued work on this.
>
> On 03/15/2014 04:43 PM, Carlo Caione wrote:
> > Signed-off-by: Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> > Signed-off-by: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
> > ---
> > arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 12 ++++++++++++
> > arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 13 +++++++++++++
> > arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 12 ++++++++++++
> > 3 files changed, 37 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
> > index 5c51cb8..9ad7da5 100644
> > --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
> > +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
> > @@ -53,6 +53,18 @@
> > pinctrl-names = "default";
> > pinctrl-0 = <&i2c0_pins_a>;
> > status = "okay";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + axp: axp20x@34 {
> > + reg = <0x34>;
> > + interrupt-parent = <&nmi_intc>;
> > + interrupts = <0 8>;
> > +
> > + axp,system-power-controller;
>
> Shouldn't this be dropped now (all 3 of them) ?
Damn! Thank you for spotting it.
Fix coming.
Thanks,
--
Carlo Caione
^ permalink raw reply
* Bug: Three finger tap on Magic Trackpad blocks the device
From: Tom Beckmann @ 2014-03-15 16:26 UTC (permalink / raw)
To: linux-input
[1.] One line summary of the problem:
Apple Magic Trackpad: Three Finger Tap gets sent repeatedly
[2.] Full description of the problem/report:
When using my Magic Trackpad with up to two fingers all works fine,
like scrolling and right clicking. As soon as I barely touch the pad
with three fingers, it becomes unresponsive for around 20 seconds.
Checking evtest, the same event is sent all the time, blocking all
others.
evtest output after touching with three fingers:
Event: time 1393156544.500256, -------------- SYN_REPORT ------------
Event: time 1393156546.784405, type 3 (EV_ABS), code 47 (ABS_MT_SLOT), value 8
Event: time 1393156546.784405, type 3 (EV_ABS), code 57
(ABS_MT_TRACKING_ID), value 16
Event: time 1393156546.784405, type 3 (EV_ABS), code 48
(ABS_MT_TOUCH_MAJOR), value 108
Event: time 1393156546.784405, type 3 (EV_ABS), code 49
(ABS_MT_TOUCH_MINOR), value 120
Event: time 1393156546.784405, type 3 (EV_ABS), code 53
(ABS_MT_POSITION_X), value 2004
Event: time 1393156546.784405, type 3 (EV_ABS), code 54
(ABS_MT_POSITION_Y), value -460
Event: time 1393156546.784405, type 3 (EV_ABS), code 47 (ABS_MT_SLOT), value 9
Event: time 1393156546.784405, type 3 (EV_ABS), code 57
(ABS_MT_TRACKING_ID), value 17
Event: time 1393156546.784405, type 3 (EV_ABS), code 48
(ABS_MT_TOUCH_MAJOR), value 56
Event: time 1393156546.784405, type 3 (EV_ABS), code 49
(ABS_MT_TOUCH_MINOR), value 84
Event: time 1393156546.784405, type 3 (EV_ABS), code 53
(ABS_MT_POSITION_X), value -430
Event: time 1393156546.784405, type 3 (EV_ABS), code 54
(ABS_MT_POSITION_Y), value -785
Event: time 1393156546.784405, type 3 (EV_ABS), code 47 (ABS_MT_SLOT), value 10
Event: time 1393156546.784405, type 3 (EV_ABS), code 57
(ABS_MT_TRACKING_ID), value 18
Event: time 1393156546.784405, type 3 (EV_ABS), code 48
(ABS_MT_TOUCH_MAJOR), value 184
Event: time 1393156546.784405, type 3 (EV_ABS), code 49
(ABS_MT_TOUCH_MINOR), value 124
Event: time 1393156546.784405, type 3 (EV_ABS), code 53
(ABS_MT_POSITION_X), value 1040
Event: time 1393156546.784405, type 3 (EV_ABS), code 54
(ABS_MT_POSITION_Y), value -1008
Event: time 1393156546.784405, type 1 (EV_KEY), code 330 (BTN_TOUCH), value 1
Event: time 1393156546.784405, type 1 (EV_KEY), code 334
(BTN_TOOL_TRIPLETAP), value 1
Event: time 1393156546.784405, type 3 (EV_ABS), code 0 (ABS_X), value 2004
Event: time 1393156546.784405, type 3 (EV_ABS), code 1 (ABS_Y), value -460
Event: time 1393156546.784405, -------------- SYN_REPORT ------------
Event: time 1393156547.032985, type 1 (EV_KEY), code 334
(BTN_TOOL_TRIPLETAP), value 2
Event: time 1393156547.032985, -------------- SYN_REPORT ------------
Event: time 1393156547.068988, type 1 (EV_KEY), code 334
(BTN_TOOL_TRIPLETAP), value 2
Event: time 1393156547.068988, -------------- SYN_REPORT ------------
Event: time 1393156547.104987, type 1 (EV_KEY), code 334
(BTN_TOOL_TRIPLETAP), value 2
[...]
The last two rows are repeated until it eventually becomes responsive again.
[3.] Keywords:
input, multitouch, magic trackpad, hid, bluetooth
[4.] Kernel version (from /proc/version):
Linux version 3.14.0-1-mainline (tom@tomlaeptop) (gcc version 4.8.2
20140206 (prerelease) (GCC) ) #3 SMP PREEMPT Sat Mar 15 17:22:55 CET
2014 (which is 3.14-rc6)
[5.] Output of Oops.. message
none
[6.] A small shell script or example program which triggers the
problem
Just tapping it with three fingers worked for me on different machines.
[7.] Environment
[7.1.] Software:
% sh scripts/ver_linux
Linux tomlaeptop 3.14.0-1-mainline #3 SMP PREEMPT Sat Mar 15 17:22:55
CET 2014 x86_64 GNU/Linux
Gnu C 4.8.2
Gnu make 4.0
binutils 2.24
util-linux 2.24.1
mount assert
module-init-tools 16
e2fsprogs 1.42.9
jfsutils 1.1.15
reiserfsprogs 3.6.24
xfsprogs 3.1.11
pcmciautils 018
PPP 2.4.6
Linux C Library 2.19
Dynamic linker (ldd) 2.19
Linux C++ Library 6.0.19
Procps 3.3.9
Kbd 2.0.1
Sh-utils 8.22
Modules Loaded hid_magicmouse hidp ctr ccm fuse bnep arc4
snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic ath9k
joydev uvcvideo ath9k_common nouveau videobuf2_vmalloc
videobuf2_memops videobuf2_core ath9k_hw mousedev btusb ttm intel_rapl
x86_pkg_temp_thermal ath videodev mac80211 bluetooth 6lowpan_iphc
snd_hda_intel snd_hda_codec cfg80211 intel_powerclamp media mxm_wmi
i915 atl1c asus_nb_wmi coretemp asus_wmi snd_hwdep drm_kms_helper
kvm_intel sparse_keymap iTCO_wdt snd_pcm rfkill iTCO_vendor_support
snd_timer snd soundcore psmouse drm kvm intel_gtt i2c_algo_bit lpc_ich
shpchp mei_me mei crct10dif_pclmul crc32_pclmul i2c_i801 i2c_core
crc32c_intel evdev thermal ghash_clmulni_intel serio_raw cryptd button
wmi video battery processor pcspkr microcode ac hid_logitech_dj usbhid
hid ext4 crc16 mbcache jbd2 sd_mod sr_mod crc_t10dif cdrom
crct10dif_common atkbd libps2 ahci libahci libata ehci_pci xhci_hcd
ehci_hcd scsi_mod usbcore usb_common i8042 serio
[7.2.] Processor information (from /proc/cpuinfo):
% cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 1
cpu cores : 4
apicid : 2
initial apicid : 2
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 2
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 2
cpu cores : 4
apicid : 4
initial apicid : 4
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 3
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 3
cpu cores : 4
apicid : 6
initial apicid : 6
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 4
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 0
cpu cores : 4
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 5
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 1
cpu cores : 4
apicid : 3
initial apicid : 3
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 6
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 2
cpu cores : 4
apicid : 5
initial apicid : 5
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 7
vendor_id : GenuineIntel
cpu family : 6
model : 42
model name : Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz
stepping : 7
microcode : 0x14
cpu MHz : 801.250
cache size : 6144 KB
physical id : 0
siblings : 8
core id : 3
cpu cores : 4
apicid : 7
initial apicid : 7
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl
vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt
tsc_deadline_timer xsave avx lahf_lm ida arat epb xsaveopt pln pts
dtherm tpr_shadow vnmi flexpriority ept vpid
bogomips : 3992.11
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
[7.3.] Module information (from /proc/modules):
hid_magicmouse 3737 0 - Live 0xffffffffa006a000
hidp 17190 1 - Live 0xffffffffa0060000
ctr 3831 1 - Live 0xffffffffa0012000
ccm 7830 1 - Live 0xffffffffa0004000
fuse 77100 3 - Live 0xffffffffa004a000
bnep 12957 2 - Live 0xffffffffa04a8000
arc4 2000 2 - Live 0xffffffffa0366000
snd_hda_codec_hdmi 36172 1 - Live 0xffffffffa0580000
snd_hda_codec_realtek 46356 1 - Live 0xffffffffa0504000
snd_hda_codec_generic 52731 1 snd_hda_codec_realtek, Live 0xffffffffa04e2000
ath9k 91269 0 - Live 0xffffffffa0517000
joydev 9631 0 - Live 0xffffffffa04a1000
uvcvideo 72580 0 - Live 0xffffffffa04c0000
ath9k_common 1874 1 ath9k, Live 0xffffffffa0220000
nouveau 1081560 0 - Live 0xffffffffa078a000
videobuf2_vmalloc 3304 1 uvcvideo, Live 0xffffffffa01d1000
videobuf2_memops 2335 1 videobuf2_vmalloc, Live 0xffffffffa001a000
videobuf2_core 29255 1 uvcvideo, Live 0xffffffffa0488000
ath9k_hw 388208 2 ath9k,ath9k_common, Live 0xffffffffa072a000
mousedev 10247 0 - Live 0xffffffffa03c9000
btusb 20104 0 - Live 0xffffffffa0449000
ttm 65416 1 nouveau, Live 0xffffffffa037f000
intel_rapl 11712 0 - Live 0xffffffffa035c000
x86_pkg_temp_thermal 6991 0 - Live 0xffffffffa0114000
ath 19259 3 ath9k,ath9k_common,ath9k_hw, Live 0xffffffffa0168000
videodev 122731 2 uvcvideo,videobuf2_core, Live 0xffffffffa02ec000
mac80211 489393 1 ath9k, Live 0xffffffffa06b1000
bluetooth 341041 28 hidp,bnep,btusb, Live 0xffffffffa0607000
6lowpan_iphc 11204 1 bluetooth, Live 0xffffffffa010a000
snd_hda_intel 37640 3 - Live 0xffffffffa00d6000
snd_hda_codec 99359 4
snd_hda_codec_hdmi,snd_hda_codec_realtek,snd_hda_codec_generic,snd_hda_intel,
Live 0xffffffffa00ac000
cfg80211 430526 3 ath9k,ath,mac80211, Live 0xffffffffa03d8000
intel_powerclamp 9122 0 - Live 0xffffffffa0014000
media 12071 2 uvcvideo,videodev, Live 0xffffffffa000c000
mxm_wmi 1467 1 nouveau, Live 0xffffffffa0d88000
i915 736554 4 - Live 0xffffffffa0cad000
atl1c 36834 0 - Live 0xffffffffa0c9f000
asus_nb_wmi 7368 0 - Live 0xffffffffa0c9a000
coretemp 6390 0 - Live 0xffffffffa0c70000
asus_wmi 15869 1 asus_nb_wmi, Live 0xffffffffa0c62000
snd_hwdep 6204 1 snd_hda_codec, Live 0xffffffffa0c5c000
drm_kms_helper 35540 2 nouveau,i915, Live 0xffffffffa0c4c000
kvm_intel 132876 0 - Live 0xffffffffa0b48000
sparse_keymap 3146 1 asus_wmi, Live 0xffffffffa0b00000
iTCO_wdt 5407 0 - Live 0xffffffffa0afb000
snd_pcm 80987 3 snd_hda_codec_hdmi,snd_hda_intel,snd_hda_codec, Live
0xffffffffa0adc000
rfkill 15651 7 bluetooth,cfg80211,asus_wmi, Live 0xffffffffa0ad3000
iTCO_vendor_support 1929 1 iTCO_wdt, Live 0xffffffffa0acf000
snd_timer 18654 1 snd_pcm, Live 0xffffffffa0ac5000
snd 58742 14 snd_hda_codec_hdmi,snd_hda_codec_realtek,snd_hda_codec_generic,snd_hda_intel,snd_hda_codec,snd_hwdep,snd_pcm,snd_timer,
Live 0xffffffffa0aac000
soundcore 5386 1 snd, Live 0xffffffffa0aa6000
psmouse 88646 0 - Live 0xffffffffa0a2a000
drm 237627 7 nouveau,ttm,i915,drm_kms_helper, Live 0xffffffffa094d000
kvm 404108 1 kvm_intel, Live 0xffffffffa05a3000
intel_gtt 12536 1 i915, Live 0xffffffffa059b000
i2c_algo_bit 5391 2 nouveau,i915, Live 0xffffffffa0596000
lpc_ich 13368 0 - Live 0xffffffffa058d000
shpchp 25393 0 - Live 0xffffffffa0551000
mei_me 9456 0 - Live 0xffffffffa054a000
mei 64454 1 mei_me, Live 0xffffffffa0532000
crct10dif_pclmul 4682 0 - Live 0xffffffffa0514000
crc32_pclmul 2923 0 - Live 0xffffffffa04fc000
i2c_i801 11173 0 - Live 0xffffffffa04f5000
i2c_core 24248 7
nouveau,videodev,i915,drm_kms_helper,drm,i2c_algo_bit,i2c_i801, Live
0xffffffffa04db000
crc32c_intel 14185 0 - Live 0xffffffffa04bb000
evdev 10949 16 - Live 0xffffffffa04b4000
thermal 8556 0 - Live 0xffffffffa04ad000
ghash_clmulni_intel 4405 0 - Live 0xffffffffa049e000
serio_raw 5009 0 - Live 0xffffffffa0499000
cryptd 8377 1 ghash_clmulni_intel, Live 0xffffffffa0484000
button 4477 2 nouveau,i915, Live 0xffffffffa0472000
wmi 8059 3 nouveau,mxm_wmi,asus_wmi, Live 0xffffffffa046c000
video 11713 3 nouveau,i915,asus_wmi, Live 0xffffffffa0463000
battery 7565 0 - Live 0xffffffffa045d000
processor 24321 0 - Live 0xffffffffa03d1000
pcspkr 2027 0 - Live 0xffffffffa03cd000
microcode 16773 0 - Live 0xffffffffa03b2000
ac 3334 0 - Live 0xffffffffa03ae000
hid_logitech_dj 10567 0 - Live 0xffffffffa039d000
usbhid 40577 0 - Live 0xffffffffa0369000
hid 91062 5 hid_magicmouse,hidp,hid_logitech_dj,usbhid, Live 0xffffffffa030f000
ext4 481870 1 - Live 0xffffffffa0275000
crc16 1359 2 bluetooth,ext4, Live 0xffffffffa0271000
mbcache 6074 1 ext4, Live 0xffffffffa026b000
jbd2 82672 1 ext4, Live 0xffffffffa024a000
sd_mod 36658 2 - Live 0xffffffffa022e000
sr_mod 14450 0 - Live 0xffffffffa0222000
crc_t10dif 1039 1 sd_mod, Live 0xffffffffa021e000
cdrom 33888 1 sr_mod, Live 0xffffffffa0210000
crct10dif_common 1372 2 crct10dif_pclmul,crc_t10dif, Live 0xffffffffa020c000
atkbd 16806 0 - Live 0xffffffffa01e5000
libps2 4187 2 psmouse,atkbd, Live 0xffffffffa01d3000
ahci 23499 1 - Live 0xffffffffa01c7000
libahci 21484 1 ahci, Live 0xffffffffa01bb000
libata 171784 2 ahci,libahci, Live 0xffffffffa017a000
ehci_pci 3928 0 - Live 0xffffffffa0172000
xhci_hcd 145277 0 - Live 0xffffffffa0143000
ehci_hcd 64043 1 ehci_pci, Live 0xffffffffa0117000
scsi_mod 133920 3 sd_mod,sr_mod,libata, Live 0xffffffffa00e2000
usbcore 180947 6 uvcvideo,btusb,usbhid,ehci_pci,xhci_hcd,ehci_hcd,
Live 0xffffffffa001c000
usb_common 1648 1 usbcore, Live 0xffffffffa0018000
i8042 12950 1 libps2, Live 0xffffffffa0007000
serio 10721 9 psmouse,serio_raw,atkbd,i8042, Live 0xffffffffa0000000
[7.4.] Loaded driver and hardware information (/proc/ioports, /proc/iomem)
% cat /proc/ioports
0000-0cf7 : PCI Bus 0000:00
0000-001f : dma1
0020-0021 : pic1
0040-0043 : timer0
0050-0053 : timer1
0060-0060 : keyboard
0062-0062 : EC data
0064-0064 : keyboard
0066-0066 : EC cmd
0070-0077 : rtc0
0080-008f : dma page reg
00a0-00a1 : pic2
00c0-00df : dma2
00f0-00ff : fpu
03c0-03df : vga+
0400-0403 : ACPI PM1a_EVT_BLK
0404-0405 : ACPI PM1a_CNT_BLK
0408-040b : ACPI PM_TMR
0410-0415 : ACPI CPU throttle
0420-042f : ACPI GPE0_BLK
0430-0433 : iTCO_wdt
0430-0433 : iTCO_wdt
0450-0450 : ACPI PM2_CNT_BLK
0454-0457 : pnp 00:06
0458-047f : pnp 00:04
0460-047f : iTCO_wdt
0460-047f : iTCO_wdt
0500-057f : pnp 00:04
0680-069f : pnp 00:04
0cf8-0cff : PCI conf1
0d00-ffff : PCI Bus 0000:00
1000-100f : pnp 00:04
164e-164f : pnp 00:04
9000-9fff : PCI Bus 0000:05
9000-907f : 0000:05:00.0
9000-907f : atl1c
a000-afff : PCI Bus 0000:04
b000-bfff : PCI Bus 0000:03
c000-cfff : PCI Bus 0000:02
d000-dfff : PCI Bus 0000:01
d000-d07f : 0000:01:00.0
e000-e03f : 0000:00:02.0
e040-e05f : 0000:00:1f.3
e060-e07f : 0000:00:1f.2
e060-e07f : ahci
e080-e083 : 0000:00:1f.2
e080-e083 : ahci
e090-e097 : 0000:00:1f.2
e090-e097 : ahci
e0a0-e0a3 : 0000:00:1f.2
e0a0-e0a3 : ahci
e0b0-e0b7 : 0000:00:1f.2
e0b0-e0b7 : ahci
ffff-ffff : pnp 00:04
ffff-ffff : pnp 00:04
% cat /proc/iomem
00000000-00000fff : reserved
00001000-0009e7ff : System RAM
0009e800-0009ffff : reserved
000a0000-000bffff : PCI Bus 0000:00
000c0000-000cedff : Video ROM
000d0000-000d3fff : PCI Bus 0000:00
000d4000-000d7fff : PCI Bus 0000:00
000d8000-000dbfff : PCI Bus 0000:00
000dc000-000dffff : PCI Bus 0000:00
000e0000-000fffff : reserved
000e0000-000e3fff : PCI Bus 0000:00
000e4000-000e7fff : PCI Bus 0000:00
000f0000-000fffff : System ROM
00100000-1fffffff : System RAM
01000000-0153b668 : Kernel code
0153b669-018d33ff : Kernel data
019f8000-01b41fff : Kernel bss
20000000-201fffff : reserved
20000000-201fffff : pnp 00:0b
20200000-3fffffff : System RAM
40000000-401fffff : reserved
40000000-401fffff : pnp 00:0b
40200000-aabd0fff : System RAM
aabd1000-aace3fff : reserved
aace4000-aace5fff : System RAM
aace6000-aacf8fff : reserved
aacf9000-aacf9fff : System RAM
aacfa000-aad8dfff : reserved
aad8e000-aad8efff : System RAM
aad8f000-aadb7fff : reserved
aadb8000-aadc7fff : System RAM
aadc8000-aade7fff : reserved
aade8000-aaf18fff : System RAM
aaf19000-aafe7fff : ACPI Non-volatile Storage
aafe8000-aaffcfff : System RAM
aaffd000-aaffffff : ACPI Tables
ab000000-af9fffff : reserved
aba00000-af9fffff : Graphics Stolen Memory
afa00000-feafffff : PCI Bus 0000:00
afa00000-afa00fff : pnp 00:09
afa00000-afa00fff : pnp 00:0a
b0000000-bfffffff : 0000:00:02.0
c0000000-d1ffffff : PCI Bus 0000:01
c0000000-cfffffff : 0000:01:00.0
d0000000-d1ffffff : 0000:01:00.0
d2100000-d2afffff : PCI Bus 0000:05
d2c00000-d35fffff : PCI Bus 0000:04
d3700000-d40fffff : PCI Bus 0000:03
d4200000-d4bfffff : PCI Bus 0000:02
db000000-dc0fffff : PCI Bus 0000:01
db000000-dbffffff : 0000:01:00.0
dc000000-dc07ffff : 0000:01:00.0
dc400000-dc7fffff : 0000:00:02.0
dc800000-dd1fffff : PCI Bus 0000:05
dc800000-dc83ffff : 0000:05:00.0
dc800000-dc83ffff : atl1c
dd200000-ddbfffff : PCI Bus 0000:04
dd200000-dd20ffff : 0000:04:00.0
dd200000-dd20ffff : xhci_hcd
ddc00000-de5fffff : PCI Bus 0000:03
ddc00000-ddc0ffff : 0000:03:00.0
ddc00000-ddc0ffff : ath9k
de600000-deffffff : PCI Bus 0000:02
df000000-df003fff : 0000:00:1b.0
df000000-df003fff : ICH HD audio
df005000-df0050ff : 0000:00:1f.3
df006000-df0067ff : 0000:00:1f.2
df006000-df0067ff : ahci
df007000-df0073ff : 0000:00:1d.0
df007000-df0073ff : ehci_hcd
df008000-df0083ff : 0000:00:1a.0
df008000-df0083ff : ehci_hcd
df00a000-df00a00f : 0000:00:16.0
df00a000-df00a00f : mei_me
e0000000-e3ffffff : PCI MMCONFIG 0000 [bus 00-3f]
e0000000-e3ffffff : reserved
e0000000-e3ffffff : pnp 00:09
fec00000-fec00fff : reserved
fec00000-fec003ff : IOAPIC 0
fed00000-fed003ff : HPET 0
fed10000-fed13fff : reserved
fed18000-fed19fff : reserved
fed18000-fed18fff : pnp 00:09
fed19000-fed19fff : pnp 00:09
fed1c000-fed1ffff : reserved
fed1c000-fed1ffff : pnp 00:09
fed1f410-fed1f414 : iTCO_wdt
fed1f410-fed1f414 : iTCO_wdt
fed20000-fed3ffff : pnp 00:09
fed40000-fed44fff : PCI Bus 0000:00
fed45000-fed8ffff : pnp 00:09
fed90000-fed93fff : pnp 00:09
fee00000-fee00fff : Local APIC
fee00000-fee00fff : reserved
ff980000-ffbfffff : reserved
ffd80000-ffffffff : reserved
100000000-34fdfffff : System RAM
34fe00000-34fffffff : RAM buffer
[7.5.] PCI information ('lspci -vvv' as root)
00:00.0 Host bridge: Intel Corporation 2nd Generation Core Processor
Family DRAM Controller (rev 09)
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort+ <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information: Len=0c <?>
00:01.0 PCI bridge: Intel Corporation Xeon E3-1200/2nd Generation Core
Processor Family PCI Express Root Port (rev 09) (prog-if 00 [Normal
decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: db000000-dc0fffff
Prefetchable memory behind bridge: 00000000c0000000-00000000d1ffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [88] Subsystem: ASUSTeK Computer Inc. Device 11d7
Capabilities: [80] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4071
Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s
<256ns, L1 <4us
ClockPM- Surprise- LLActRep- BwNot+
LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive-
BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #1, PowerLimit 75.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR+, OBFF
Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF
Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [140 v1] Root Complex Link
Desc: PortNumber=02 ComponentID=01 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=01 AssocRCRB-
LinkType=MemMapped LinkValid+
Addr: 00000000fed19000
Kernel driver in use: pcieport
Kernel modules: shpchp
00:02.0 VGA compatible controller: Intel Corporation 2nd Generation
Core Processor Family Integrated Graphics Controller (rev 09) (prog-if
00 [VGA controller])
Subsystem: ASUSTeK Computer Inc. Device 15e2
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 43
Region 0: Memory at dc400000 (64-bit, non-prefetchable) [size=4M]
Region 2: Memory at b0000000 (64-bit, prefetchable) [size=256M]
Region 4: I/O ports at e000 [size=64]
Expansion ROM at <unassigned> [disabled]
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 40c1
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a4] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: i915
Kernel modules: i915
00:16.0 Communication controller: Intel Corporation 6 Series/C200
Series Chipset Family MEI Controller #1 (rev 04)
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 42
Region 0: Memory at df00a000 (64-bit, non-prefetchable) [size=16]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 40b1
Kernel driver in use: mei_me
Kernel modules: mei_me
00:1a.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset
Family USB Enhanced Host Controller #2 (rev 05) (prog-if 20 [EHCI])
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at df008000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
Kernel modules: ehci_pci
00:1b.0 Audio device: Intel Corporation 6 Series/C200 Series Chipset
Family High Definition Audio Controller (rev 05)
Subsystem: ASUSTeK Computer Inc. Device 1a33
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 44
Region 0: Memory at df000000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 40e1
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
Status: NegoPending- InProgress-
VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=22
Status: NegoPending- InProgress-
Capabilities: [130 v1] Root Complex Link
Desc: PortNumber=0f ComponentID=00 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB-
LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: snd_hda_intel
Kernel modules: snd_hda_intel
00:1c.0 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset
Family PCI Express Root Port 1 (rev b5) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 0000c000-0000cfff
Memory behind bridge: de600000-deffffff
Prefetchable memory behind bridge: 00000000d4200000-00000000d4bfffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s
<1us, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive-
BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #0, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not
Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF
Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 11d7
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.1 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset
Family PCI Express Root Port 2 (rev b5) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000b000-0000bfff
Memory behind bridge: ddc00000-de5fffff
Prefetchable memory behind bridge: 00000000d3700000-00000000d40fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s
<512ns, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+
BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #1, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not
Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF
Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 11d7
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.3 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset
Family PCI Express Root Port 4 (rev b5) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 0000a000-0000afff
Memory behind bridge: dd200000-ddbfffff
Prefetchable memory behind bridge: 00000000d2c00000-00000000d35fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #4, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s
<512ns, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+
BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #3, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not
Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF
Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 11d7
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1c.5 PCI bridge: Intel Corporation 6 Series/C200 Series Chipset
Family PCI Express Root Port 6 (rev b5) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
I/O behind bridge: 00009000-00009fff
Memory behind bridge: dc800000-dd1fffff
Prefetchable memory behind bridge: 00000000d2100000-00000000d2afffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #6, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s
<512ns, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+
BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #5, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not
Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF
Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 11d7
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
Kernel modules: shpchp
00:1d.0 USB controller: Intel Corporation 6 Series/C200 Series Chipset
Family USB Enhanced Host Controller #1 (rev 05) (prog-if 20 [EHCI])
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at df007000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
Kernel modules: ehci_pci
00:1f.0 ISA bridge: Intel Corporation HM65 Express Chipset Family LPC
Controller (rev 05)
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information: Len=0c <?>
Kernel driver in use: lpc_ich
Kernel modules: lpc_ich
00:1f.2 SATA controller: Intel Corporation 6 Series/C200 Series
Chipset Family 6 port SATA AHCI Controller (rev 05) (prog-if 01 [AHCI
1.0])
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 41
Region 0: I/O ports at e0b0 [size=8]
Region 1: I/O ports at e0a0 [size=4]
Region 2: I/O ports at e090 [size=8]
Region 3: I/O ports at e080 [size=4]
Region 4: I/O ports at e060 [size=32]
Region 5: Memory at df006000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee00000 Data: 4091
Capabilities: [70] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004
Capabilities: [b0] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ahci
Kernel modules: ahci
00:1f.3 SMBus: Intel Corporation 6 Series/C200 Series Chipset Family
SMBus Controller (rev 05)
Subsystem: ASUSTeK Computer Inc. Device 11d7
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 18
Region 0: Memory at df005000 (64-bit, non-prefetchable) [size=256]
Region 4: I/O ports at e040 [size=32]
Kernel modules: i2c_i801
01:00.0 VGA compatible controller: NVIDIA Corporation GF108M [GeForce
GT 540M] (rev a1) (prog-if 00 [VGA controller])
Subsystem: ASUSTeK Computer Inc. Device 15e2
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 45
Region 0: Memory at db000000 (32-bit, non-prefetchable) [size=16M]
Region 1: Memory at c0000000 (64-bit, prefetchable) [size=256M]
Region 3: Memory at d0000000 (64-bit, prefetchable) [size=32M]
Region 5: I/O ports at d000 [size=128]
Expansion ROM at dc000000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4022
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s
<256ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L1 Enabled; RCB 128 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive-
BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF
Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b4] Vendor Specific Information: Len=14 <?>
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [128 v1] Power Budgeting <?>
Capabilities: [600 v1] Vendor Specific Information: ID=0001 Rev=1 Len=024 <?>
Kernel driver in use: nouveau
Kernel modules: nouveau
03:00.0 Network controller: Qualcomm Atheros AR9285 Wireless Network
Adapter (PCI-Express) (rev 01)
Subsystem: AzureWave AW-NB037H 802.11bgn Wireless Half-size Mini PCIe
Card [AR9002WB-1NGCD]
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 17
Region 0: Memory at ddc00000 (64-bit, non-prefetchable) [size=64K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency
L0s <512ns, L1 <64us
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive-
BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF
Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-,
EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF-
MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF-
MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+
MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [140 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [160 v1] Device Serial Number 00-15-17-ff-ff-24-14-12
Capabilities: [170 v1] Power Budgeting <?>
Kernel driver in use: ath9k
Kernel modules: ath9k
04:00.0 USB controller: Fresco Logic FL1000G USB 3.0 Host Controller
(rev 04) (prog-if 30 [XHCI])
Subsystem: ASUSTeK Computer Inc. Device 1039
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 19
Region 0: Memory at dd200000 (32-bit, non-prefetchable) [size=64K]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [80] Express (v1) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <2us, L1 <32us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency
L0s unlimited, L1 unlimited
ClockPM- Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive-
BWMgmt- ABWMgmt-
Kernel driver in use: xhci_hcd
Kernel modules: xhci_hcd
05:00.0 Ethernet controller: Qualcomm Atheros AR8151 v2.0 Gigabit
Ethernet (rev c0)
Subsystem: ASUSTeK Computer Inc. Device 1851
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 46
Region 0: Memory at dc800000 (64-bit, non-prefetchable) [size=256K]
Region 2: I/O ports at 9000 [size=128]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [48] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee00000 Data: 4042
Capabilities: [58] Express (v1) Endpoint, MSI 00
DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
ExtTag- AttnBtn+ AttnInd+ PwrInd+ RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency
L0s unlimited, L1 unlimited
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive-
BWMgmt- ABWMgmt-
Capabilities: [6c] Vital Product Data
pcilib: sysfs_read_vpd: read failed: Connection timed out
Not readable
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF-
MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF-
MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF+
MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [180 v1] Device Serial Number ff-f4-1b-99-f4-6d-04-ff
Kernel driver in use: atl1c
Kernel modules: atl1c
[7.6.] SCSI information (from /proc/scsi/scsi)
% cat /proc/scsi/scsi
Attached devices:
Host: scsi0 Channel: 00 Id: 00 Lun: 00
Vendor: ATA Model: ST9750420AS Rev: 0002
Type: Direct-Access ANSI SCSI revision: 05
Host: scsi1 Channel: 00 Id: 00 Lun: 00
Vendor: ATA Model: ST9750420AS Rev: 0002
Type: Direct-Access ANSI SCSI revision: 05
Host: scsi2 Channel: 00 Id: 00 Lun: 00
Vendor: Slimtype Model: BD E DS4E1S Rev: EA2B
Type: CD-ROM ANSI SCSI revision: 05
[7.7.] Other information that might be relevant to the problem:
% ls /proc
1/ 17/ 27/ 415/ 59/ 9721/ kallsyms
10/ 171/ 278/ 418/ 591/ 9726/ kcore
100/ 174/ 28/ 42/ 598/ 9730/ key-users
10049/ 175/ 283/ 420/ 60/ 9731/ kmsg
101/ 18/ 29/ 429/ 601/ 9732/ kpagecount
10159/ 185/ 292/ 43/ 604/ 9736/ kpageflags
10173/ 19/ 293/ 430/ 605/ 9737/ loadavg
10198/ 193/ 295/ 44/ 611/ 9765/ locks
102/ 195/ 299/ 444/ 617/ 9774/ meminfo
10211/ 198/ 3/ 456/ 621/ 9781/ misc
10260/ 2/ 307/ 46/ 645/ 9788/ modules
10261/ 205/ 309/ 463/ 647/ 9794/ mounts@
10296/ 21/ 31/ 468/ 65/ 9805/ mtrr
103/ 2129/ 312/ 47/ 652/ 9892/ net@
10383/ 22/ 314/ 48/ 658/ 9971/ pagetypeinfo
104/ 225/ 315/ 481/ 659/ acpi/ partitions
105/ 226/ 32/ 49/ 66/ asound/ sched_debug
106/ 23/ 33/ 490/ 69/ buddyinfo schedstat
107/ 233/ 34/ 5/ 7/ bus/ scsi/
108/ 234/ 35/ 50/ 709/ cgroups self@
109/ 236/ 36/ 51/ 715/ cmdline slabinfo
11/ 238/ 37/ 514/ 741/ config.gz softirqs
110/ 24/ 372/ 518/ 743/ consoles stat
111/ 247/ 38/ 52/ 744/ cpuinfo swaps
112/ 248/ 389/ 520/ 770/ crypto sys/
119/ 2484/ 39/ 53/ 778/ devices sysrq-trigger
12/ 25/ 390/ 530/ 796/ diskstats sysvipc/
120/ 250/ 397/ 538/ 8/ dma timer_list
13/ 251/ 398/ 539/ 808/ driver/ timer_stats
135/ 252/ 402/ 54/ 810/ execdomains tty/
14/ 254/ 403/ 540/ 861/ fb uptime
145/ 255/ 406/ 546/ 891/ filesystems version
146/ 256/ 407/ 549/ 9/ fs/ vmallocinfo
147/ 257/ 408/ 55/ 931/ interrupts vmstat
149/ 26/ 41/ 57/ 933/ iomem zoneinfo
150/ 260/ 412/ 58/ 96/ ioports
16/ 269/ 414/ 589/ 97/ irq/
[X.] Other notes, patches, fixes, workarounds:
I tried debugging the problem, but I wasn't very succesful. Only thing
I figured out, it is probably unrelated to the magictrackpad driver,
even when making its raw_event function just return it would still get
stuck. I got lost somewhere in between net/bluetooth/hidp/core.c and
drivers/hid/hid-core.c, for some reason my printks in hid-core.c
wouldn't show up. My guess was that somewhere in the hid system, the
thread would get blocked and continuously spam the three finger touch
event blocking all other events.
Similarly hcidump shows that all bluetooth communication to this
device stops after touching it with three fingers.
This is the last output I get from hcidump:
> ACL data: handle 21 flags 0x02 dlen 36
L2CAP(d): cid 0x0041 len 32 [psm 0]
A1 28 C4 5A F3 96 03 4E FC 18 27 06 81 32 90 27 FD A7 01 0F
43 F1 10 9C 7E 18 FC 0B 16 C4 A6 10
"Normal" output would look about like this, that's for a single finger:
> ACL data: handle 21 flags 0x02 dlen 18
L2CAP(d): cid 0x0041 len 14 [psm 0]
A1 28 A8 2D 00 5A 7D F0 0F 00 00 C0 81 74
^ permalink raw reply
* USB touchscreen pointer jumping
From: cbkehler @ 2014-03-16 2:54 UTC (permalink / raw)
To: linux-input
Hello all,
I've got an HP laptop with a usb touchscreen. I'm not sure it's a bug in X or the kernel but the
pointer will jump to a spot in the upper right corner at random intervals. Sometimes it can go hours
between jumps and sometimes it jumps every second or two making the laptop virtually unusable. The
kernel is 3.14.0-rc5, though this has been happening with every kernel since I got the laptop 4 months
ago.
I've included all the information that I could think of that might be relevant.
Thanks,
/Chris
#evtest /dev/input/event15
Input driver version is 1.0.1
Input device ID: bus 0x3 vendor 0xeef product 0xa802 version 0x210
Input device name: "eGalax Inc. eGalaxTouch EXC7920-2003-11.03.02"
Supported events:
Event type 0 (EV_SYN)
Event type 1 (EV_KEY)
Event code 330 (BTN_TOUCH)
Event type 3 (EV_ABS)
Event code 0 (ABS_X)
Value 3979
Min 0
Max 4095
Resolution 11
Event code 1 (ABS_Y)
Value 558
Min 0
Max 4095
Resolution 19
Event code 47 (ABS_MT_SLOT)
Value 0
Min 0
Max 9
Event code 53 (ABS_MT_POSITION_X)
Value 0
Min 0
Max 4095
Resolution 11
Event code 54 (ABS_MT_POSITION_Y)
Value 0
Min 0
Max 4095
Resolution 19
Event code 57 (ABS_MT_TRACKING_ID)
Value 0
Min 0
Max 65535
Properties:
Property type 1 (INPUT_PROP_DIRECT)
Testing ... (interrupt to exit)
Event: time 1394938209.404732, type 3 (EV_ABS), code 57 (ABS_MT_TRACKING_ID), value 943
Event: time 1394938209.404732, type 3 (EV_ABS), code 53 (ABS_MT_POSITION_X), value 3971
Event: time 1394938209.404732, type 3 (EV_ABS), code 54 (ABS_MT_POSITION_Y), value 569
Event: time 1394938209.404732, type 1 (EV_KEY), code 330 (BTN_TOUCH), value 1
Event: time 1394938209.404732, type 3 (EV_ABS), code 0 (ABS_X), value 3971
Event: time 1394938209.404732, type 3 (EV_ABS), code 1 (ABS_Y), value 569
Event: time 1394938209.404732, -------------- SYN_REPORT ------------
Event: time 1394938209.437732, type 3 (EV_ABS), code 57 (ABS_MT_TRACKING_ID), value -1
Event: time 1394938209.437732, type 1 (EV_KEY), code 330 (BTN_TOUCH), value 0
Event: time 1394938209.437732, -------------- SYN_REPORT ------------
Event: time 1394938231.081763, type 3 (EV_ABS), code 57 (ABS_MT_TRACKING_ID), value 944
Event: time 1394938231.081763, type 3 (EV_ABS), code 53 (ABS_MT_POSITION_X), value 3972
Event: time 1394938231.081763, type 3 (EV_ABS), code 54 (ABS_MT_POSITION_Y), value 563
Event: time 1394938231.081763, type 1 (EV_KEY), code 330 (BTN_TOUCH), value 1
Event: time 1394938231.081763, type 3 (EV_ABS), code 0 (ABS_X), value 3972
Event: time 1394938231.081763, type 3 (EV_ABS), code 1 (ABS_Y), value 563
Event: time 1394938231.081763, -------------- SYN_REPORT ------------
Event: time 1394938231.116762, type 3 (EV_ABS), code 57 (ABS_MT_TRACKING_ID), value -1
Event: time 1394938231.116762, type 1 (EV_KEY), code 330 (BTN_TOUCH), value 0
Event: time 1394938231.116762, -------------- SYN_REPORT ------------
^C
# lsusb
Bus 002 Device 002: ID 8087:8000 Intel Corp.
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 001 Device 002: ID 8087:8008 Intel Corp.
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 003 Device 005: ID 05c8:0361 Cheng Uei Precision Industry Co., Ltd (Foxlink)
Bus 003 Device 004: ID 8087:07da Intel Corp.
Bus 003 Device 048: ID 058f:6254 Alcor Micro Corp. USB Hub
Bus 003 Device 007: ID 138a:0050 Validity Sensors, Inc.
Bus 003 Device 052: ID 0eef:a802 D-WAV Scientific Co., Ltd
Bus 003 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
# lsusb -v -s 003:052
Bus 003 Device 052: ID 0eef:a802 D-WAV Scientific Co., Ltd
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 0 (Defined at Interface level)
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
idVendor 0x0eef D-WAV Scientific Co., Ltd
idProduct 0xa802
bcdDevice 3.03
iManufacturer 1 eGalax Inc.
iProduct 2 eGalaxTouch EXC7920-2003-11.03.02
iSerial 0
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 34
bNumInterfaces 1
bConfigurationValue 1
iConfiguration 1 eGalax Inc.
bmAttributes 0xa0
(Bus Powered)
Remote Wakeup
MaxPower 100mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 1
bInterfaceClass 3 Human Interface Device
bInterfaceSubClass 1 Boot Interface Subclass
bInterfaceProtocol 2 Mouse
iInterface 0
HID Device Descriptor:
bLength 9
bDescriptorType 33
bcdHID 2.10
bCountryCode 0 Not supported
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 494
Report Descriptors:
** UNAVAILABLE **
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 1
Device Status: 0x0003
Self Powered
Remote Wakeup Enabled
^ permalink raw reply
* Re: [PATCH 01/15] ARM: at91: sam9g45: remove unused platform_data
From: Jonathan Cameron @ 2014-03-16 17:49 UTC (permalink / raw)
To: Alexandre Belloni, Nicolas Ferre, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <1394040940-18246-2-git-send-email-alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On 05/03/14 17:35, Alexandre Belloni wrote:
> num_channels and registers are not used anymore since they are defined inside
> the at91_adc driver and assigned by matching the id_table.
>
> Also, remove the mach/at91_adc.h include that is not necessary anymore.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
> arch/arm/mach-at91/at91sam9g45_devices.c | 10 ----------
> 1 file changed, 10 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
> index 88554024eb2d..cd36009c3511 100644
> --- a/arch/arm/mach-at91/at91sam9g45_devices.c
> +++ b/arch/arm/mach-at91/at91sam9g45_devices.c
> @@ -25,7 +25,6 @@
> #include <linux/fb.h>
> #include <video/atmel_lcdc.h>
>
> -#include <mach/at91_adc.h>
> #include <mach/at91sam9g45.h>
> #include <mach/at91sam9g45_matrix.h>
> #include <mach/at91_matrix.h>
> @@ -1235,13 +1234,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = {
> },
> };
>
> -static struct at91_adc_reg_desc at91_adc_register_g45 = {
> - .channel_base = AT91_ADC_CHR(0),
> - .drdy_mask = AT91_ADC_DRDY,
> - .status_register = AT91_ADC_SR,
> - .trigger_register = 0x08,
> -};
> -
> void __init at91_add_device_adc(struct at91_adc_data *data)
> {
> if (!data)
> @@ -1267,9 +1259,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data)
> if (data->use_external_triggers)
> at91_set_A_periph(AT91_PIN_PD28, 0);
>
> - data->num_channels = 8;
> data->startup_time = 40;
> - data->registers = &at91_adc_register_g45;
> data->trigger_number = 4;
> data->trigger_list = at91_adc_triggers;
>
>
^ permalink raw reply
* Re: [PATCH 02/15] ARM: at91: sam9260: remove unused platform_data
From: Jonathan Cameron @ 2014-03-16 17:49 UTC (permalink / raw)
To: Alexandre Belloni, Nicolas Ferre, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <1394040940-18246-3-git-send-email-alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On 05/03/14 17:35, Alexandre Belloni wrote:
> num_channels and registers are not used anymore since they are defined inside
> the at91_adc driver and assigned by matching the id_table.
>
> Also, remove the mach/at91_adc.h include that is not necessary anymore.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
> arch/arm/mach-at91/at91sam9260_devices.c | 10 ----------
> 1 file changed, 10 deletions(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
> index 0a0315920963..a299c50512f0 100644
> --- a/arch/arm/mach-at91/at91sam9260_devices.c
> +++ b/arch/arm/mach-at91/at91sam9260_devices.c
> @@ -24,7 +24,6 @@
> #include <mach/at91sam9260_matrix.h>
> #include <mach/at91_matrix.h>
> #include <mach/at91sam9_smc.h>
> -#include <mach/at91_adc.h>
>
> #include "board.h"
> #include "generic.h"
> @@ -1321,13 +1320,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = {
> },
> };
>
> -static struct at91_adc_reg_desc at91_adc_register_g20 = {
> - .channel_base = AT91_ADC_CHR(0),
> - .drdy_mask = AT91_ADC_DRDY,
> - .status_register = AT91_ADC_SR,
> - .trigger_register = AT91_ADC_MR,
> -};
> -
> void __init at91_add_device_adc(struct at91_adc_data *data)
> {
> if (!data)
> @@ -1345,9 +1337,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data)
> if (data->use_external_triggers)
> at91_set_A_periph(AT91_PIN_PA22, 0);
>
> - data->num_channels = 4;
> data->startup_time = 10;
> - data->registers = &at91_adc_register_g20;
> data->trigger_number = 4;
> data->trigger_list = at91_adc_triggers;
>
>
^ permalink raw reply
* Re: [PATCH 03/15] iio: adc: at91: cleanup platform_data
From: Jonathan Cameron @ 2014-03-16 17:55 UTC (permalink / raw)
To: Alexandre Belloni, Nicolas Ferre, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard, linux-kernel, linux-arm-kernel,
linux-iio, linux-input, Maxime Ripard, Gregory Clement
In-Reply-To: <1394040940-18246-4-git-send-email-alexandre.belloni@free-electrons.com>
On 05/03/14 17:35, Alexandre Belloni wrote:
> num_channels and registers are not used anymore since they are defined inside
> the driver and assigned by matching the id_table.
>
> Also, struct at91_adc_reg_desc is now only used inside the driver.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Hmm. Looking on in the series, I'm guessing taking the lot through IIO
once everyone is happy is probably the way to go.
I'll be wanting acks from Atmel maintainers for pretty much all of them though.
Jonathan
> ---
> drivers/iio/adc/at91_adc.c | 19 +++++++++++++++++++
> include/linux/platform_data/at91_adc.h | 23 -----------------------
> 2 files changed, 19 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
> index 89777ed9abd8..1beae65aef2c 100644
> --- a/drivers/iio/adc/at91_adc.c
> +++ b/drivers/iio/adc/at91_adc.c
> @@ -46,6 +46,25 @@
> #define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
> #define TOUCH_PEN_DETECT_DEBOUNCE_US 200
>
> +/**
> + * struct at91_adc_reg_desc - Various informations relative to registers
> + * @channel_base: Base offset for the channel data registers
> + * @drdy_mask: Mask of the DRDY field in the relevant registers
> + (Interruptions registers mostly)
> + * @status_register: Offset of the Interrupt Status Register
> + * @trigger_register: Offset of the Trigger setup register
> + * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
> + * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
> + */
> +struct at91_adc_reg_desc {
> + u8 channel_base;
> + u32 drdy_mask;
> + u8 status_register;
> + u8 trigger_register;
> + u32 mr_prescal_mask;
> + u32 mr_startup_mask;
> +};
> +
> struct at91_adc_caps {
> bool has_ts; /* Support touch screen */
> bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */
> diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
> index b3ca1e94e0c8..fcf73879dbfe 100644
> --- a/include/linux/platform_data/at91_adc.h
> +++ b/include/linux/platform_data/at91_adc.h
> @@ -8,25 +8,6 @@
> #define _AT91_ADC_H_
>
> /**
> - * struct at91_adc_reg_desc - Various informations relative to registers
> - * @channel_base: Base offset for the channel data registers
> - * @drdy_mask: Mask of the DRDY field in the relevant registers
> - (Interruptions registers mostly)
> - * @status_register: Offset of the Interrupt Status Register
> - * @trigger_register: Offset of the Trigger setup register
> - * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
> - * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
> - */
> -struct at91_adc_reg_desc {
> - u8 channel_base;
> - u32 drdy_mask;
> - u8 status_register;
> - u8 trigger_register;
> - u32 mr_prescal_mask;
> - u32 mr_startup_mask;
> -};
> -
> -/**
> * struct at91_adc_trigger - description of triggers
> * @name: name of the trigger advertised to the user
> * @value: value to set in the ADC's trigger setup register
> @@ -42,8 +23,6 @@ struct at91_adc_trigger {
> /**
> * struct at91_adc_data - platform data for ADC driver
> * @channels_used: channels in use on the board as a bitmask
> - * @num_channels: global number of channels available on the board
> - * @registers: Registers definition on the board
> * @startup_time: startup time of the ADC in microseconds
> * @trigger_list: Triggers available in the ADC
> * @trigger_number: Number of triggers available in the ADC
> @@ -52,8 +31,6 @@ struct at91_adc_trigger {
> */
> struct at91_adc_data {
> unsigned long channels_used;
> - u8 num_channels;
> - struct at91_adc_reg_desc *registers;
> u8 startup_time;
> struct at91_adc_trigger *trigger_list;
> u8 trigger_number;
>
^ permalink raw reply
* Re: [PATCH 04/15] iio: adc: at91_adc: Add support for touchscreens without TSMR
From: Jonathan Cameron @ 2014-03-16 18:16 UTC (permalink / raw)
To: Alexandre Belloni, Nicolas Ferre, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard, linux-kernel, linux-arm-kernel,
linux-iio, linux-input, Maxime Ripard, Gregory Clement
In-Reply-To: <1394040940-18246-5-git-send-email-alexandre.belloni@free-electrons.com>
On 05/03/14 17:35, Alexandre Belloni wrote:
> Old ADCs, as present on the sam9rl and the sam9g45 don't have a TSMR register
> and the touchscreen support should be handled differently.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
One comment inline about handling of devices where the platform data doesn't
include the touchscreen type. I'd expect zero to be the current default
rather than NONE...
> ---
> arch/arm/mach-at91/include/mach/at91_adc.h | 13 ++
> drivers/iio/adc/at91_adc.c | 199 ++++++++++++++++++++++-------
> include/linux/platform_data/at91_adc.h | 8 ++
> 3 files changed, 172 insertions(+), 48 deletions(-)
>
> diff --git a/arch/arm/mach-at91/include/mach/at91_adc.h b/arch/arm/mach-at91/include/mach/at91_adc.h
> index c287307b9a3b..7d80396346b2 100644
> --- a/arch/arm/mach-at91/include/mach/at91_adc.h
> +++ b/arch/arm/mach-at91/include/mach/at91_adc.h
> @@ -20,6 +20,9 @@
> #define AT91_ADC_START (1 << 1) /* Start Conversion */
>
> #define AT91_ADC_MR 0x04 /* Mode Register */
> +#define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
> +#define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
> +#define AT91_ADC_TSAMOD_TS_ONLY_MODE (1 << 0) /* Touch Screen Only Mode */
> #define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
> #define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
> #define AT91_ADC_TRGSEL_TC0 (0 << 1)
> @@ -28,6 +31,7 @@
> #define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
> #define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
> #define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
> +#define AT91_ADC_PENDET (1 << 6) /* Pen contact detection enable */
> #define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */
> #define AT91_ADC_PRESCAL_9G45 (0xff << 8)
> #define AT91_ADC_PRESCAL_(x) ((x) << 8)
> @@ -37,6 +41,12 @@
> #define AT91_ADC_STARTUP_(x) ((x) << 16)
> #define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
> #define AT91_ADC_SHTIM_(x) ((x) << 24)
> +#define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */
> +#define AT91_ADC_PENDBC_(x) ((x) << 28)
> +
> +#define AT91_ADC_TSR 0x0C
> +#define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */
> +#define AT91_ADC_TSR_SHTIM_(x) ((x) << 24)
>
> #define AT91_ADC_CHER 0x10 /* Channel Enable Register */
> #define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
> @@ -60,6 +70,8 @@
> #define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
> #define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
> #define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
> +#define AT91RL_ADC_IER_PEN (1 << 20)
> +#define AT91RL_ADC_IER_NOPEN (1 << 21)
> #define AT91_ADC_IER_PEN (1 << 29)
> #define AT91_ADC_IER_NOPEN (1 << 30)
> #define AT91_ADC_IER_XRDY (1 << 20)
> @@ -102,6 +114,7 @@
> #define AT91_ADC_TRGR_TRGPER (0xffff << 16)
> #define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16)
> #define AT91_ADC_TRGR_TRGMOD (0x7 << 0)
> +#define AT91_ADC_TRGR_NONE (0 << 0)
> #define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0)
>
> #endif
> diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
> index 1beae65aef2c..3e92b16e9301 100644
> --- a/drivers/iio/adc/at91_adc.c
> +++ b/drivers/iio/adc/at91_adc.c
> @@ -46,6 +46,10 @@
> #define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
> #define TOUCH_PEN_DETECT_DEBOUNCE_US 200
>
> +#define MAX_RLPOS_BITS 10
> +#define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */
> +#define TOUCH_SHTIM 0xa
> +
> /**
> * struct at91_adc_reg_desc - Various informations relative to registers
> * @channel_base: Base offset for the channel data registers
> @@ -83,12 +87,6 @@ struct at91_adc_caps {
> struct at91_adc_reg_desc registers;
> };
>
> -enum atmel_adc_ts_type {
> - ATMEL_ADC_TOUCHSCREEN_NONE = 0,
> - ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
> - ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
> -};
> -
> struct at91_adc_state {
> struct clk *adc_clk;
> u16 *buffer;
> @@ -133,6 +131,11 @@ struct at91_adc_state {
>
> u16 ts_sample_period_val;
> u32 ts_pressure_threshold;
> + u16 ts_pendbc;
> +
> + u8 ts_bufferedmeasure;
> + u32 ts_prev_absx;
> + u32 ts_prev_absy;
> };
>
> static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
> @@ -239,19 +242,68 @@ static int at91_ts_sample(struct at91_adc_state *st)
> return 0;
> }
>
> -static irqreturn_t at91_adc_interrupt(int irq, void *private)
> +void handle_adc_rl_ts_irq(int irq, struct at91_adc_state *st, u32 status)
> +{
> + unsigned int reg;
> +
> + status &= at91_adc_readl(st, AT91_ADC_IMR);
> + if (status & AT91RL_ADC_IER_PEN) {
> + /* Disabling pen debounce is required to get a NOPEN irq */
> + reg = at91_adc_readl(st, AT91_ADC_MR);
> + reg &= ~AT91_ADC_PENDBC;
> + at91_adc_writel(st, AT91_ADC_MR, reg);
> +
> + at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
> + at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN
> + | AT91_ADC_EOC(3));
> + /* Set up period trigger for sampling */
> + at91_adc_writel(st, st->registers->trigger_register,
> + AT91_ADC_TRGR_MOD_PERIOD_TRIG |
> + AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
> + } else if (status & AT91RL_ADC_IER_NOPEN) {
> + reg = at91_adc_readl(st, AT91_ADC_MR);
> + reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
> + at91_adc_writel(st, AT91_ADC_MR, reg);
> + at91_adc_writel(st, st->registers->trigger_register,
> + AT91_ADC_TRGR_NONE);
> +
> + at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN
> + | AT91_ADC_EOC(3));
> + at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
> + st->ts_bufferedmeasure = 0;
> + input_report_key(st->ts_input, BTN_TOUCH, 0);
> + input_sync(st->ts_input);
> + } else if (status & AT91_ADC_EOC(3)) {
> + /* Conversion finished */
> + if (st->ts_bufferedmeasure) {
> + /* Last measurement is always discarded, since it can
> + * be erroneous.
> + * Always report previous measurement */
> + input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
> + input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
> + input_report_key(st->ts_input, BTN_TOUCH, 1);
> + input_sync(st->ts_input);
> + } else
> + st->ts_bufferedmeasure = 1;
> +
> + /* Now make new measurement */
> + st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
> + << MAX_RLPOS_BITS;
> + st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
> +
> + st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
> + << MAX_RLPOS_BITS;
> + st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
> + }
> +}
> +
> +void handle_adc_9x5_ts_irq(int irq, struct at91_adc_state *st, u32 status)
> {
> - struct iio_dev *idev = private;
> - struct at91_adc_state *st = iio_priv(idev);
> - u32 status = at91_adc_readl(st, st->registers->status_register);
> const uint32_t ts_data_irq_mask =
> AT91_ADC_IER_XRDY |
> AT91_ADC_IER_YRDY |
> AT91_ADC_IER_PRDY;
>
> - if (status & st->registers->drdy_mask)
> - handle_adc_eoc_trigger(irq, idev);
> -
> if (status & AT91_ADC_IER_PEN) {
> at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
> at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |
> @@ -283,6 +335,21 @@ static irqreturn_t at91_adc_interrupt(int irq, void *private)
> at91_adc_readl(st, AT91_ADC_TSPRESSR);
> }
> }
> +}
> +
> +static irqreturn_t at91_adc_interrupt(int irq, void *private)
> +{
> + struct iio_dev *idev = private;
> + struct at91_adc_state *st = iio_priv(idev);
> + u32 status = at91_adc_readl(st, st->registers->status_register);
> +
> + if (status & st->registers->drdy_mask)
> + handle_adc_eoc_trigger(irq, idev);
> +
> + if (st->caps->has_tsmr)
> + handle_adc_9x5_ts_irq(irq, st, status);
> + else
> + handle_adc_rl_ts_irq(irq, st, status);
>
> return IRQ_HANDLED;
> }
> @@ -672,6 +739,8 @@ static int at91_adc_probe_dt_ts(struct device_node *node,
> return -EINVAL;
> }
>
> + if (!st->caps->has_tsmr)
> + return 0;
> prop = 0;
> of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
> st->ts_pressure_threshold = prop;
> @@ -795,6 +864,7 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
> st->trigger_number = pdata->trigger_number;
> st->trigger_list = pdata->trigger_list;
> st->registers = &st->caps->registers;
> + st->touchscreen_type = pdata->touchscreen_type;
>
> return 0;
> }
> @@ -809,7 +879,10 @@ static int atmel_ts_open(struct input_dev *dev)
> {
> struct at91_adc_state *st = input_get_drvdata(dev);
>
> - at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
> + if (st->caps->has_tsmr)
> + at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
> + else
> + at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
> return 0;
> }
>
> @@ -817,45 +890,61 @@ static void atmel_ts_close(struct input_dev *dev)
> {
> struct at91_adc_state *st = input_get_drvdata(dev);
>
> - at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
> + if (st->caps->has_tsmr)
> + at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
> + else
> + at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
> }
>
> static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
> {
> - u32 reg = 0, pendbc;
> + u32 reg = 0;
> int i = 0;
>
> - if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
> - reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
> - else
> - reg = AT91_ADC_TSMR_TSMODE_5WIRE;
> -
> /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
> * pen detect noise.
> * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
> */
> - pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1);
> + st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
> + 1000, 1);
>
> - while (pendbc >> ++i)
> + while (st->ts_pendbc >> ++i)
> ; /* Empty! Find the shift offset */
> - if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1))))
> - pendbc = i;
> + if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
> + st->ts_pendbc = i;
> else
> - pendbc = i - 1;
> + st->ts_pendbc = i - 1;
>
> - if (st->caps->has_tsmr) {
> - reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
> - & AT91_ADC_TSMR_TSAV;
> - reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC;
> - reg |= AT91_ADC_TSMR_NOTSDMA;
> - reg |= AT91_ADC_TSMR_PENDET_ENA;
> - reg |= 0x03 << 8; /* TSFREQ, need bigger than TSAV */
> -
> - at91_adc_writel(st, AT91_ADC_TSMR, reg);
> - } else {
> - /* TODO: for 9g45 which has no TSMR */
> + if (!st->caps->has_tsmr) {
> + reg = at91_adc_readl(st, AT91_ADC_MR);
> + reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;
> +
> + reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
> + at91_adc_writel(st, AT91_ADC_MR, reg);
> +
> + reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;
> + at91_adc_writel(st, AT91_ADC_TSR, reg);
> +
> + st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
> + adc_clk_khz / 1000) - 1, 1);
> +
> + return 0;
> }
>
> + if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
> + reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
> + else
> + reg = AT91_ADC_TSMR_TSMODE_5WIRE;
> +
> + reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
> + & AT91_ADC_TSMR_TSAV;
> + reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
> + reg |= AT91_ADC_TSMR_NOTSDMA;
> + reg |= AT91_ADC_TSMR_PENDET_ENA;
> + reg |= 0x03 << 8; /* TSFREQ, needs to be bigger than TSAV */
> +
> + at91_adc_writel(st, AT91_ADC_TSMR, reg);
> +
> /* Change adc internal resistor value for better pen detection,
> * default value is 100 kOhm.
> * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
> @@ -864,7 +953,7 @@ static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
> at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
> & AT91_ADC_ACR_PENDETSENS);
>
> - /* Sample Peroid Time = (TRGPER + 1) / ADCClock */
> + /* Sample Period Time = (TRGPER + 1) / ADCClock */
> st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
> adc_clk_khz / 1000) - 1, 1);
>
> @@ -893,17 +982,37 @@ static int at91_ts_register(struct at91_adc_state *st,
> __set_bit(EV_ABS, input->evbit);
> __set_bit(EV_KEY, input->evbit);
> __set_bit(BTN_TOUCH, input->keybit);
> - input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
> - input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
> - input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
> + if (st->caps->has_tsmr) {
> + input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
> + 0, 0);
> + input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
> + 0, 0);
> + input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
> + } else {
> + if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
> + dev_err(&pdev->dev,
> + "This touchscreen controller only support 4 wires\n");
> + ret = -EINVAL;
> + goto err;
> + }
> +
> + input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
> + 0, 0);
> + input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
> + 0, 0);
> + }
>
> st->ts_input = input;
> input_set_drvdata(input, st);
>
> ret = input_register_device(input);
> if (ret)
> - input_free_device(st->ts_input);
> + goto err;
> +
> + return ret;
>
> +err:
> + input_free_device(st->ts_input);
> return ret;
> }
>
> @@ -1070,12 +1179,6 @@ static int at91_adc_probe(struct platform_device *pdev)
> goto error_disable_adc_clk;
> }
> } else {
> - if (!st->caps->has_tsmr) {
> - dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
> - ret = -ENODEV;
> - goto error_disable_adc_clk;
> - }
> -
> ret = at91_ts_register(st, pdev);
> if (ret)
> goto error_disable_adc_clk;
> diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
> index fcf73879dbfe..7819fc787731 100644
> --- a/include/linux/platform_data/at91_adc.h
> +++ b/include/linux/platform_data/at91_adc.h
> @@ -7,6 +7,12 @@
> #ifndef _AT91_ADC_H_
> #define _AT91_ADC_H_
>
> +enum atmel_adc_ts_type {
This means that the default for existing touch screens (where the platform
data won't include setting this value) will be none. Is that correct?
> + ATMEL_ADC_TOUCHSCREEN_NONE = 0,
> + ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
> + ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
> +};
> +
> /**
> * struct at91_adc_trigger - description of triggers
> * @name: name of the trigger advertised to the user
> @@ -28,6 +34,7 @@ struct at91_adc_trigger {
> * @trigger_number: Number of triggers available in the ADC
> * @use_external_triggers: does the board has external triggers availables
> * @vref: Reference voltage for the ADC in millivolts
> + * @touchscreen_type: If a touchscreen is connected, its type (4 or 5 wires)
> */
> struct at91_adc_data {
> unsigned long channels_used;
> @@ -36,6 +43,7 @@ struct at91_adc_data {
> u8 trigger_number;
> bool use_external_triggers;
> u16 vref;
> + enum atmel_adc_ts_type touchscreen_type;
> };
>
> extern void __init at91_add_device_adc(struct at91_adc_data *data);
>
^ permalink raw reply
* Re: [PATCH 05/15] ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc
From: Jonathan Cameron @ 2014-03-16 18:18 UTC (permalink / raw)
To: Alexandre Belloni, Nicolas Ferre, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard, linux-kernel, linux-arm-kernel,
linux-iio, linux-input, Maxime Ripard, Gregory Clement
In-Reply-To: <1394040940-18246-6-git-send-email-alexandre.belloni@free-electrons.com>
On 05/03/14 17:35, Alexandre Belloni wrote:
> at91_adc now supports reading a touchscreen for ADCs without a TSMR register.
> Enable touchscreen support through at91_adc. This allows to use both a
> touchscreen and the remaining ADC channel at the same time.
>
> Also, lower the clock for the ADC as it allows to have more stable reads and
> this is the speed used by atmel_tsadcc.
Are there any side effects on the adc read if that functionality was previously
being used? I doubt it matters, but probably wants to be mentioned here if there
is.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> arch/arm/mach-at91/at91sam9g45.c | 2 +-
> arch/arm/mach-at91/board-sam9m10g45ek.c | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> index 2f455ce35268..3c519a7a938f 100644
> --- a/arch/arm/mach-at91/at91sam9g45.c
> +++ b/arch/arm/mach-at91/at91sam9g45.c
> @@ -181,7 +181,7 @@ static struct clk vdec_clk = {
> static struct clk adc_op_clk = {
> .name = "adc_op_clk",
> .type = CLK_TYPE_PERIPHERAL,
> - .rate_hz = 13200000,
> + .rate_hz = 300000,
> };
>
> /* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
> diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
> index ef39078c8ce2..4d775b796ce4 100644
> --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
> +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
> @@ -315,6 +315,7 @@ static struct at91_adc_data ek_adc_data = {
> .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),
> .use_external_triggers = true,
> .vref = 3300,
> + .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE,
> };
>
> /*
>
^ permalink raw reply
* Re: [PATCH 14/15] Input: atmel_tsadcc: remove driver
From: Jonathan Cameron @ 2014-03-16 18:26 UTC (permalink / raw)
To: Dmitry Torokhov, Alexandre Belloni
Cc: Nicolas Ferre, Jean-Christophe Plagniol-Villard, linux-kernel,
linux-arm-kernel, linux-iio, linux-input, Maxime Ripard,
Gregory Clement
In-Reply-To: <20140305184611.GA5453@core.coreip.homeip.net>
On 05/03/14 18:46, Dmitry Torokhov wrote:
> On Wed, Mar 05, 2014 at 06:35:39PM +0100, Alexandre Belloni wrote:
>> The atmel_tsadcc driver is not used anymore, it has been replaced by at91_adc so
>> remove it.
>>
>> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
>
> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
All the rest of this series looks fine to me.
Dmitry, are you happy for me to take this whole series through IIO once
the last few bits are pinned down? If the atmel guys want to take the whole
thing through their tree I'm also happy with that.
Not sure what the lowest pain route will be...
>
>> ---
>> MAINTAINERS | 6 -
>> drivers/input/touchscreen/Kconfig | 12 --
>> drivers/input/touchscreen/Makefile | 1 -
>> drivers/input/touchscreen/atmel_tsadcc.c | 358 -------------------------------
>> 4 files changed, 377 deletions(-)
>> delete mode 100644 drivers/input/touchscreen/atmel_tsadcc.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index c6d0e93eff62..134dd63dfa17 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -1591,12 +1591,6 @@ S: Supported
>> F: drivers/misc/atmel_tclib.c
>> F: drivers/clocksource/tcb_clksrc.c
>>
>> -ATMEL TSADCC DRIVER
>> -M: Josh Wu <josh.wu@atmel.com>
>> -L: linux-input@vger.kernel.org
>> -S: Supported
>> -F: drivers/input/touchscreen/atmel_tsadcc.c
>> -
>> ATMEL USBA UDC DRIVER
>> M: Nicolas Ferre <nicolas.ferre@atmel.com>
>> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>> diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
>> index 07e9e82029d1..4090f69e78af 100644
>> --- a/drivers/input/touchscreen/Kconfig
>> +++ b/drivers/input/touchscreen/Kconfig
>> @@ -559,18 +559,6 @@ config TOUCHSCREEN_TI_AM335X_TSC
>> To compile this driver as a module, choose M here: the
>> module will be called ti_am335x_tsc.
>>
>> -config TOUCHSCREEN_ATMEL_TSADCC
>> - tristate "Atmel Touchscreen Interface"
>> - depends on ARCH_AT91
>> - help
>> - Say Y here if you have a 4-wire touchscreen connected to the
>> - ADC Controller on your Atmel SoC.
>> -
>> - If unsure, say N.
>> -
>> - To compile this driver as a module, choose M here: the
>> - module will be called atmel_tsadcc.
>> -
>> config TOUCHSCREEN_UCB1400
>> tristate "Philips UCB1400 touchscreen"
>> depends on AC97_BUS
>> diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
>> index 62801f213346..f326a8290593 100644
>> --- a/drivers/input/touchscreen/Makefile
>> +++ b/drivers/input/touchscreen/Makefile
>> @@ -13,7 +13,6 @@ obj-$(CONFIG_TOUCHSCREEN_AD7879_I2C) += ad7879-i2c.o
>> obj-$(CONFIG_TOUCHSCREEN_AD7879_SPI) += ad7879-spi.o
>> obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o
>> obj-$(CONFIG_TOUCHSCREEN_ATMEL_MXT) += atmel_mxt_ts.o
>> -obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o
>> obj-$(CONFIG_TOUCHSCREEN_AUO_PIXCIR) += auo-pixcir-ts.o
>> obj-$(CONFIG_TOUCHSCREEN_BU21013) += bu21013_ts.o
>> obj-$(CONFIG_TOUCHSCREEN_CY8CTMG110) += cy8ctmg110_ts.o
>> diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c
>> deleted file mode 100644
>> index a7c9d6967d1e..000000000000
>> --- a/drivers/input/touchscreen/atmel_tsadcc.c
>> +++ /dev/null
>> @@ -1,358 +0,0 @@
>> -/*
>> - * Atmel Touch Screen Driver
>> - *
>> - * Copyright (c) 2008 ATMEL
>> - * Copyright (c) 2008 Dan Liang
>> - * Copyright (c) 2008 TimeSys Corporation
>> - * Copyright (c) 2008 Justin Waters
>> - *
>> - * Based on touchscreen code from Atmel Corporation.
>> - *
>> - * This program is free software; you can redistribute it and/or modify
>> - * it under the terms of the GNU General Public License version 2 as
>> - * published by the Free Software Foundation.
>> - */
>> -#include <linux/err.h>
>> -#include <linux/kernel.h>
>> -#include <linux/module.h>
>> -#include <linux/input.h>
>> -#include <linux/slab.h>
>> -#include <linux/interrupt.h>
>> -#include <linux/clk.h>
>> -#include <linux/platform_device.h>
>> -#include <linux/io.h>
>> -#include <linux/platform_data/atmel.h>
>> -#include <mach/cpu.h>
>> -
>> -/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
>> -
>> -#define ATMEL_TSADCC_CR 0x00 /* Control register */
>> -#define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/
>> -#define ATMEL_TSADCC_START (1 << 1) /* Start conversion */
>> -
>> -#define ATMEL_TSADCC_MR 0x04 /* Mode register */
>> -#define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */
>> -#define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */
>> -#define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */
>> -#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */
>> -#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */
>> -#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
>> -#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */
>> -#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
>> -#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */
>> -#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
>> -#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
>> -#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
>> -
>> -#define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */
>> -#define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */
>> -#define ATMEL_TSADCC_TRGMOD_NONE (0 << 0)
>> -#define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0)
>> -#define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0)
>> -#define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0)
>> -#define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0)
>> -#define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0)
>> -#define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0)
>> -#define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */
>> -
>> -#define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */
>> -#define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */
>> -#define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */
>> -
>> -#define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */
>> -#define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */
>> -#define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */
>> -#define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */
>> -
>> -#define ATMEL_TSADCC_SR 0x1C /* Status register */
>> -#define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */
>> -#define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */
>> -#define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */
>> -#define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */
>> -#define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */
>> -#define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */
>> -#define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */
>> -#define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */
>> -
>> -#define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */
>> -#define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */
>> -
>> -#define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */
>> -#define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */
>> -#define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */
>> -#define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */
>> -#define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */
>> -#define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */
>> -#define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */
>> -#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */
>> -#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */
>> -
>> -#define ATMEL_TSADCC_XPOS 0x50
>> -#define ATMEL_TSADCC_Z1DAT 0x54
>> -#define ATMEL_TSADCC_Z2DAT 0x58
>> -
>> -#define PRESCALER_VAL(x) ((x) >> 8)
>> -
>> -#define ADC_DEFAULT_CLOCK 100000
>> -
>> -struct atmel_tsadcc {
>> - struct input_dev *input;
>> - char phys[32];
>> - struct clk *clk;
>> - int irq;
>> - unsigned int prev_absx;
>> - unsigned int prev_absy;
>> - unsigned char bufferedmeasure;
>> -};
>> -
>> -static void __iomem *tsc_base;
>> -
>> -#define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg))
>> -#define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg))
>> -
>> -static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
>> -{
>> - struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev;
>> - struct input_dev *input_dev = ts_dev->input;
>> -
>> - unsigned int status;
>> - unsigned int reg;
>> -
>> - status = atmel_tsadcc_read(ATMEL_TSADCC_SR);
>> - status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR);
>> -
>> - if (status & ATMEL_TSADCC_NOCNT) {
>> - /* Contact lost */
>> - reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
>> -
>> - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
>> - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
>> - atmel_tsadcc_write(ATMEL_TSADCC_IDR,
>> - ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
>> - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
>> -
>> - input_report_key(input_dev, BTN_TOUCH, 0);
>> - ts_dev->bufferedmeasure = 0;
>> - input_sync(input_dev);
>> -
>> - } else if (status & ATMEL_TSADCC_PENCNT) {
>> - /* Pen detected */
>> - reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
>> - reg &= ~ATMEL_TSADCC_PENDBC;
>> -
>> - atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
>> - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
>> - atmel_tsadcc_write(ATMEL_TSADCC_IER,
>> - ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
>> - atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
>> - ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
>> -
>> - } else if (status & ATMEL_TSADCC_EOC(3)) {
>> - /* Conversion finished */
>> -
>> - if (ts_dev->bufferedmeasure) {
>> - /* Last measurement is always discarded, since it can
>> - * be erroneous.
>> - * Always report previous measurement */
>> - input_report_abs(input_dev, ABS_X, ts_dev->prev_absx);
>> - input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy);
>> - input_report_key(input_dev, BTN_TOUCH, 1);
>> - input_sync(input_dev);
>> - } else
>> - ts_dev->bufferedmeasure = 1;
>> -
>> - /* Now make new measurement */
>> - ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
>> - ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
>> -
>> - ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
>> - ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
>> - }
>> -
>> - return IRQ_HANDLED;
>> -}
>> -
>> -/*
>> - * The functions for inserting/removing us as a module.
>> - */
>> -
>> -static int atmel_tsadcc_probe(struct platform_device *pdev)
>> -{
>> - struct atmel_tsadcc *ts_dev;
>> - struct input_dev *input_dev;
>> - struct resource *res;
>> - struct at91_tsadcc_data *pdata = dev_get_platdata(&pdev->dev);
>> - int err;
>> - unsigned int prsc;
>> - unsigned int reg;
>> -
>> - if (!pdata)
>> - return -EINVAL;
>> -
>> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> - if (!res) {
>> - dev_err(&pdev->dev, "no mmio resource defined.\n");
>> - return -ENXIO;
>> - }
>> -
>> - /* Allocate memory for device */
>> - ts_dev = kzalloc(sizeof(struct atmel_tsadcc), GFP_KERNEL);
>> - if (!ts_dev) {
>> - dev_err(&pdev->dev, "failed to allocate memory.\n");
>> - return -ENOMEM;
>> - }
>> - platform_set_drvdata(pdev, ts_dev);
>> -
>> - input_dev = input_allocate_device();
>> - if (!input_dev) {
>> - dev_err(&pdev->dev, "failed to allocate input device.\n");
>> - err = -EBUSY;
>> - goto err_free_mem;
>> - }
>> -
>> - ts_dev->irq = platform_get_irq(pdev, 0);
>> - if (ts_dev->irq < 0) {
>> - dev_err(&pdev->dev, "no irq ID is designated.\n");
>> - err = -ENODEV;
>> - goto err_free_dev;
>> - }
>> -
>> - if (!request_mem_region(res->start, resource_size(res),
>> - "atmel tsadcc regs")) {
>> - dev_err(&pdev->dev, "resources is unavailable.\n");
>> - err = -EBUSY;
>> - goto err_free_dev;
>> - }
>> -
>> - tsc_base = ioremap(res->start, resource_size(res));
>> - if (!tsc_base) {
>> - dev_err(&pdev->dev, "failed to map registers.\n");
>> - err = -ENOMEM;
>> - goto err_release_mem;
>> - }
>> -
>> - err = request_irq(ts_dev->irq, atmel_tsadcc_interrupt, 0,
>> - pdev->dev.driver->name, ts_dev);
>> - if (err) {
>> - dev_err(&pdev->dev, "failed to allocate irq.\n");
>> - goto err_unmap_regs;
>> - }
>> -
>> - ts_dev->clk = clk_get(&pdev->dev, "tsc_clk");
>> - if (IS_ERR(ts_dev->clk)) {
>> - dev_err(&pdev->dev, "failed to get ts_clk\n");
>> - err = PTR_ERR(ts_dev->clk);
>> - goto err_free_irq;
>> - }
>> -
>> - ts_dev->input = input_dev;
>> - ts_dev->bufferedmeasure = 0;
>> -
>> - snprintf(ts_dev->phys, sizeof(ts_dev->phys),
>> - "%s/input0", dev_name(&pdev->dev));
>> -
>> - input_dev->name = "atmel touch screen controller";
>> - input_dev->phys = ts_dev->phys;
>> - input_dev->dev.parent = &pdev->dev;
>> -
>> - __set_bit(EV_ABS, input_dev->evbit);
>> - input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0);
>> - input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0);
>> -
>> - input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
>> -
>> - /* clk_enable() always returns 0, no need to check it */
>> - clk_enable(ts_dev->clk);
>> -
>> - prsc = clk_get_rate(ts_dev->clk);
>> - dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
>> -
>> - if (!pdata->adc_clock)
>> - pdata->adc_clock = ADC_DEFAULT_CLOCK;
>> -
>> - prsc = (prsc / (2 * pdata->adc_clock)) - 1;
>> -
>> - /* saturate if this value is too high */
>> - if (cpu_is_at91sam9rl()) {
>> - if (prsc > PRESCALER_VAL(ATMEL_TSADCC_PRESCAL))
>> - prsc = PRESCALER_VAL(ATMEL_TSADCC_PRESCAL);
>> - } else {
>> - if (prsc > PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL))
>> - prsc = PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL);
>> - }
>> -
>> - dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc);
>> -
>> - reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
>> - ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
>> - ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
>> - (prsc << 8) |
>> - ((0x26 << 16) & ATMEL_TSADCC_STARTUP) |
>> - ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC);
>> -
>> - atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
>> - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
>> - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
>> - atmel_tsadcc_write(ATMEL_TSADCC_TSR,
>> - (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM);
>> -
>> - atmel_tsadcc_read(ATMEL_TSADCC_SR);
>> - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
>> -
>> - /* All went ok, so register to the input system */
>> - err = input_register_device(input_dev);
>> - if (err)
>> - goto err_fail;
>> -
>> - return 0;
>> -
>> -err_fail:
>> - clk_disable(ts_dev->clk);
>> - clk_put(ts_dev->clk);
>> -err_free_irq:
>> - free_irq(ts_dev->irq, ts_dev);
>> -err_unmap_regs:
>> - iounmap(tsc_base);
>> -err_release_mem:
>> - release_mem_region(res->start, resource_size(res));
>> -err_free_dev:
>> - input_free_device(input_dev);
>> -err_free_mem:
>> - kfree(ts_dev);
>> - return err;
>> -}
>> -
>> -static int atmel_tsadcc_remove(struct platform_device *pdev)
>> -{
>> - struct atmel_tsadcc *ts_dev = platform_get_drvdata(pdev);
>> - struct resource *res;
>> -
>> - free_irq(ts_dev->irq, ts_dev);
>> -
>> - input_unregister_device(ts_dev->input);
>> -
>> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> - iounmap(tsc_base);
>> - release_mem_region(res->start, resource_size(res));
>> -
>> - clk_disable(ts_dev->clk);
>> - clk_put(ts_dev->clk);
>> -
>> - kfree(ts_dev);
>> -
>> - return 0;
>> -}
>> -
>> -static struct platform_driver atmel_tsadcc_driver = {
>> - .probe = atmel_tsadcc_probe,
>> - .remove = atmel_tsadcc_remove,
>> - .driver = {
>> - .name = "atmel_tsadcc",
>> - },
>> -};
>> -module_platform_driver(atmel_tsadcc_driver);
>> -
>> -MODULE_LICENSE("GPL");
>> -MODULE_DESCRIPTION("Atmel TouchScreen Driver");
>> -MODULE_AUTHOR("Dan Liang <dan.liang@atmel.com>");
>> -
>> --
>> 1.8.3.2
>>
>
^ permalink raw reply
* Re: [PATCH 00/15] iio: adc: at91 cleanups and atmel_tsadcc removal
From: Jonathan Cameron @ 2014-03-16 18:30 UTC (permalink / raw)
To: Alexandre Belloni, Nicolas Ferre, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <1394040940-18246-1-git-send-email-alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On 05/03/14 17:35, Alexandre Belloni wrote:
> This patch set is a followup of my previous series: iio: adc: at91 fixes
>
> I'm sorry it is so long, I made sure this is bissectable.
It's a nice series, don't apologise for doing things right!
Clearly there are a few outstanding snippets from the reviews so far, but we
are getting to the point where we need to agree on a path for this. I'm
happy to take the whole series through the IIO tree if Dmitry and the at91
maintainers are happy with that. If it is considered two invasive form the
atmel side then I'm perfectly happy with someone to take it through the relevant
platform tree instead.
I'm obviously not going to pick it up at all until it has a complete set
of at91 maintainer acks though!
Realistically it's missed the coming merge window anyway, so we have a fair
bit of time.
Jonathan
>
> 1-3) The first 3 patches are cleaning up the patform_data used for at91_adc.
>
> 4-5) Then touchscreen support for older ADCs is added, this allows to use that
> for the sam9m10g45ek.
>
> 6) Following those modifications, the mach/at91_adc.h is not used anywhere but
> in the at91_adc driver so it is remove and its content (register definitions)
> placed directly in the driver.
>
> 7-9) at91sam9rl support is added to at91_adc and is used for the at91sam9rl
> based boards.
>
> 10-11) Prepare the atmel_tsadcc removal by switching sam9rl and sam9g45 to use
> only at91_adc instead of atmel_tsadcc.
>
> 12-15) atmel_tsadcc removal
>
>
> Alexandre Belloni (15):
> ARM: at91: sam9g45: remove unused platform_data
> ARM: at91: sam9260: remove unused platform_data
> iio: adc: at91: cleanup platform_data
> iio: adc: at91_adc: Add support for touchscreens without TSMR
> ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc
> iio: adc: at91: remove unused include from include/mach
> iio: adc: at91: add sam9rl support
> ARM: at91: sam9rl: add at91_adc to support adc and touchscreen
> ARM: at91: sam9rlek add touchscreen support through at91_adc
> ARM: at91: sam9g45: switch from atmel_tsadcc to at91_adc
> ARM: at91: sam9rl: switch from atmel_tsadcc to at91_adc
> ARM: at91: remove atmel_tsadcc platform_data
> ARM: at91: remove atmel_tsadcc from sama5_defconfig
> Input: atmel_tsadcc: remove driver
> ARM: at91/dt: at91-cosino_mega2560 remove useless tsadcc node
>
> MAINTAINERS | 6 -
> arch/arm/boot/dts/at91-cosino_mega2560.dts | 5 -
> arch/arm/configs/at91sam9g45_defconfig | 3 +-
> arch/arm/configs/at91sam9rl_defconfig | 3 +-
> arch/arm/configs/sama5_defconfig | 1 -
> arch/arm/mach-at91/at91sam9260_devices.c | 10 -
> arch/arm/mach-at91/at91sam9g45.c | 2 +-
> arch/arm/mach-at91/at91sam9g45_devices.c | 63 +----
> arch/arm/mach-at91/at91sam9rl.c | 7 +
> arch/arm/mach-at91/at91sam9rl_devices.c | 83 +++++--
> arch/arm/mach-at91/board-sam9m10g45ek.c | 16 +-
> arch/arm/mach-at91/board-sam9rlek.c | 16 +-
> arch/arm/mach-at91/board.h | 3 -
> arch/arm/mach-at91/include/mach/at91_adc.h | 107 ---------
> drivers/iio/adc/at91_adc.c | 339 +++++++++++++++++++++++----
> drivers/input/touchscreen/Kconfig | 12 -
> drivers/input/touchscreen/Makefile | 1 -
> drivers/input/touchscreen/atmel_tsadcc.c | 358 -----------------------------
> include/linux/platform_data/at91_adc.h | 27 +--
> include/linux/platform_data/atmel.h | 7 -
> 20 files changed, 380 insertions(+), 689 deletions(-)
> delete mode 100644 arch/arm/mach-at91/include/mach/at91_adc.h
> delete mode 100644 drivers/input/touchscreen/atmel_tsadcc.c
>
^ permalink raw reply
* Re: [PATCH 04/15] iio: adc: at91_adc: Add support for touchscreens without TSMR
From: Alexandre Belloni @ 2014-03-16 19:16 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Nicolas Ferre, Dmitry Torokhov, Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <5325EA96.9000907-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On 16/03/2014 at 18:16:54 +0000, Jonathan Cameron wrote :
> On 05/03/14 17:35, Alexandre Belloni wrote:
> >Old ADCs, as present on the sam9rl and the sam9g45 don't have a TSMR register
> >and the touchscreen support should be handled differently.
> >
> >Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> One comment inline about handling of devices where the platform data doesn't
> include the touchscreen type. I'd expect zero to be the current default
> rather than NONE...
> >diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
> >index fcf73879dbfe..7819fc787731 100644
> >--- a/include/linux/platform_data/at91_adc.h
> >+++ b/include/linux/platform_data/at91_adc.h
> >@@ -7,6 +7,12 @@
> > #ifndef _AT91_ADC_H_
> > #define _AT91_ADC_H_
> >
> >+enum atmel_adc_ts_type {
> This means that the default for existing touch screens (where the platform
> data won't include setting this value) will be none. Is that correct?
> >+ ATMEL_ADC_TOUCHSCREEN_NONE = 0,
> >+ ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
> >+ ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
> >+};
> >+
This is actually just a snippet that I moved from at91_adc.c to
at91_adc.h. I followed the current behavior. Until now, using the
touchscreen was only supported through device tree and touchscreen
handling was not activated unless the atmel,adc-ts-wires property is
present. I guess this is the sane way to go because when you use the
touchscreen, you lose the triggers.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH 14/15] Input: atmel_tsadcc: remove driver
From: Dmitry Torokhov @ 2014-03-16 19:26 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Alexandre Belloni, Nicolas Ferre,
Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <5325ECE3.5090800-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On Sunday, March 16, 2014 06:26:43 PM Jonathan Cameron wrote:
> On 05/03/14 18:46, Dmitry Torokhov wrote:
> > On Wed, Mar 05, 2014 at 06:35:39PM +0100, Alexandre Belloni wrote:
> >> The atmel_tsadcc driver is not used anymore, it has been replaced by
> >> at91_adc so remove it.
> >>
> >> Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >
> > Acked-by: Dmitry Torokhov <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>
> All the rest of this series looks fine to me.
>
> Dmitry, are you happy for me to take this whole series through IIO once
> the last few bits are pinned down? If the atmel guys want to take the whole
> thing through their tree I'm also happy with that.
>
> Not sure what the lowest pain route will be...
Jonathan,
I am fine with either one of these 2 options.
Thanks.
--
Dmitry
^ permalink raw reply
* Re: [PATCH 00/15] iio: adc: at91 cleanups and atmel_tsadcc removal
From: Alexandre Belloni @ 2014-03-16 19:29 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Nicolas Ferre, Dmitry Torokhov, Jean-Christophe Plagniol-Villard,
linux-kernel, linux-arm-kernel, linux-iio, linux-input,
Maxime Ripard, Gregory Clement
In-Reply-To: <5325EDAF.4060003@kernel.org>
Hi,
On 16/03/2014 at 18:30:07 +0000, Jonathan Cameron wrote :
> On 05/03/14 17:35, Alexandre Belloni wrote:
> >This patch set is a followup of my previous series: iio: adc: at91 fixes
> >
> >I'm sorry it is so long, I made sure this is bissectable.
> It's a nice series, don't apologise for doing things right!
>
> Clearly there are a few outstanding snippets from the reviews so far, but we
> are getting to the point where we need to agree on a path for this. I'm
> happy to take the whole series through the IIO tree if Dmitry and the at91
> maintainers are happy with that. If it is considered two invasive form the
> atmel side then I'm perfectly happy with someone to take it through the relevant
> platform tree instead.
>
> I'm obviously not going to pick it up at all until it has a complete set
> of at91 maintainer acks though!
>
Thank you for your review.
I already have a v2 ready addressing the received comments. I was mostly
waiting on your feedback and you seem happy with it. I'll send an update
on monday with the collected acks.
I'll let the at91 maintainer ack it and decide on the path.
> Realistically it's missed the coming merge window anyway, so we have a fair
> bit of time.
>
That's why I've separated that series from the other fixes, this was not
as urgent.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH 05/15] ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc
From: Alexandre Belloni @ 2014-03-16 20:00 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Nicolas Ferre, Dmitry Torokhov, Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <5325EB01.5060700-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On 16/03/2014 at 18:18:41 +0000, Jonathan Cameron wrote :
> On 05/03/14 17:35, Alexandre Belloni wrote:
> >at91_adc now supports reading a touchscreen for ADCs without a TSMR register.
> >Enable touchscreen support through at91_adc. This allows to use both a
> >touchscreen and the remaining ADC channel at the same time.
> >
> >Also, lower the clock for the ADC as it allows to have more stable reads and
> >this is the speed used by atmel_tsadcc.
> Are there any side effects on the adc read if that functionality was previously
> being used? I doubt it matters, but probably wants to be mentioned here if there
> is.
Hum, it lowers the throughput rate but I really doubt anyone is trying
to achieve 440000 samples per second under linux ;) At that frequency,
we are still able to achieve 12958 samples per second so I guess this is
fine as from my experience, the CPU can't really keep up when reading
500 samples per seconds. I will include that in the commit log.
> >Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >---
> > arch/arm/mach-at91/at91sam9g45.c | 2 +-
> > arch/arm/mach-at91/board-sam9m10g45ek.c | 1 +
> > 2 files changed, 2 insertions(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> >index 2f455ce35268..3c519a7a938f 100644
> >--- a/arch/arm/mach-at91/at91sam9g45.c
> >+++ b/arch/arm/mach-at91/at91sam9g45.c
> >@@ -181,7 +181,7 @@ static struct clk vdec_clk = {
> > static struct clk adc_op_clk = {
> > .name = "adc_op_clk",
> > .type = CLK_TYPE_PERIPHERAL,
> >- .rate_hz = 13200000,
> >+ .rate_hz = 300000,
> > };
> >
> > /* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
> >diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
> >index ef39078c8ce2..4d775b796ce4 100644
> >--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
> >+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
> >@@ -315,6 +315,7 @@ static struct at91_adc_data ek_adc_data = {
> > .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),
> > .use_external_triggers = true,
> > .vref = 3300,
> >+ .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE,
> > };
> >
> > /*
> >
>
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH 04/15] iio: adc: at91_adc: Add support for touchscreens without TSMR
From: Jonathan Cameron @ 2014-03-16 20:28 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Nicolas Ferre, Dmitry Torokhov, Jean-Christophe Plagniol-Villard,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, Maxime Ripard,
Gregory Clement
In-Reply-To: <20140316191639.GJ3106-m++hUPXGwpdeoWH0uzbU5w@public.gmane.org>
On March 16, 2014 7:16:39 PM GMT+00:00, Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>On 16/03/2014 at 18:16:54 +0000, Jonathan Cameron wrote :
>> On 05/03/14 17:35, Alexandre Belloni wrote:
>> >Old ADCs, as present on the sam9rl and the sam9g45 don't have a TSMR
>register
>> >and the touchscreen support should be handled differently.
>> >
>> >Signed-off-by: Alexandre Belloni
><alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>> One comment inline about handling of devices where the platform data
>doesn't
>> include the touchscreen type. I'd expect zero to be the current
>default
>> rather than NONE...
>> >diff --git a/include/linux/platform_data/at91_adc.h
>b/include/linux/platform_data/at91_adc.h
>> >index fcf73879dbfe..7819fc787731 100644
>> >--- a/include/linux/platform_data/at91_adc.h
>> >+++ b/include/linux/platform_data/at91_adc.h
>> >@@ -7,6 +7,12 @@
>> > #ifndef _AT91_ADC_H_
>> > #define _AT91_ADC_H_
>> >
>> >+enum atmel_adc_ts_type {
>> This means that the default for existing touch screens (where the
>platform
>> data won't include setting this value) will be none. Is that
>correct?
>> >+ ATMEL_ADC_TOUCHSCREEN_NONE = 0,
>> >+ ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
>> >+ ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
>> >+};
>> >+
>
>This is actually just a snippet that I moved from at91_adc.c to
>at91_adc.h. I followed the current behavior. Until now, using the
>touchscreen was only supported through device tree and touchscreen
>handling was not activated unless the atmel,adc-ts-wires property is
>present. I guess this is the sane way to go because when you use the
>touchscreen, you lose the triggers.
Ah. Thanks for clearing that up. I missed that it previously existed entirely..
--
Sent from my Android phone with K-9 Mail. Please excuse my brevity.
^ permalink raw reply
* Re: [PATCH] hid: fix bug destroying hidraw device files after parent
From: Fernando Luis Vázquez Cao @ 2014-03-17 3:14 UTC (permalink / raw)
To: Jiri Kosina
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA, Nestor Lopez Casado,
Greg Kroah-Hartman, Tejun Heo
In-Reply-To: <alpine.LNX.2.00.1402261101540.5466-ztGlSCb7Y1iN3ZZ/Hiejyg@public.gmane.org>
Hi Jiri,
On 02/26/2014 07:02 PM, Jiri Kosina wrote:
[...]
> Applied, thanks.
>
> I have slightly modified the patch title to make sure that it's obvious
> that what it fixes is actually a WARN_ON() splat.
Thank you.
Any chance we can get this to Linus before 3.14 comes out?
According to Linus, rc7 may be the last rc.
- Fernando
--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v2 5/8] regulator: AXP20x: Add support for regulators subsystem
From: Krzysztof Kozlowski @ 2014-03-17 8:19 UTC (permalink / raw)
To: Carlo Caione
Cc: linux-arm-kernel, linux-sunxi, maxime.ripard, hdegoede, emilio,
wens, sameo, lee.jones, devicetree, dmitry.torokhov, linux-input,
linux-doc, lgirdwood, broonie
In-Reply-To: <1394898225-28452-6-git-send-email-carlo@caione.org>
>
> AXP202 and AXP209 come with two synchronous step-down DC-DCs and five
> LDOs. This patch introduces basic support for those regulators.
>
> Signed-off-by: Carlo Caione <carlo@caione.org>
> ---
> drivers/regulator/Kconfig | 7 +
> drivers/regulator/Makefile | 1 +
> drivers/regulator/axp20x-regulator.c | 293 +++++++++++++++++++++++++++++++++++
> 3 files changed, 301 insertions(+)
> create mode 100644 drivers/regulator/axp20x-regulator.c
>
> diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
> index 6a79328..9f3bc48 100644
> --- a/drivers/regulator/Kconfig
> +++ b/drivers/regulator/Kconfig
> @@ -139,6 +139,13 @@ config REGULATOR_AS3722
> AS3722 PMIC. This will enable support for all the software
> controllable DCDC/LDO regulators.
>
> +config REGULATOR_AXP20X
> + tristate "X-POWERS AXP20X PMIC Regulators"
> + depends on MFD_AXP20X
> + help
> + This driver provides support for the voltage regulators on the
> + AXP20X PMIC.
> +
> config REGULATOR_DA903X
> tristate "Dialog Semiconductor DA9030/DA9034 regulators"
> depends on PMIC_DA903X
> diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
> index 979f9dd..1dd084a 100644
> --- a/drivers/regulator/Makefile
> +++ b/drivers/regulator/Makefile
> @@ -20,6 +20,7 @@ obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o
> obj-$(CONFIG_REGULATOR_ARIZONA) += arizona-micsupp.o arizona-ldo1.o
> obj-$(CONFIG_REGULATOR_AS3711) += as3711-regulator.o
> obj-$(CONFIG_REGULATOR_AS3722) += as3722-regulator.o
> +obj-$(CONFIG_REGULATOR_AXP20X) += axp20x-regulator.o
> obj-$(CONFIG_REGULATOR_DA903X) += da903x.o
> obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o
> obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o
> diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
> new file mode 100644
> index 0000000..f09fe35
> --- /dev/null
> +++ b/drivers/regulator/axp20x-regulator.c
> @@ -0,0 +1,293 @@
> +/*
> + * AXP20x regulators driver.
> + *
> + * Copyright (C) 2013 Carlo Caione <carlo@caione.org>
> + *
> + * This file is subject to the terms and conditions of the GNU General
> + * Public License. See the file "COPYING" in the main directory of this
> + * archive for more details.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/axp20x.h>
> +#include <linux/regulator/driver.h>
> +#include <linux/regulator/of_regulator.h>
> +
> +#define AXP20X_IO_ENABLED (0x03)
> +#define AXP20X_IO_DISABLED (0x07)
> +
> +#define AXP20X_WORKMODE_DCDC2_MASK BIT(2)
> +#define AXP20X_WORKMODE_DCDC3_MASK BIT(1)
> +
> +#define AXP20X_FREQ_DCDC_MASK (0x0f)
> +
> +struct axp20x_regulators {
> + struct regulator_desc rdesc[AXP20X_REG_ID_MAX];
> + struct regulator_dev *rdev[AXP20X_REG_ID_MAX];
Hi,
You can get rid of 'rdev' field completely now since you are using
devm_regulator_register(). It isn't used outside of probe().
The 'rdesc' field is also not essential. After removing it you can
remove completely the state container (struct axp20x_regulators).
> + struct axp20x_dev *axp20x;
> +};
> +
> +#define AXP20X_DESC_IO(_id, _min, _max, _step, _vreg, _vmask, _ereg, _emask, \
> + _enable_val, _disable_val) \
> + [AXP20X_##_id] = { \
> + .name = #_id, \
> + .type = REGULATOR_VOLTAGE, \
> + .id = AXP20X_##_id, \
> + .n_voltages = (((_max) - (_min)) / (_step) + 1), \
> + .owner = THIS_MODULE, \
> + .min_uV = (_min) * 1000, \
> + .uV_step = (_step) * 1000, \
> + .vsel_reg = (_vreg), \
> + .vsel_mask = (_vmask), \
> + .enable_reg = (_ereg), \
> + .enable_mask = (_emask), \
> + .enable_val = (_enable_val), \
> + .disable_val = (_disable_val), \
> + .ops = &axp20x_ops, \
> + }
> +
> +#define AXP20X_DESC(_id, _min, _max, _step, _vreg, _vmask, _ereg, _emask) \
> + AXP20X_DESC_IO(_id, _min, _max, _step, _vreg, _vmask, _ereg, _emask, \
> + 0, 0)
> +
> +#define AXP20X_DESC_FIXED(_id, _volt) \
> + [AXP20X_##_id] = { \
> + .name = #_id, \
> + .type = REGULATOR_VOLTAGE, \
> + .id = AXP20X_##_id, \
> + .n_voltages = 1, \
> + .owner = THIS_MODULE, \
> + .min_uV = (_volt) * 1000, \
> + .ops = &axp20x_ops, \
> + }
> +
> +#define AXP20X_DESC_TABLE(_id, _table, _vreg, _vmask, _ereg, _emask) \
> + [AXP20X_##_id] = { \
> + .name = #_id, \
> + .type = REGULATOR_VOLTAGE, \
> + .id = AXP20X_##_id, \
> + .n_voltages = ARRAY_SIZE(_table), \
> + .owner = THIS_MODULE, \
> + .vsel_reg = (_vreg), \
> + .vsel_mask = (_vmask), \
> + .enable_reg = (_ereg), \
> + .enable_mask = (_emask), \
> + .volt_table = (_table), \
> + .ops = &axp20x_ops_table, \
> + }
> +
> +static int axp20x_ldo4_data[] = { 1250000, 1300000, 1400000, 1500000, 1600000, 1700000,
> + 1800000, 1900000, 2000000, 2500000, 2700000, 2800000,
> + 3000000, 3100000, 3200000, 3300000 };
> +
> +static int axp20x_set_suspend_voltage(struct regulator_dev *rdev, int uV)
> +{
> + int sel = regulator_map_voltage_iterate(rdev, uV, uV);
> +
> + if (sel < 0)
> + return sel;
> +
> + return regulator_set_voltage_sel_regmap(rdev, sel);
> +}
> +
> +static struct regulator_ops axp20x_ops_table = {
> + .set_voltage_sel = regulator_set_voltage_sel_regmap,
> + .get_voltage_sel = regulator_get_voltage_sel_regmap,
> + .list_voltage = regulator_list_voltage_table,
> + .enable = regulator_enable_regmap,
> + .disable = regulator_disable_regmap,
> + .is_enabled = regulator_is_enabled_regmap,
> + .set_suspend_enable = regulator_enable_regmap,
> + .set_suspend_disable = regulator_disable_regmap,
> + .set_suspend_voltage = axp20x_set_suspend_voltage,
> +};
> +
> +
> +static struct regulator_ops axp20x_ops = {
> + .set_voltage_sel = regulator_set_voltage_sel_regmap,
> + .get_voltage_sel = regulator_get_voltage_sel_regmap,
> + .list_voltage = regulator_list_voltage_linear,
> + .enable = regulator_enable_regmap,
> + .disable = regulator_disable_regmap,
> + .is_enabled = regulator_is_enabled_regmap,
> + .set_suspend_enable = regulator_enable_regmap,
> + .set_suspend_disable = regulator_disable_regmap,
> + .set_suspend_voltage = axp20x_set_suspend_voltage,
> +};
> +
> +static struct regulator_desc axp20x_regulators[] = {
I think this should be 'static const'.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH v2 01/15] ARM: at91: sam9g45: remove unused platform_data
From: Alexandre Belloni @ 2014-03-17 13:56 UTC (permalink / raw)
To: Nicolas Ferre, Jonathan Cameron, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard, linux-kernel, linux-arm-kernel,
linux-iio, linux-input, Maxime Ripard, Gregory Clement,
Alexandre Belloni
In-Reply-To: <1395064628-644-1-git-send-email-alexandre.belloni@free-electrons.com>
num_channels and registers are not used anymore since they are defined inside
the at91_adc driver and assigned by matching the id_table.
Also, remove the mach/at91_adc.h include that is not necessary anymore.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
---
arch/arm/mach-at91/at91sam9g45_devices.c | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 88554024eb2d..cd36009c3511 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -25,7 +25,6 @@
#include <linux/fb.h>
#include <video/atmel_lcdc.h>
-#include <mach/at91_adc.h>
#include <mach/at91sam9g45.h>
#include <mach/at91sam9g45_matrix.h>
#include <mach/at91_matrix.h>
@@ -1235,13 +1234,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = {
},
};
-static struct at91_adc_reg_desc at91_adc_register_g45 = {
- .channel_base = AT91_ADC_CHR(0),
- .drdy_mask = AT91_ADC_DRDY,
- .status_register = AT91_ADC_SR,
- .trigger_register = 0x08,
-};
-
void __init at91_add_device_adc(struct at91_adc_data *data)
{
if (!data)
@@ -1267,9 +1259,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data)
if (data->use_external_triggers)
at91_set_A_periph(AT91_PIN_PD28, 0);
- data->num_channels = 8;
data->startup_time = 40;
- data->registers = &at91_adc_register_g45;
data->trigger_number = 4;
data->trigger_list = at91_adc_triggers;
--
1.8.3.2
^ permalink raw reply related
* [PATCH v2 02/15] ARM: at91: sam9260: remove unused platform_data
From: Alexandre Belloni @ 2014-03-17 13:56 UTC (permalink / raw)
To: Nicolas Ferre, Jonathan Cameron, Dmitry Torokhov
Cc: linux-iio, linux-kernel, Alexandre Belloni, linux-input,
Gregory Clement, Maxime Ripard, Jean-Christophe Plagniol-Villard,
linux-arm-kernel
In-Reply-To: <1395064628-644-1-git-send-email-alexandre.belloni@free-electrons.com>
num_channels and registers are not used anymore since they are defined inside
the at91_adc driver and assigned by matching the id_table.
Also, remove the mach/at91_adc.h include that is not necessary anymore.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
---
arch/arm/mach-at91/at91sam9260_devices.c | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 0a0315920963..a299c50512f0 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -24,7 +24,6 @@
#include <mach/at91sam9260_matrix.h>
#include <mach/at91_matrix.h>
#include <mach/at91sam9_smc.h>
-#include <mach/at91_adc.h>
#include "board.h"
#include "generic.h"
@@ -1321,13 +1320,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = {
},
};
-static struct at91_adc_reg_desc at91_adc_register_g20 = {
- .channel_base = AT91_ADC_CHR(0),
- .drdy_mask = AT91_ADC_DRDY,
- .status_register = AT91_ADC_SR,
- .trigger_register = AT91_ADC_MR,
-};
-
void __init at91_add_device_adc(struct at91_adc_data *data)
{
if (!data)
@@ -1345,9 +1337,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data)
if (data->use_external_triggers)
at91_set_A_periph(AT91_PIN_PA22, 0);
- data->num_channels = 4;
data->startup_time = 10;
- data->registers = &at91_adc_register_g20;
data->trigger_number = 4;
data->trigger_list = at91_adc_triggers;
--
1.8.3.2
^ permalink raw reply related
* [PATCH v2 03/15] iio: adc: at91: cleanup platform_data
From: Alexandre Belloni @ 2014-03-17 13:56 UTC (permalink / raw)
To: Nicolas Ferre, Jonathan Cameron, Dmitry Torokhov
Cc: linux-iio, linux-kernel, Alexandre Belloni, linux-input,
Gregory Clement, Maxime Ripard, Jean-Christophe Plagniol-Villard,
linux-arm-kernel
In-Reply-To: <1395064628-644-1-git-send-email-alexandre.belloni@free-electrons.com>
num_channels and registers are not used anymore since they are defined inside
the driver and assigned by matching the id_table.
Also, struct at91_adc_reg_desc is now only used inside the driver.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
---
drivers/iio/adc/at91_adc.c | 19 +++++++++++++++++++
include/linux/platform_data/at91_adc.h | 23 -----------------------
2 files changed, 19 insertions(+), 23 deletions(-)
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index 89777ed9abd8..1beae65aef2c 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -46,6 +46,25 @@
#define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
#define TOUCH_PEN_DETECT_DEBOUNCE_US 200
+/**
+ * struct at91_adc_reg_desc - Various informations relative to registers
+ * @channel_base: Base offset for the channel data registers
+ * @drdy_mask: Mask of the DRDY field in the relevant registers
+ (Interruptions registers mostly)
+ * @status_register: Offset of the Interrupt Status Register
+ * @trigger_register: Offset of the Trigger setup register
+ * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
+ * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
+ */
+struct at91_adc_reg_desc {
+ u8 channel_base;
+ u32 drdy_mask;
+ u8 status_register;
+ u8 trigger_register;
+ u32 mr_prescal_mask;
+ u32 mr_startup_mask;
+};
+
struct at91_adc_caps {
bool has_ts; /* Support touch screen */
bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */
diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
index b3ca1e94e0c8..fcf73879dbfe 100644
--- a/include/linux/platform_data/at91_adc.h
+++ b/include/linux/platform_data/at91_adc.h
@@ -8,25 +8,6 @@
#define _AT91_ADC_H_
/**
- * struct at91_adc_reg_desc - Various informations relative to registers
- * @channel_base: Base offset for the channel data registers
- * @drdy_mask: Mask of the DRDY field in the relevant registers
- (Interruptions registers mostly)
- * @status_register: Offset of the Interrupt Status Register
- * @trigger_register: Offset of the Trigger setup register
- * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
- * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
- */
-struct at91_adc_reg_desc {
- u8 channel_base;
- u32 drdy_mask;
- u8 status_register;
- u8 trigger_register;
- u32 mr_prescal_mask;
- u32 mr_startup_mask;
-};
-
-/**
* struct at91_adc_trigger - description of triggers
* @name: name of the trigger advertised to the user
* @value: value to set in the ADC's trigger setup register
@@ -42,8 +23,6 @@ struct at91_adc_trigger {
/**
* struct at91_adc_data - platform data for ADC driver
* @channels_used: channels in use on the board as a bitmask
- * @num_channels: global number of channels available on the board
- * @registers: Registers definition on the board
* @startup_time: startup time of the ADC in microseconds
* @trigger_list: Triggers available in the ADC
* @trigger_number: Number of triggers available in the ADC
@@ -52,8 +31,6 @@ struct at91_adc_trigger {
*/
struct at91_adc_data {
unsigned long channels_used;
- u8 num_channels;
- struct at91_adc_reg_desc *registers;
u8 startup_time;
struct at91_adc_trigger *trigger_list;
u8 trigger_number;
--
1.8.3.2
^ permalink raw reply related
* [PATCH v2 04/15] iio: adc: at91_adc: Add support for touchscreens without TSMR
From: Alexandre Belloni @ 2014-03-17 13:56 UTC (permalink / raw)
To: Nicolas Ferre, Jonathan Cameron, Dmitry Torokhov
Cc: linux-iio, linux-kernel, Alexandre Belloni, linux-input,
Gregory Clement, Maxime Ripard, Jean-Christophe Plagniol-Villard,
linux-arm-kernel
In-Reply-To: <1395064628-644-1-git-send-email-alexandre.belloni@free-electrons.com>
Old ADCs, as present on the sam9rl and the sam9g45 don't have a TSMR register
and the touchscreen support should be handled differently.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/include/mach/at91_adc.h | 13 ++
drivers/iio/adc/at91_adc.c | 200 ++++++++++++++++++++++-------
include/linux/platform_data/at91_adc.h | 8 ++
3 files changed, 174 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/at91_adc.h b/arch/arm/mach-at91/include/mach/at91_adc.h
index c287307b9a3b..7d80396346b2 100644
--- a/arch/arm/mach-at91/include/mach/at91_adc.h
+++ b/arch/arm/mach-at91/include/mach/at91_adc.h
@@ -20,6 +20,9 @@
#define AT91_ADC_START (1 << 1) /* Start Conversion */
#define AT91_ADC_MR 0x04 /* Mode Register */
+#define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
+#define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
+#define AT91_ADC_TSAMOD_TS_ONLY_MODE (1 << 0) /* Touch Screen Only Mode */
#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
#define AT91_ADC_TRGSEL_TC0 (0 << 1)
@@ -28,6 +31,7 @@
#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
+#define AT91_ADC_PENDET (1 << 6) /* Pen contact detection enable */
#define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */
#define AT91_ADC_PRESCAL_9G45 (0xff << 8)
#define AT91_ADC_PRESCAL_(x) ((x) << 8)
@@ -37,6 +41,12 @@
#define AT91_ADC_STARTUP_(x) ((x) << 16)
#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
#define AT91_ADC_SHTIM_(x) ((x) << 24)
+#define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */
+#define AT91_ADC_PENDBC_(x) ((x) << 28)
+
+#define AT91_ADC_TSR 0x0C
+#define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */
+#define AT91_ADC_TSR_SHTIM_(x) ((x) << 24)
#define AT91_ADC_CHER 0x10 /* Channel Enable Register */
#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
@@ -60,6 +70,8 @@
#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
+#define AT91RL_ADC_IER_PEN (1 << 20)
+#define AT91RL_ADC_IER_NOPEN (1 << 21)
#define AT91_ADC_IER_PEN (1 << 29)
#define AT91_ADC_IER_NOPEN (1 << 30)
#define AT91_ADC_IER_XRDY (1 << 20)
@@ -102,6 +114,7 @@
#define AT91_ADC_TRGR_TRGPER (0xffff << 16)
#define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16)
#define AT91_ADC_TRGR_TRGMOD (0x7 << 0)
+#define AT91_ADC_TRGR_NONE (0 << 0)
#define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0)
#endif
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index 1beae65aef2c..c0e4206e34e5 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -46,6 +46,10 @@
#define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
#define TOUCH_PEN_DETECT_DEBOUNCE_US 200
+#define MAX_RLPOS_BITS 10
+#define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */
+#define TOUCH_SHTIM 0xa
+
/**
* struct at91_adc_reg_desc - Various informations relative to registers
* @channel_base: Base offset for the channel data registers
@@ -83,12 +87,6 @@ struct at91_adc_caps {
struct at91_adc_reg_desc registers;
};
-enum atmel_adc_ts_type {
- ATMEL_ADC_TOUCHSCREEN_NONE = 0,
- ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
- ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
-};
-
struct at91_adc_state {
struct clk *adc_clk;
u16 *buffer;
@@ -133,6 +131,11 @@ struct at91_adc_state {
u16 ts_sample_period_val;
u32 ts_pressure_threshold;
+ u16 ts_pendbc;
+
+ bool ts_bufferedmeasure;
+ u32 ts_prev_absx;
+ u32 ts_prev_absy;
};
static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
@@ -239,7 +242,72 @@ static int at91_ts_sample(struct at91_adc_state *st)
return 0;
}
-static irqreturn_t at91_adc_interrupt(int irq, void *private)
+static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)
+{
+ struct iio_dev *idev = private;
+ struct at91_adc_state *st = iio_priv(idev);
+ u32 status = at91_adc_readl(st, st->registers->status_register);
+ unsigned int reg;
+
+ status &= at91_adc_readl(st, AT91_ADC_IMR);
+ if (status & st->registers->drdy_mask)
+ handle_adc_eoc_trigger(irq, idev);
+
+ if (status & AT91RL_ADC_IER_PEN) {
+ /* Disabling pen debounce is required to get a NOPEN irq */
+ reg = at91_adc_readl(st, AT91_ADC_MR);
+ reg &= ~AT91_ADC_PENDBC;
+ at91_adc_writel(st, AT91_ADC_MR, reg);
+
+ at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
+ at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN
+ | AT91_ADC_EOC(3));
+ /* Set up period trigger for sampling */
+ at91_adc_writel(st, st->registers->trigger_register,
+ AT91_ADC_TRGR_MOD_PERIOD_TRIG |
+ AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
+ } else if (status & AT91RL_ADC_IER_NOPEN) {
+ reg = at91_adc_readl(st, AT91_ADC_MR);
+ reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
+ at91_adc_writel(st, AT91_ADC_MR, reg);
+ at91_adc_writel(st, st->registers->trigger_register,
+ AT91_ADC_TRGR_NONE);
+
+ at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN
+ | AT91_ADC_EOC(3));
+ at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
+ st->ts_bufferedmeasure = false;
+ input_report_key(st->ts_input, BTN_TOUCH, 0);
+ input_sync(st->ts_input);
+ } else if (status & AT91_ADC_EOC(3)) {
+ /* Conversion finished */
+ if (st->ts_bufferedmeasure) {
+ /*
+ * Last measurement is always discarded, since it can
+ * be erroneous.
+ * Always report previous measurement
+ */
+ input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
+ input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
+ input_report_key(st->ts_input, BTN_TOUCH, 1);
+ input_sync(st->ts_input);
+ } else
+ st->ts_bufferedmeasure = true;
+
+ /* Now make new measurement */
+ st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
+ << MAX_RLPOS_BITS;
+ st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
+
+ st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
+ << MAX_RLPOS_BITS;
+ st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)
{
struct iio_dev *idev = private;
struct at91_adc_state *st = iio_priv(idev);
@@ -672,6 +740,8 @@ static int at91_adc_probe_dt_ts(struct device_node *node,
return -EINVAL;
}
+ if (!st->caps->has_tsmr)
+ return 0;
prop = 0;
of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
st->ts_pressure_threshold = prop;
@@ -795,6 +865,7 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
st->trigger_number = pdata->trigger_number;
st->trigger_list = pdata->trigger_list;
st->registers = &st->caps->registers;
+ st->touchscreen_type = pdata->touchscreen_type;
return 0;
}
@@ -809,7 +880,10 @@ static int atmel_ts_open(struct input_dev *dev)
{
struct at91_adc_state *st = input_get_drvdata(dev);
- at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
+ if (st->caps->has_tsmr)
+ at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
+ else
+ at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
return 0;
}
@@ -817,45 +891,61 @@ static void atmel_ts_close(struct input_dev *dev)
{
struct at91_adc_state *st = input_get_drvdata(dev);
- at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
+ if (st->caps->has_tsmr)
+ at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
+ else
+ at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
}
static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
{
- u32 reg = 0, pendbc;
+ u32 reg = 0;
int i = 0;
- if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
- reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
- else
- reg = AT91_ADC_TSMR_TSMODE_5WIRE;
-
/* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
* pen detect noise.
* The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
*/
- pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1);
+ st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
+ 1000, 1);
- while (pendbc >> ++i)
+ while (st->ts_pendbc >> ++i)
; /* Empty! Find the shift offset */
- if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1))))
- pendbc = i;
+ if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
+ st->ts_pendbc = i;
else
- pendbc = i - 1;
+ st->ts_pendbc = i - 1;
- if (st->caps->has_tsmr) {
- reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
- & AT91_ADC_TSMR_TSAV;
- reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC;
- reg |= AT91_ADC_TSMR_NOTSDMA;
- reg |= AT91_ADC_TSMR_PENDET_ENA;
- reg |= 0x03 << 8; /* TSFREQ, need bigger than TSAV */
-
- at91_adc_writel(st, AT91_ADC_TSMR, reg);
- } else {
- /* TODO: for 9g45 which has no TSMR */
+ if (!st->caps->has_tsmr) {
+ reg = at91_adc_readl(st, AT91_ADC_MR);
+ reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;
+
+ reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
+ at91_adc_writel(st, AT91_ADC_MR, reg);
+
+ reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;
+ at91_adc_writel(st, AT91_ADC_TSR, reg);
+
+ st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
+ adc_clk_khz / 1000) - 1, 1);
+
+ return 0;
}
+ if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
+ reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
+ else
+ reg = AT91_ADC_TSMR_TSMODE_5WIRE;
+
+ reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
+ & AT91_ADC_TSMR_TSAV;
+ reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
+ reg |= AT91_ADC_TSMR_NOTSDMA;
+ reg |= AT91_ADC_TSMR_PENDET_ENA;
+ reg |= 0x03 << 8; /* TSFREQ, needs to be bigger than TSAV */
+
+ at91_adc_writel(st, AT91_ADC_TSMR, reg);
+
/* Change adc internal resistor value for better pen detection,
* default value is 100 kOhm.
* 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
@@ -864,7 +954,7 @@ static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
& AT91_ADC_ACR_PENDETSENS);
- /* Sample Peroid Time = (TRGPER + 1) / ADCClock */
+ /* Sample Period Time = (TRGPER + 1) / ADCClock */
st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
adc_clk_khz / 1000) - 1, 1);
@@ -893,17 +983,37 @@ static int at91_ts_register(struct at91_adc_state *st,
__set_bit(EV_ABS, input->evbit);
__set_bit(EV_KEY, input->evbit);
__set_bit(BTN_TOUCH, input->keybit);
- input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
- input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
- input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
+ if (st->caps->has_tsmr) {
+ input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
+ 0, 0);
+ input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
+ 0, 0);
+ input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
+ } else {
+ if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
+ dev_err(&pdev->dev,
+ "This touchscreen controller only support 4 wires\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
+ 0, 0);
+ input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
+ 0, 0);
+ }
st->ts_input = input;
input_set_drvdata(input, st);
ret = input_register_device(input);
if (ret)
- input_free_device(st->ts_input);
+ goto err;
+
+ return ret;
+err:
+ input_free_device(st->ts_input);
return ret;
}
@@ -962,11 +1072,13 @@ static int at91_adc_probe(struct platform_device *pdev)
*/
at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
- ret = request_irq(st->irq,
- at91_adc_interrupt,
- 0,
- pdev->dev.driver->name,
- idev);
+
+ if (st->caps->has_tsmr)
+ ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0,
+ pdev->dev.driver->name, idev);
+ else
+ ret = request_irq(st->irq, at91_adc_rl_interrupt, 0,
+ pdev->dev.driver->name, idev);
if (ret) {
dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
return ret;
@@ -1070,12 +1182,6 @@ static int at91_adc_probe(struct platform_device *pdev)
goto error_disable_adc_clk;
}
} else {
- if (!st->caps->has_tsmr) {
- dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
- ret = -ENODEV;
- goto error_disable_adc_clk;
- }
-
ret = at91_ts_register(st, pdev);
if (ret)
goto error_disable_adc_clk;
diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
index fcf73879dbfe..7819fc787731 100644
--- a/include/linux/platform_data/at91_adc.h
+++ b/include/linux/platform_data/at91_adc.h
@@ -7,6 +7,12 @@
#ifndef _AT91_ADC_H_
#define _AT91_ADC_H_
+enum atmel_adc_ts_type {
+ ATMEL_ADC_TOUCHSCREEN_NONE = 0,
+ ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
+ ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
+};
+
/**
* struct at91_adc_trigger - description of triggers
* @name: name of the trigger advertised to the user
@@ -28,6 +34,7 @@ struct at91_adc_trigger {
* @trigger_number: Number of triggers available in the ADC
* @use_external_triggers: does the board has external triggers availables
* @vref: Reference voltage for the ADC in millivolts
+ * @touchscreen_type: If a touchscreen is connected, its type (4 or 5 wires)
*/
struct at91_adc_data {
unsigned long channels_used;
@@ -36,6 +43,7 @@ struct at91_adc_data {
u8 trigger_number;
bool use_external_triggers;
u16 vref;
+ enum atmel_adc_ts_type touchscreen_type;
};
extern void __init at91_add_device_adc(struct at91_adc_data *data);
--
1.8.3.2
^ permalink raw reply related
* [PATCH v2 05/15] ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc
From: Alexandre Belloni @ 2014-03-17 13:56 UTC (permalink / raw)
To: Nicolas Ferre, Jonathan Cameron, Dmitry Torokhov
Cc: Jean-Christophe Plagniol-Villard, linux-kernel, linux-arm-kernel,
linux-iio, linux-input, Maxime Ripard, Gregory Clement,
Alexandre Belloni
In-Reply-To: <1395064628-644-1-git-send-email-alexandre.belloni@free-electrons.com>
at91_adc now supports reading a touchscreen for ADCs without a TSMR register.
Enable touchscreen support through at91_adc. This allows to use both a
touchscreen and the remaining ADC channel at the same time.
Also, lower the clock for the ADC as it allows to have more stable reads and
this is the speed used by atmel_tsadcc.
It lowers the maximum throughput rate from 440000 samples per second to 12958
samples per second. It shouldn't be an issue as the CPU is not able to keep up
reading samples at that frequency.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9g45.c | 2 +-
arch/arm/mach-at91/board-sam9m10g45ek.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 2f455ce35268..3c519a7a938f 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -181,7 +181,7 @@ static struct clk vdec_clk = {
static struct clk adc_op_clk = {
.name = "adc_op_clk",
.type = CLK_TYPE_PERIPHERAL,
- .rate_hz = 13200000,
+ .rate_hz = 300000,
};
/* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index ef39078c8ce2..4d775b796ce4 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -315,6 +315,7 @@ static struct at91_adc_data ek_adc_data = {
.channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),
.use_external_triggers = true,
.vref = 3300,
+ .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE,
};
/*
--
1.8.3.2
^ permalink raw reply related
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