* Re: [PATCH 2/3] IIO: Add iio_chan modifier for True/Magnetic North HID usages
From: Jonathan Cameron @ 2014-05-31 10:14 UTC (permalink / raw)
To: Reyad Attiyat, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
srinivas.pandruvada-VuQAYsv1563Yd54FQh9/CA,
linux-input-u79uwXL29TY76Z2rM5mHXA, jkosina-AlSwsSmVLrQ
In-Reply-To: <1401311175-12784-3-git-send-email-reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 28/05/14 22:06, Reyad Attiyat wrote:
> Updated iio_chan_info_enum for compass north sensor usages,
> including magnetic/true north and tilt compensation.
>
> Signed-off-by: Reyad Attiyat <reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> drivers/iio/industrialio-core.c | 4 ++++
> include/linux/iio/types.h | 4 ++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
> index ede16aec..41bd377 100644
> --- a/drivers/iio/industrialio-core.c
> +++ b/drivers/iio/industrialio-core.c
> @@ -84,6 +84,10 @@ static const char * const iio_modifier_names[] = {
> [IIO_MOD_LIGHT_RED] = "red",
> [IIO_MOD_LIGHT_GREEN] = "green",
> [IIO_MOD_LIGHT_BLUE] = "blue",
> + [IIO_MOD_MAGN_NORTH] = "north",
> + [IIO_MOD_MAGN_NORTH_TRUE] = "north_true",
> + [IIO_MOD_MAGN_NORTH_TILT_COMP] = "north_tilt_comp",
> + [IIO_MOD_MAGN_NORTH_TRUE_TILT_COMP] = "north_true_tilt_comp",
> };
I think we need the naming to explicitly mention north_magnetic instead
of just north. Whilst it is obvious what north means when you have north
true alongside it, it won't be so obvious if one just has the north attribute
to see in a particular driver - if anything I'd have the true as the one
that was simply called north (as it might not be coming from a magnetometer
thought obviously that's the most common source) I'd also rather the enum entries
were
IIO_MOD_NORTH_MAGN
IIO_MOD_NORTH_TRUE
IIO_MOD_NORTH_MAGN_TILT_COMP
IIO_MOD_NORTH_TRUE_TILT_COMP
It is definitely feasible that they will not come from magnetometers -
a differential bearing is common on GPS units.
>
> /* relies on pairs of these shared then separate */
> diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
> index 084d882..f1e8be6 100644
> --- a/include/linux/iio/types.h
> +++ b/include/linux/iio/types.h
> @@ -53,6 +53,10 @@ enum iio_modifier {
> IIO_MOD_LIGHT_RED,
> IIO_MOD_LIGHT_GREEN,
> IIO_MOD_LIGHT_BLUE,
> + IIO_MOD_MAGN_NORTH,
> + IIO_MOD_MAGN_NORTH_TRUE,
> + IIO_MOD_MAGN_NORTH_TILT_COMP,
> + IIO_MOD_MAGN_NORTH_TRUE_TILT_COMP
> };
>
> enum iio_event_type {
>
^ permalink raw reply
* Re: [PATCH 2/2] gpio: gpiolib: set gpiochip_remove retval to void
From: Dan Carpenter @ 2014-05-31 12:19 UTC (permalink / raw)
To: Lars-Peter Clausen
Cc: Linux MIPS Mailing List, David Daney, Linux-sh list,
Linus Walleij, platform-driver-x86, linux-leds@vger.kernel.org,
driverdevel, Alexandre Courbot, patches, linux-samsungsoc,
Geert Uytterhoeven, linux-input@vger.kernel.org,
Linux Media Mailing List, spear-devel, linux-gpio@vger.kernel.org,
m, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
linux-wireless, linux-kernel
In-Reply-To: <5389864B.4000107@metafoo.de>
On Sat, May 31, 2014 at 09:35:39AM +0200, Lars-Peter Clausen wrote:
> On 05/31/2014 01:29 AM, Greg KH wrote:
> >On Fri, May 30, 2014 at 08:16:59PM +0200, Lars-Peter Clausen wrote:
> >>On 05/30/2014 07:33 PM, David Daney wrote:
> >>>On 05/30/2014 04:39 AM, Geert Uytterhoeven wrote:
> >>>>On Fri, May 30, 2014 at 1:30 PM, abdoulaye berthe <berthe.ab@gmail.com>
> >>>>wrote:
> >>>>>--- a/drivers/gpio/gpiolib.c
> >>>>>+++ b/drivers/gpio/gpiolib.c
> >>>>>@@ -1263,10 +1263,9 @@ static void gpiochip_irqchip_remove(struct
> >>>>>gpio_chip *gpiochip);
> >>>>> *
> >>>>> * A gpio_chip with any GPIOs still requested may not be removed.
> >>>>> */
> >>>>>-int gpiochip_remove(struct gpio_chip *chip)
> >>>>>+void gpiochip_remove(struct gpio_chip *chip)
> >>>>> {
> >>>>> unsigned long flags;
> >>>>>- int status = 0;
> >>>>> unsigned id;
> >>>>>
> >>>>> acpi_gpiochip_remove(chip);
> >>>>>@@ -1278,24 +1277,15 @@ int gpiochip_remove(struct gpio_chip *chip)
> >>>>> of_gpiochip_remove(chip);
> >>>>>
> >>>>> for (id = 0; id < chip->ngpio; id++) {
> >>>>>- if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags)) {
> >>>>>- status = -EBUSY;
> >>>>>- break;
> >>>>>- }
> >>>>>- }
> >>>>>- if (status == 0) {
> >>>>>- for (id = 0; id < chip->ngpio; id++)
> >>>>>- chip->desc[id].chip = NULL;
> >>>>>-
> >>>>>- list_del(&chip->list);
> >>>>>+ if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags))
> >>>>>+ panic("gpio: removing gpiochip with gpios still
> >>>>>requested\n");
> >>>>
> >>>>panic?
> >>>
> >>>NACK to the patch for this reason. The strongest thing you should do here
> >>>is WARN.
> >>>
> >>>That said, I am not sure why we need this whole patch set in the first place.
> >>
> >>Well, what currently happens when you remove a device that is a provider of
> >>a gpio_chip which is still in use, is that the kernel crashes. Probably with
> >>a rather cryptic error message. So this patch doesn't really change the
> >>behavior, but makes it more explicit what is actually wrong. And even if you
> >>replace the panic() by a WARN() it will again just crash slightly later.
> >>
> >>This is a design flaw in the GPIO subsystem that needs to be fixed.
> >
> >Then fix the GPIO code properly, don't add a new panic() to the kernel.
>
> Until somebody comes up with a patch that fixes this for good I
> think that patch is still an improvement over the current situation.
> Rather than keeping the kernel running in a inconsistent state,
> which might cause all kinds of undefined behavior and which will
> lead to a crash eventually, we might as well just crash the kernel
> at the cause of the inconsistent state. This will make it obvious
> why it crashed (compared to a random stacktrace) and will also
> prevent the kernel from running in a undefined state.
>
Really, adding a panic here is not ok. With a WARN() then you have
time to save the dmesg to a file.
This CC list is way too huge. We're all wondering how often this stuff
crashes anyway? Have you tried to fix the bug instead of just calling
panic()? Is there a bugzilla entry or something? Is there a thread on
the list?
Just add a WARN() and fix the bug then cleanup the error handling.
regards,
dan carpenter
^ permalink raw reply
* Re: PenMount 6000 usb touch controller
From: Christian Gmeiner @ 2014-06-02 6:08 UTC (permalink / raw)
To: linux-input
In-Reply-To: <CAH9NwWe4issOhAzi7KYPRn9KvhjCOyo6coojcUGsmb6_rRZ-ww@mail.gmail.com>
2014-05-26 15:18 GMT+02:00 Christian Gmeiner <christian.gmeiner@gmail.com>:
> Hi.
>
>
> I am using the following usb touch controller:
>
> lsusb -s 6:2 -vvv
>
> Bus 006 Device 002: ID 14e1:6000 Dialogue Technology Corp.
> Device Descriptor:
> bLength 18
> bDescriptorType 1
> bcdUSB 1.10
> bDeviceClass 0 (Defined at Interface level)
> bDeviceSubClass 0
> bDeviceProtocol 0
> bMaxPacketSize0 64
> idVendor 0x14e1 Dialogue Technology Corp.
> idProduct 0x6000
> bcdDevice a4.b4
> iManufacturer 1 DIALOGUE INC
> iProduct 2 PenMount USB
> iSerial 0
> bNumConfigurations 1
> Configuration Descriptor:
> bLength 9
> bDescriptorType 2
> wTotalLength 41
> bNumInterfaces 1
> bConfigurationValue 1
> iConfiguration 4 full speed
> bmAttributes 0xa0
> (Bus Powered)
> Remote Wakeup
> MaxPower 500mA
> Interface Descriptor:
> bLength 9
> bDescriptorType 4
> bInterfaceNumber 0
> bAlternateSetting 0
> bNumEndpoints 2
> bInterfaceClass 3 Human Interface Device
> bInterfaceSubClass 0 No Subclass
> bInterfaceProtocol 0 None
> iInterface 3 EndPoint1 Interrupt Pipe
> HID Device Descriptor:
> bLength 9
> bDescriptorType 33
> bcdHID 1.01
> bCountryCode 0 Not supported
> bNumDescriptors 1
> bDescriptorType 34 Report
> wDescriptorLength 76
> Report Descriptors:
> ** UNAVAILABLE **
> Endpoint Descriptor:
> bLength 7
> bDescriptorType 5
> bEndpointAddress 0x81 EP 1 IN
> bmAttributes 3
> Transfer Type Interrupt
> Synch Type None
> Usage Type Data
> wMaxPacketSize 0x0005 1x 5 bytes
> bInterval 1
> Endpoint Descriptor:
> bLength 7
> bDescriptorType 5
> bEndpointAddress 0x02 EP 2 OUT
> bmAttributes 3
> Transfer Type Interrupt
> Synch Type None
> Usage Type Data
> wMaxPacketSize 0x0005 1x 5 bytes
> bInterval 1
> Device Status: 0x0000
> (Bus Powered)
>
>
> I can successfully use this device as a hid-generic usb mouse, but I need to get
> BTN_TOUCH events. What would be the best way to support this device? Shall
> I extend usbtouchscreen driver?
ping
--
Christian Gmeiner, MSc
https://soundcloud.com/christian-gmeiner
^ permalink raw reply
* Re: [PATCH 0/4] Input: atmel_mxt_ts - make it work on Tegra
From: Sekhar Nori @ 2014-06-02 9:50 UTC (permalink / raw)
To: linux-input
In-Reply-To: <53763B06.7020100@itdev.co.uk>
Hi Nick,
Nick Dyer <nick.dyer <at> itdev.co.uk> writes:
> Thanks for this. Would you be happy for me to pick these changes up and
> include them along with the other work I am sending to Dmitry? I am just
> beginning to do various updates to the whole series, one of the things I
> need to sort out is the device tree support.
I am starting work on support for Atmel mxT224 present
on TI's DRA7x EVM. What would be a good tree to base
my work on? Like Stephen, my platform is device-tree only.
I looked at your tree:
git://github.com/ndyer/linux.git for-next
it was updated 3 months ago and does not have Stephen's
DT patches yet. It will be great to have a common tree
which we can all base-off on to avoid rework.
Thanks,
Sekhar
^ permalink raw reply
* [PATCH v2 1/1] Input: max8997_haptic - Check return values
From: Sachin Kamat @ 2014-06-02 10:24 UTC (permalink / raw)
To: linux-input; +Cc: dmitry.torokhov, sachin.kamat, Donggeun Kim
Check the return value of regulator_enable and pwm_enable to
avoid errors.
Fixes the following warning:
drivers/input/misc/max8997_haptic.c:185:19: warning: ignoring return value of ‘regulator_enable’, declared with attribute warn_unused_result [-Wunused-result]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Donggeun Kim <dg77.kim@samsung.com>
---
Changes since v1:
* checked the return value of pwm_enable as suggested by Dmitry.
* Make chip->enabled = true only if enablement is
successful.
---
drivers/input/misc/max8997_haptic.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/input/misc/max8997_haptic.c b/drivers/input/misc/max8997_haptic.c
index 1fea5484941f..11f4d84625b3 100644
--- a/drivers/input/misc/max8997_haptic.c
+++ b/drivers/input/misc/max8997_haptic.c
@@ -181,11 +181,20 @@ static void max8997_haptic_enable(struct max8997_haptic *chip)
}
if (!chip->enabled) {
- chip->enabled = true;
- regulator_enable(chip->regulator);
+ error = regulator_enable(chip->regulator);
+ if (error) {
+ dev_err(chip->dev, "Failed to enable regulator\n");
+ goto out;
+ }
max8997_haptic_configure(chip);
- if (chip->mode == MAX8997_EXTERNAL_MODE)
- pwm_enable(chip->pwm);
+ if (chip->mode == MAX8997_EXTERNAL_MODE) {
+ error = pwm_enable(chip->pwm);
+ if (error) {
+ dev_err(chip->dev, "Failed to enable PWM\n");
+ goto out;
+ }
+ }
+ chip->enabled = true;
}
out:
--
1.7.9.5
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^ permalink raw reply related
* Re: [RFC/PATCH 1/3] drivers: input: keyboard: adp5589: add DT support
From: Guido Martínez @ 2014-06-02 15:36 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA,
Ezequiel García, linux-input-u79uwXL29TY76Z2rM5mHXA, LKML
In-Reply-To: <20140518204009.GB13276-WlK9ik9hQGAhIp7JRqBPierSzoNAToWh@public.gmane.org>
Hi Dmitry, sorry for the terribly late reply.
On Sun, May 18, 2014 at 01:40:09PM -0700, Dmitry Torokhov wrote:
> Hi Guido,
>
> On Wed, May 07, 2014 at 10:00:42AM -0300, Guido Martínez wrote:
> > Add DT support for the Analog ADP5589 matrix keypad decoding functions.
> >
> > Signed-off-by: Guido Martínez <guido-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org>
> > ---
> > drivers/input/keyboard/adp5589-keys.c | 207 +++++++++++++++++++++++++++++++++-
> > 1 file changed, 206 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/input/keyboard/adp5589-keys.c b/drivers/input/keyboard/adp5589-keys.c
> > index 6329549..2b232c0 100644
> > --- a/drivers/input/keyboard/adp5589-keys.c
> > +++ b/drivers/input/keyboard/adp5589-keys.c
> > @@ -18,7 +18,10 @@
> > #include <linux/i2c.h>
> > #include <linux/gpio.h>
> > #include <linux/slab.h>
> > +#include <linux/of.h>
> > +#include <linux/err.h>
> >
> > +#include <linux/input/matrix_keypad.h>
> > #include <linux/input/adp5589.h>
> >
> > /* ADP5589/ADP5585 Common Registers */
> > @@ -246,6 +249,14 @@ struct adp5589_kpad {
> > #endif
> > };
> >
> > +static struct of_device_id adp5589_of_match[] = {
> > + {
> > + .compatible = "adi,adp5589",
> > + .data = (void *)ADP5589
> > + },
> > + { },
> > +};
> > +
> > /*
> > * ADP5589 / ADP5585 derivative / variant handling
> > */
> > @@ -858,6 +869,188 @@ static void adp5589_report_switch_state(struct adp5589_kpad *kpad)
> > input_sync(kpad->input);
> > }
> >
> > +#ifdef CONFIG_OF
> > +static int adp5589_key(int row, int col)
> > +{
> > + return col + row * 11;
> > +}
> > +
> > +static int adp5589_dt_read_keymap(struct device *dev,
> > + struct adp5589_kpad_platform_data *pdata,
> > + const struct device_node *node)
> > +{
> > + int i;
> > + const u32 *dt_keymap;
> > + unsigned short *keymap;
> > + int keymap_len;
> > +
> > + dt_keymap = of_get_property(node, "linux,keymap", &keymap_len);
> > + if (!dt_keymap) {
> > + dev_err(dev, "missing dt keymap\n");
> > + return -ENODEV;
> > + }
> > +
> > + if (keymap_len % sizeof(u32)) {
> > + dev_err(dev, "malformed keymap (len=%i)\n", keymap_len);
> > + return -EINVAL;
> > + }
> > +
> > + keymap_len /= sizeof(u32);
> > +
> > + keymap = devm_kzalloc(dev, ADP5589_KEYMAPSIZE * sizeof(u32),
> > + GFP_KERNEL);
> > + if (!keymap)
> > + return -ENOMEM;
> > +
> > + for (i = 0; i < keymap_len; i++) {
> > + u32 val;
> > + u16 key;
> > + u8 row, col;
> > +
> > + val = be32_to_cpup(&dt_keymap[i]);
> > +
> > + row = KEY_ROW(val);
> > + col = KEY_COL(val);
> > + key = KEY_VAL(val);
> > +
> > + if (row > ADP5589_MAX_ROW_NUM) {
> > + dev_err(dev, "invalid row number (%i)\n", row);
> > + return -EINVAL;
> > + }
> > +
> > + if (col > ADP5589_MAX_COL_NUM) {
> > + dev_err(dev, "invalid column number (%i)\n", col);
> > + return -EINVAL;
> > + }
> > +
> > + pdata->keypad_en_mask |= ADP_ROW(row);
> > + pdata->keypad_en_mask |= ADP_COL(col);
> > +
> > + keymap[adp5589_key(row, col)] = key;
> > + }
> > +
> > + pdata->keymap = keymap;
> > + pdata->keymapsize = ADP5589_KEYMAPSIZE;
>
> I was wondering if we could also move non-DT variant to matrix-keypad
> infrastructure and use matrix_keypad_build_keymap and friends to handle
> this uniformly.
Seems like a good idea, I'll look into it.
Thanks for reviewing this!
--
Guido Martínez, VanguardiaSur
www.vanguardiasur.com.ar
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^ permalink raw reply
* Re: [PATCH 1/3] IIO: Add iio magn_north ABI documentation
From: Srinivas Pandruvada @ 2014-06-02 15:54 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Reyad Attiyat, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-input-u79uwXL29TY76Z2rM5mHXA, jkosina-AlSwsSmVLrQ
In-Reply-To: <53876477.7000503-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On 05/29/2014 09:46 AM, Jonathan Cameron wrote:
> On 28/05/14 22:06, Reyad Attiyat wrote:
>> Update documentation for HID compass true/magnetic north sensor.
>>
>> Signed-off-by: Reyad Attiyat <reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>> Documentation/ABI/testing/sysfs-bus-iio | 76
>> +++++++++++++++++++++++++++++++++
>> 1 file changed, 76 insertions(+)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-iio
>> b/Documentation/ABI/testing/sysfs-bus-iio
>> index 6e02c50..0341b2f 100644
>> --- a/Documentation/ABI/testing/sysfs-bus-iio
>> +++ b/Documentation/ABI/testing/sysfs-bus-iio
>> @@ -165,6 +165,10 @@ Description:
>> What: /sys/bus/iio/devices/iio:deviceX/in_magn_x_raw
>> What: /sys/bus/iio/devices/iio:deviceX/in_magn_y_raw
>> What: /sys/bus/iio/devices/iio:deviceX/in_magn_z_raw
> Hmm. The question to my mind is whether people would expect a simple
> north to give
> them which direction north is?
> Also is it actually relevant whether they find north from a
> magnetometer or some other method?
> I wonder if we want to make these some sort of north referenced rotation?
> in_rot_from_true_north_raw
> in_rot_from_magnetic_north_raw
>
> Technically it is possible to get some direction information from some
> GPS receivers or to
> to maintain a knowledge of its location with good gyroscopes.
>
> Ultimately userspace doesn't care about it. When we were using the
> axial magnetic functions we
> were measuring the field magnitude in that direction. As I understand
> it here it is just an angle?
Yes, they are angles. Default units are degrees, which we should convert
to radians as a standard unit for IIO.
Thanks,
Srinivas
>
> J
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_raw
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_true_raw
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_tilt_comp_raw
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_true_tilt_comp_raw
>> KernelVersion: 2.6.35
>> Contact: linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Description:
>> @@ -249,6 +253,10 @@ What:
>> /sys/bus/iio/devices/iio:deviceX/in_magn_scale
>> What: /sys/bus/iio/devices/iio:deviceX/in_magn_x_scale
>> What: /sys/bus/iio/devices/iio:deviceX/in_magn_y_scale
>> What: /sys/bus/iio/devices/iio:deviceX/in_magn_z_scale
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_scale
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_true_scale
>> +What: /sys/bus/iio/devices/iio:deviceX/in_magn_north_tilt_comp_scale
>> +What:
>> /sys/bus/iio/devices/iio:deviceX/in_magn_north_true_tilt_comp_scale
>> What: /sys/bus/iio/devices/iio:deviceX/in_pressureY_scale
>> What: /sys/bus/iio/devices/iio:deviceX/in_pressure_scale
>> KernelVersion: 2.6.35
>> @@ -436,6 +444,14 @@ What:
>> /sys/.../iio:deviceX/events/in_magn_y_thresh_rising_en
>> What: /sys/.../iio:deviceX/events/in_magn_y_thresh_falling_en
>> What: /sys/.../iio:deviceX/events/in_magn_z_thresh_rising_en
>> What: /sys/.../iio:deviceX/events/in_magn_z_thresh_falling_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_thresh_rising_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_thresh_falling_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_true_thresh_rising_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_true_thresh_falling_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_tilt_comp_thresh_rising_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_tilt_comp_thresh_falling_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_true_tilt_comp_thresh_rising_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_true_tilt_comp_thresh_falling_en
>> What: /sys/.../iio:deviceX/events/in_voltageY_supply_thresh_rising_en
>> What: /sys/.../iio:deviceX/events/in_voltageY_supply_thresh_falling_en
>> What: /sys/.../iio:deviceX/events/in_voltageY_thresh_rising_en
>> @@ -481,6 +497,14 @@ What:
>> /sys/.../iio:deviceX/events/in_magn_y_roc_rising_en
>> What: /sys/.../iio:deviceX/events/in_magn_y_roc_falling_en
>> What: /sys/.../iio:deviceX/events/in_magn_z_roc_rising_en
>> What: /sys/.../iio:deviceX/events/in_magn_z_roc_falling_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_roc_rising_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_roc_falling_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_true_roc_rising_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_true_roc_falling_en
>> +What: /sys/.../iio:deviceX/events/in_magn_north_tilt_comp_roc_rising_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_tilt_comp_roc_falling_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_true_tilt_comp_roc_rising_en
>> +What:
>> /sys/.../iio:deviceX/events/in_magn_north_true_tilt_comp_roc_falling_en
>> What: /sys/.../iio:deviceX/events/in_voltageY_supply_roc_rising_en
>> What: /sys/.../iio:deviceX/events/in_voltageY_supply_roc_falling_en
>> What: /sys/.../iio:deviceX/events/in_voltageY_roc_rising_en
>> @@ -527,6 +551,14 @@ What:
>> /sys/.../events/in_magn_y_raw_thresh_rising_value
>> What: /sys/.../events/in_magn_y_raw_thresh_falling_value
>> What: /sys/.../events/in_magn_z_raw_thresh_rising_value
>> What: /sys/.../events/in_magn_z_raw_thresh_falling_value
>> +What: /sys/.../events/in_magn_north_raw_thresh_rising_value
>> +What: /sys/.../events/in_magn_north_raw_thresh_falling_value
>> +What: /sys/.../events/in_magn_north_true_raw_thresh_rising_value
>> +What: /sys/.../events/in_magn_north_true_raw_thresh_falling_value
>> +What: /sys/.../events/in_magn_north_tilt_comp_raw_thresh_rising_value
>> +What: /sys/.../events/in_magn_north_tilt_comp_raw_thresh_falling_value
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_raw_thresh_rising_value
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_raw_thresh_falling_value
>> What: /sys/.../events/in_voltageY_supply_raw_thresh_rising_value
>> What: /sys/.../events/in_voltageY_supply_raw_thresh_falling_value
>> What: /sys/.../events/in_voltageY_raw_thresh_rising_value
>> @@ -577,6 +609,18 @@ What:
>> /sys/.../events/in_magn_y_thresh_either_hysteresis
>> What: /sys/.../events/in_magn_z_thresh_rising_hysteresis
>> What: /sys/.../events/in_magn_z_thresh_falling_hysteresis
>> What: /sys/.../events/in_magn_z_thresh_either_hysteresis
>> +What: /sys/.../events/in_magn_north_thresh_rising_hysteresis
>> +What: /sys/.../events/in_magn_north_thresh_falling_hysteresis
>> +What: /sys/.../events/in_magn_north_thresh_either_hysteresis
>> +What: /sys/.../events/in_magn_north_true_thresh_rising_hysteresis
>> +What: /sys/.../events/in_magn_north_true_thresh_falling_hysteresis
>> +What: /sys/.../events/in_magn_north_true_thresh_either_hysteresis
>> +What: /sys/.../events/in_magn_north_tilt_comp_thresh_rising_hysteresis
>> +What: /sys/.../events/in_magn_north_tilt_comp_thresh_falling_hysteresis
>> +What: /sys/.../events/in_magn_north_tilt_comp_thresh_either_hysteresis
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_thresh_rising_hysteresis
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_thresh_falling_hysteresis
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_thresh_either_hysteresis
>> What: /sys/.../events/in_voltageY_thresh_rising_hysteresis
>> What: /sys/.../events/in_voltageY_thresh_falling_hysteresis
>> What: /sys/.../events/in_voltageY_thresh_either_hysteresis
>> @@ -624,6 +668,14 @@ What:
>> /sys/.../events/in_magn_y_raw_roc_rising_value
>> What: /sys/.../events/in_magn_y_raw_roc_falling_value
>> What: /sys/.../events/in_magn_z_raw_roc_rising_value
>> What: /sys/.../events/in_magn_z_raw_roc_falling_value
>> +What: /sys/.../events/in_magn_north_raw_roc_rising_value
>> +What: /sys/.../events/in_magn_north_raw_roc_falling_value
>> +What: /sys/.../events/in_magn_north_true_raw_roc_rising_value
>> +What: /sys/.../events/in_magn_north_true_raw_roc_falling_value
>> +What: /sys/.../events/in_magn_north_tilt_comp_raw_roc_rising_value
>> +What: /sys/.../events/in_magn_north_tilt_comp_raw_roc_falling_value
>> +What: /sys/.../events/in_magn_north_true_tilt_comp_raw_roc_rising_value
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_raw_roc_falling_value
>> What: /sys/.../events/in_voltageY_supply_raw_roc_rising_value
>> What: /sys/.../events/in_voltageY_supply_raw_roc_falling_value
>> What: /sys/.../events/in_voltageY_raw_roc_rising_value
>> @@ -679,6 +731,22 @@ What:
>> /sys/.../events/in_magn_z_thresh_rising_period
>> What: /sys/.../events/in_magn_z_thresh_falling_period
>> What: /sys/.../events/in_magn_z_roc_rising_period
>> What: /sys/.../events/in_magn_z_roc_falling_period
>> +What: /sys/.../events/in_magn_north_thresh_rising_period
>> +What: /sys/.../events/in_magn_north_thresh_falling_period
>> +What: /sys/.../events/in_magn_north_roc_rising_period
>> +What: /sys/.../events/in_magn_north_roc_falling_period
>> +What: /sys/.../events/in_magn_north_true_thresh_rising_period
>> +What: /sys/.../events/in_magn_north_true_thresh_falling_period
>> +What: /sys/.../events/in_magn_north_true_roc_rising_period
>> +What: /sys/.../events/in_magn_north_true_roc_falling_period
>> +What: /sys/.../events/in_magn_north_tilt_comp_thresh_rising_period
>> +What: /sys/.../events/in_magn_north_tilt_comp_thresh_falling_period
>> +What: /sys/.../events/in_magn_north_tilt_comp_roc_rising_period
>> +What: /sys/.../events/in_magn_north_tilt_comp_roc_falling_period
>> +What: /sys/.../events/in_magn_north_true_tilt_comp_thresh_rising_period
>> +What:
>> /sys/.../events/in_magn_north_true_tilt_comp_thresh_falling_period
>> +What: /sys/.../events/in_magn_north_true_tilt_comp_roc_rising_period
>> +What: /sys/.../events/in_magn_north_true_tilt_comp_roc_falling_period
>> What: /sys/.../events/in_voltageY_supply_thresh_rising_period
>> What: /sys/.../events/in_voltageY_supply_thresh_falling_period
>> What: /sys/.../events/in_voltageY_supply_roc_rising_period
>> @@ -776,6 +844,10 @@ What:
>> /sys/.../iio:deviceX/scan_elements/in_anglvel_z_en
>> What: /sys/.../iio:deviceX/scan_elements/in_magn_x_en
>> What: /sys/.../iio:deviceX/scan_elements/in_magn_y_en
>> What: /sys/.../iio:deviceX/scan_elements/in_magn_z_en
>> +What: /sys/.../iio:deviceX/scan_elements/in_magn_north_en
>> +What: /sys/.../iio:deviceX/scan_elements/in_magn_north_true_en
>> +What: /sys/.../iio:deviceX/scan_elements/in_magn_north_tilt_comp_en
>> +What:
>> /sys/.../iio:deviceX/scan_elements/in_magn_north_true_tilt_comp_en
>> What: /sys/.../iio:deviceX/scan_elements/in_timestamp_en
>> What: /sys/.../iio:deviceX/scan_elements/in_voltageY_supply_en
>> What: /sys/.../iio:deviceX/scan_elements/in_voltageY_en
>> @@ -840,6 +912,10 @@ What:
>> /sys/.../iio:deviceX/scan_elements/in_anglvel_z_index
>> What: /sys/.../iio:deviceX/scan_elements/in_magn_x_index
>> What: /sys/.../iio:deviceX/scan_elements/in_magn_y_index
>> What: /sys/.../iio:deviceX/scan_elements/in_magn_z_index
>> +What: /sys/.../iio:deviceX/scan_elements/in_magn_north_index
>> +What: /sys/.../iio:deviceX/scan_elements/in_magn_north_true_index
>> +What: /sys/.../iio:deviceX/scan_elements/in_magn_north_tilt_comp_index
>> +What:
>> /sys/.../iio:deviceX/scan_elements/in_magn_north_true_tilt_comp_index
>> What: /sys/.../iio:deviceX/scan_elements/in_incli_x_index
>> What: /sys/.../iio:deviceX/scan_elements/in_incli_y_index
>> What: /sys/.../iio:deviceX/scan_elements/in_timestamp_index
>>
>
>
^ permalink raw reply
* Re: [PATCHv4 0/4] tsc2005 DT binding
From: Sebastian Reichel @ 2014-06-02 16:59 UTC (permalink / raw)
To: Dmitry Torokhov; +Cc: linux-input, linux-kernel
In-Reply-To: <20140530195821.GA27692@core.coreip.homeip.net>
[-- Attachment #1: Type: text/plain, Size: 875 bytes --]
Hi Dmitry,
On Fri, May 30, 2014 at 12:58:21PM -0700, Dmitry Torokhov wrote:
> On Thu, May 29, 2014 at 03:33:57PM +0200, Sebastian Reichel wrote:
> > On Wed, May 21, 2014 at 07:36:10PM +0200, Sebastian Reichel wrote:
> > ping! It would be nice to have this in 3.16, since it makes
> > the N900 usable with the mainline kernel when booted in DT
> > mode. The DT bindings haven't changed for more than 3 weeks,
> > so we don't need to wait longer for feedback from the DT
> > maintainers AFAIK.
>
> I applied the series, could you please take a peek at my 'next' branch
> to make sure I did not miss anything?
Patches look ok, I also tested the branch on the phone and get
events after running the selftest once (which resets the
controller). Without running the selftest no events get reported.
I will have a look at that in the next days.
-- Sebastian
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^ permalink raw reply
* Re: [PATCH 2/3] IIO: Add iio_chan modifier for True/Magnetic North HID usages
From: Reyad Attiyat @ 2014-06-02 19:54 UTC (permalink / raw)
To: Jonathan Cameron
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Srinivas Pandruvada,
linux-input, Jiri Kosina
In-Reply-To: <5389AB89.9080305-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Hey Jonathan,
>
> I think we need the naming to explicitly mention north_magnetic instead
> of just north. Whilst it is obvious what north means when you have north
> true alongside it, it won't be so obvious if one just has the north
> attribute
> to see in a particular driver - if anything I'd have the true as the one
> that was simply called north (as it might not be coming from a magnetometer
> thought obviously that's the most common source) I'd also rather the enum
> entries
> were
> IIO_MOD_NORTH_MAGN
> IIO_MOD_NORTH_TRUE
> IIO_MOD_NORTH_MAGN_TILT_COMP
> IIO_MOD_NORTH_TRUE_TILT_COMP
>
> It is definitely feasible that they will not come from magnetometers -
> a differential bearing is common on GPS units.
Makes sense to me. I will update the patches with your suggestions. Thanks.
^ permalink raw reply
* [PATCHv2 1/3] IIO: Documentation: Add north attribute to ABI docs
From: Reyad Attiyat @ 2014-06-02 23:14 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, jic23-DgEjT+Ai2ygdnm+yROfE0A,
srinivas.pandruvada-VuQAYsv1563Yd54FQh9/CA,
linux-input-u79uwXL29TY76Z2rM5mHXA, jkosina-AlSwsSmVLrQ
Cc: Reyad Attiyat
In-Reply-To: <1401750890-31854-1-git-send-email-reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Updated ABI documentation to inculde compass north usages.
Signed-off-by: Reyad Attiyat <reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Documentation/ABI/testing/sysfs-bus-iio | 76 +++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
index 6e02c50..251c2bb 100644
--- a/Documentation/ABI/testing/sysfs-bus-iio
+++ b/Documentation/ABI/testing/sysfs-bus-iio
@@ -165,6 +165,10 @@ Description:
What: /sys/bus/iio/devices/iio:deviceX/in_magn_x_raw
What: /sys/bus/iio/devices/iio:deviceX/in_magn_y_raw
What: /sys/bus/iio/devices/iio:deviceX/in_magn_z_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_north_magnetic_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_north_true_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_north_magnetic_tilt_comp_raw
+What: /sys/bus/iio/devices/iio:deviceX/in_north_true_tilt_comp_raw
KernelVersion: 2.6.35
Contact: linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Description:
@@ -249,6 +253,10 @@ What: /sys/bus/iio/devices/iio:deviceX/in_magn_scale
What: /sys/bus/iio/devices/iio:deviceX/in_magn_x_scale
What: /sys/bus/iio/devices/iio:deviceX/in_magn_y_scale
What: /sys/bus/iio/devices/iio:deviceX/in_magn_z_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_north_magnetic_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_north_true_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_north_magnetic_tilt_comp_scale
+What: /sys/bus/iio/devices/iio:deviceX/in_north_true_tilt_comp_scale
What: /sys/bus/iio/devices/iio:deviceX/in_pressureY_scale
What: /sys/bus/iio/devices/iio:deviceX/in_pressure_scale
KernelVersion: 2.6.35
@@ -436,6 +444,14 @@ What: /sys/.../iio:deviceX/events/in_magn_y_thresh_rising_en
What: /sys/.../iio:deviceX/events/in_magn_y_thresh_falling_en
What: /sys/.../iio:deviceX/events/in_magn_z_thresh_rising_en
What: /sys/.../iio:deviceX/events/in_magn_z_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_north_true_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_north_true_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_tilt_comp_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_tilt_comp_thresh_falling_en
+What: /sys/.../iio:deviceX/events/in_north_true_tilt_comp_thresh_rising_en
+What: /sys/.../iio:deviceX/events/in_north_true_tilt_comp_thresh_falling_en
What: /sys/.../iio:deviceX/events/in_voltageY_supply_thresh_rising_en
What: /sys/.../iio:deviceX/events/in_voltageY_supply_thresh_falling_en
What: /sys/.../iio:deviceX/events/in_voltageY_thresh_rising_en
@@ -481,6 +497,14 @@ What: /sys/.../iio:deviceX/events/in_magn_y_roc_rising_en
What: /sys/.../iio:deviceX/events/in_magn_y_roc_falling_en
What: /sys/.../iio:deviceX/events/in_magn_z_roc_rising_en
What: /sys/.../iio:deviceX/events/in_magn_z_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_north_true_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_north_true_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_tilt_comp_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_north_magnetic_tilt_comp_roc_falling_en
+What: /sys/.../iio:deviceX/events/in_north_true_tilt_comp_roc_rising_en
+What: /sys/.../iio:deviceX/events/in_north_true_tilt_comp_roc_falling_en
What: /sys/.../iio:deviceX/events/in_voltageY_supply_roc_rising_en
What: /sys/.../iio:deviceX/events/in_voltageY_supply_roc_falling_en
What: /sys/.../iio:deviceX/events/in_voltageY_roc_rising_en
@@ -527,6 +551,14 @@ What: /sys/.../events/in_magn_y_raw_thresh_rising_value
What: /sys/.../events/in_magn_y_raw_thresh_falling_value
What: /sys/.../events/in_magn_z_raw_thresh_rising_value
What: /sys/.../events/in_magn_z_raw_thresh_falling_value
+What: /sys/.../events/in_north_magnetic_raw_thresh_rising_value
+What: /sys/.../events/in_north_magnetic_raw_thresh_falling_value
+What: /sys/.../events/in_north_true_raw_thresh_rising_value
+What: /sys/.../events/in_north_true_raw_thresh_falling_value
+What: /sys/.../events/in_north_magnetic_tilt_comp_raw_thresh_rising_value
+What: /sys/.../events/in_north_magnetic_tilt_comp_raw_thresh_falling_value
+What: /sys/.../events/in_north_true_tilt_comp_raw_thresh_rising_value
+What: /sys/.../events/in_north_true_tilt_comp_raw_thresh_falling_value
What: /sys/.../events/in_voltageY_supply_raw_thresh_rising_value
What: /sys/.../events/in_voltageY_supply_raw_thresh_falling_value
What: /sys/.../events/in_voltageY_raw_thresh_rising_value
@@ -577,6 +609,18 @@ What: /sys/.../events/in_magn_y_thresh_either_hysteresis
What: /sys/.../events/in_magn_z_thresh_rising_hysteresis
What: /sys/.../events/in_magn_z_thresh_falling_hysteresis
What: /sys/.../events/in_magn_z_thresh_either_hysteresis
+What: /sys/.../events/in_north_magnetic_thresh_rising_hysteresis
+What: /sys/.../events/in_north_magnetic_thresh_falling_hysteresis
+What: /sys/.../events/in_north_magnetic_thresh_either_hysteresis
+What: /sys/.../events/in_north_true_thresh_rising_hysteresis
+What: /sys/.../events/in_north_true_thresh_falling_hysteresis
+What: /sys/.../events/in_north_true_thresh_either_hysteresis
+What: /sys/.../events/in_north_magnetic_tilt_comp_thresh_rising_hysteresis
+What: /sys/.../events/in_north_magnetic_tilt_comp_thresh_falling_hysteresis
+What: /sys/.../events/in_north_magnetic_tilt_comp_thresh_either_hysteresis
+What: /sys/.../events/in_north_true_tilt_comp_thresh_rising_hysteresis
+What: /sys/.../events/in_north_true_tilt_comp_thresh_falling_hysteresis
+What: /sys/.../events/in_north_true_tilt_comp_thresh_either_hysteresis
What: /sys/.../events/in_voltageY_thresh_rising_hysteresis
What: /sys/.../events/in_voltageY_thresh_falling_hysteresis
What: /sys/.../events/in_voltageY_thresh_either_hysteresis
@@ -624,6 +668,14 @@ What: /sys/.../events/in_magn_y_raw_roc_rising_value
What: /sys/.../events/in_magn_y_raw_roc_falling_value
What: /sys/.../events/in_magn_z_raw_roc_rising_value
What: /sys/.../events/in_magn_z_raw_roc_falling_value
+What: /sys/.../events/in_north_magnetic_raw_roc_rising_value
+What: /sys/.../events/in_north_magnetic_raw_roc_falling_value
+What: /sys/.../events/in_north_true_raw_roc_rising_value
+What: /sys/.../events/in_north_true_raw_roc_falling_value
+What: /sys/.../events/in_north_magnetic_tilt_comp_raw_roc_rising_value
+What: /sys/.../events/in_north_magnetic_tilt_comp_raw_roc_falling_value
+What: /sys/.../events/in_north_true_tilt_comp_raw_roc_rising_value
+What: /sys/.../events/in_north_true_tilt_comp_raw_roc_falling_value
What: /sys/.../events/in_voltageY_supply_raw_roc_rising_value
What: /sys/.../events/in_voltageY_supply_raw_roc_falling_value
What: /sys/.../events/in_voltageY_raw_roc_rising_value
@@ -679,6 +731,22 @@ What: /sys/.../events/in_magn_z_thresh_rising_period
What: /sys/.../events/in_magn_z_thresh_falling_period
What: /sys/.../events/in_magn_z_roc_rising_period
What: /sys/.../events/in_magn_z_roc_falling_period
+What: /sys/.../events/in_north_magnetic_thresh_rising_period
+What: /sys/.../events/in_north_magnetic_thresh_falling_period
+What: /sys/.../events/in_north_magnetic_roc_rising_period
+What: /sys/.../events/in_north_magnetic_roc_falling_period
+What: /sys/.../events/in_north_true_thresh_rising_period
+What: /sys/.../events/in_north_true_thresh_falling_period
+What: /sys/.../events/in_north_true_roc_rising_period
+What: /sys/.../events/in_north_true_roc_falling_period
+What: /sys/.../events/in_north_magnetic_tilt_comp_thresh_rising_period
+What: /sys/.../events/in_north_magnetic_tilt_comp_thresh_falling_period
+What: /sys/.../events/in_north_magnetic_tilt_comp_roc_rising_period
+What: /sys/.../events/in_north_magnetic_tilt_comp_roc_falling_period
+What: /sys/.../events/in_north_true_tilt_comp_thresh_rising_period
+What: /sys/.../events/in_north_true_tilt_comp_thresh_falling_period
+What: /sys/.../events/in_north_true_tilt_comp_roc_rising_period
+What: /sys/.../events/in_north_true_tilt_comp_roc_falling_period
What: /sys/.../events/in_voltageY_supply_thresh_rising_period
What: /sys/.../events/in_voltageY_supply_thresh_falling_period
What: /sys/.../events/in_voltageY_supply_roc_rising_period
@@ -776,6 +844,10 @@ What: /sys/.../iio:deviceX/scan_elements/in_anglvel_z_en
What: /sys/.../iio:deviceX/scan_elements/in_magn_x_en
What: /sys/.../iio:deviceX/scan_elements/in_magn_y_en
What: /sys/.../iio:deviceX/scan_elements/in_magn_z_en
+What: /sys/.../iio:deviceX/scan_elements/in_north_magnetic_en
+What: /sys/.../iio:deviceX/scan_elements/in_north_true_en
+What: /sys/.../iio:deviceX/scan_elements/in_north_magnetic_tilt_comp_en
+What: /sys/.../iio:deviceX/scan_elements/in_north_true_tilt_comp_en
What: /sys/.../iio:deviceX/scan_elements/in_timestamp_en
What: /sys/.../iio:deviceX/scan_elements/in_voltageY_supply_en
What: /sys/.../iio:deviceX/scan_elements/in_voltageY_en
@@ -840,6 +912,10 @@ What: /sys/.../iio:deviceX/scan_elements/in_anglvel_z_index
What: /sys/.../iio:deviceX/scan_elements/in_magn_x_index
What: /sys/.../iio:deviceX/scan_elements/in_magn_y_index
What: /sys/.../iio:deviceX/scan_elements/in_magn_z_index
+What: /sys/.../iio:deviceX/scan_elements/in_north_magnetic_index
+What: /sys/.../iio:deviceX/scan_elements/in_north_true_index
+What: /sys/.../iio:deviceX/scan_elements/in_north_magnetic_tilt_comp_index
+What: /sys/.../iio:deviceX/scan_elements/in_north_true_tilt_comp_index
What: /sys/.../iio:deviceX/scan_elements/in_incli_x_index
What: /sys/.../iio:deviceX/scan_elements/in_incli_y_index
What: /sys/.../iio:deviceX/scan_elements/in_timestamp_index
--
1.9.3
^ permalink raw reply related
* [PATCHv2 2/3] IIO: Add iio_chan modifier for True/Magnetic North HID usages
From: Reyad Attiyat @ 2014-06-02 23:14 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, jic23-DgEjT+Ai2ygdnm+yROfE0A,
srinivas.pandruvada-VuQAYsv1563Yd54FQh9/CA,
linux-input-u79uwXL29TY76Z2rM5mHXA, jkosina-AlSwsSmVLrQ
Cc: Reyad Attiyat
In-Reply-To: <1401750890-31854-1-git-send-email-reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Updated iio modifier enum for compass north usages,
including magnetic/true north with tilt compensation.
Signed-off-by: Reyad Attiyat <reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/iio/industrialio-core.c | 4 ++++
include/linux/iio/types.h | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
index ede16aec..2f523b5 100644
--- a/drivers/iio/industrialio-core.c
+++ b/drivers/iio/industrialio-core.c
@@ -84,6 +84,10 @@ static const char * const iio_modifier_names[] = {
[IIO_MOD_LIGHT_RED] = "red",
[IIO_MOD_LIGHT_GREEN] = "green",
[IIO_MOD_LIGHT_BLUE] = "blue",
+ [IIO_MOD_NORTH_MAGN] = "north_magnetic",
+ [IIO_MOD_NORTH_TRUE] = "north_true",
+ [IIO_MOD_NORTH_MAGN_TILT_COMP] = "north_magnetic_tilt_comp",
+ [IIO_MOD_NORTH_TRUE_TILT_COMP] = "north_true_tilt_comp",
};
/* relies on pairs of these shared then separate */
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 084d882..5bf8847 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -53,6 +53,10 @@ enum iio_modifier {
IIO_MOD_LIGHT_RED,
IIO_MOD_LIGHT_GREEN,
IIO_MOD_LIGHT_BLUE,
+ IIO_MOD_NORTH_MAGN,
+ IIO_MOD_NORTH_TRUE,
+ IIO_MOD_NORTH_MAGN_TILT_COMP,
+ IIO_MOD_NORTH_TRUE_TILT_COMP
};
enum iio_event_type {
--
1.9.3
^ permalink raw reply related
* [PATCHv2 3/3] IIO: hid-sensor-magn-3d: Add in support for True/Magnetic North HID usages
From: Reyad Attiyat @ 2014-06-02 23:14 UTC (permalink / raw)
To: linux-kernel, linux-iio, jic23, srinivas.pandruvada, linux-input,
jkosina
Cc: Reyad Attiyat
In-Reply-To: <1401750890-31854-1-git-send-email-reyad.attiyat@gmail.com>
Updated magn_3d_channel enum for all possible north channels
Added functions to setup iio_chan_spec array depending on which hid usage reports are found
Renamed magn_val to iio_val to differentiate the index being used
Updated magn_3d_state struct to hold pointer array (magn_val_addr[]) which points to iio_val[]
Updated magn_3d_parse_report to scan for all compass usages and create iio channels for each
Signed-off-by: Reyad Attiyat <reyad.attiyat@gmail.com>
---
drivers/iio/magnetometer/hid-sensor-magn-3d.c | 271 +++++++++++++++++---------
1 file changed, 177 insertions(+), 94 deletions(-)
diff --git a/drivers/iio/magnetometer/hid-sensor-magn-3d.c b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
index 6d162b7..32f4d90 100644
--- a/drivers/iio/magnetometer/hid-sensor-magn-3d.c
+++ b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
@@ -34,63 +34,54 @@ enum magn_3d_channel {
CHANNEL_SCAN_INDEX_X,
CHANNEL_SCAN_INDEX_Y,
CHANNEL_SCAN_INDEX_Z,
+ CHANNEL_SCAN_INDEX_NORTH_MAGN,
+ CHANNEL_SCAN_INDEX_NORTH_TRUE,
+ CHANNEL_SCAN_INDEX_NORTH_TILT_COMP,
+ CHANNEL_SCAN_INDEX_NORTH_TRUE_TILT_COMP,
MAGN_3D_CHANNEL_MAX,
};
+#define IIO_CHANNEL_MAX MAGN_3D_CHANNEL_MAX
+
struct magn_3d_state {
struct hid_sensor_hub_callbacks callbacks;
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info magn[MAGN_3D_CHANNEL_MAX];
- u32 magn_val[MAGN_3D_CHANNEL_MAX];
-};
+ u32 *magn_val_addr[MAGN_3D_CHANNEL_MAX];
-static const u32 magn_3d_addresses[MAGN_3D_CHANNEL_MAX] = {
- HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS,
- HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS,
- HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS
+ u32 iio_val[IIO_CHANNEL_MAX];
+ int num_iio_channels;
};
-/* Channel definitions */
-static const struct iio_chan_spec magn_3d_channels[] = {
- {
- .type = IIO_MAGN,
- .modified = 1,
- .channel2 = IIO_MOD_X,
- .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
- BIT(IIO_CHAN_INFO_SCALE) |
- BIT(IIO_CHAN_INFO_SAMP_FREQ) |
- BIT(IIO_CHAN_INFO_HYSTERESIS),
- .scan_index = CHANNEL_SCAN_INDEX_X,
- }, {
- .type = IIO_MAGN,
- .modified = 1,
- .channel2 = IIO_MOD_Y,
- .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
- BIT(IIO_CHAN_INFO_SCALE) |
- BIT(IIO_CHAN_INFO_SAMP_FREQ) |
- BIT(IIO_CHAN_INFO_HYSTERESIS),
- .scan_index = CHANNEL_SCAN_INDEX_Y,
- }, {
- .type = IIO_MAGN,
- .modified = 1,
- .channel2 = IIO_MOD_Z,
- .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
- BIT(IIO_CHAN_INFO_SCALE) |
- BIT(IIO_CHAN_INFO_SAMP_FREQ) |
- BIT(IIO_CHAN_INFO_HYSTERESIS),
- .scan_index = CHANNEL_SCAN_INDEX_Z,
+/* Find index into magn_3d_state magn[] and magn_val_addr[] from HID Usage */
+static int magn_3d_usage_id_to_chan_index(unsigned usage_id){
+ int offset = -1;
+
+ switch (usage_id) {
+ case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS:
+ offset = CHANNEL_SCAN_INDEX_X;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS:
+ offset = CHANNEL_SCAN_INDEX_Y;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS:
+ offset = CHANNEL_SCAN_INDEX_Z;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH:
+ offset = CHANNEL_SCAN_INDEX_NORTH_TILT_COMP;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH:
+ offset = CHANNEL_SCAN_INDEX_NORTH_TRUE_TILT_COMP;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_MAGN_NORTH:
+ offset = CHANNEL_SCAN_INDEX_NORTH_MAGN;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_TRUE_NORTH:
+ offset = CHANNEL_SCAN_INDEX_NORTH_TRUE;
+ break;
}
-};
-/* Adjust channel real bits based on report descriptor */
-static void magn_3d_adjust_channel_bit_mask(struct iio_chan_spec *channels,
- int channel, int size)
-{
- channels[channel].scan_type.sign = 's';
- /* Real storage bits will change based on the report desc. */
- channels[channel].scan_type.realbits = size * 8;
- /* Maximum size of a sample to capture is u32 */
- channels[channel].scan_type.storagebits = sizeof(u32) * 8;
+ return offset;
}
/* Channel read_raw handler */
@@ -101,21 +92,31 @@ static int magn_3d_read_raw(struct iio_dev *indio_dev,
{
struct magn_3d_state *magn_state = iio_priv(indio_dev);
int report_id = -1;
- u32 address;
+ unsigned usage_id;
+ int chan_index = -1;
int ret;
int ret_type;
+ dev_dbg(&indio_dev->dev, "magn_3d_read_raw\n");
+
*val = 0;
*val2 = 0;
switch (mask) {
case 0:
+ /* We store the HID usage ID of the iio channel
+ * in its address field
+ */
+ usage_id = chan->address;
+ chan_index = magn_3d_usage_id_to_chan_index(usage_id);
+ if(chan_index < 0)
+ return -EINVAL;
+
report_id =
- magn_state->magn[chan->scan_index].report_id;
- address = magn_3d_addresses[chan->scan_index];
+ magn_state->magn[chan_index].report_id;
if (report_id >= 0)
*val = sensor_hub_input_attr_get_raw_value(
magn_state->common_attributes.hsdev,
- HID_USAGE_SENSOR_COMPASS_3D, address,
+ HID_USAGE_SENSOR_COMPASS_3D, usage_id,
report_id);
else {
*val = 0;
@@ -202,12 +203,13 @@ static int magn_3d_proc_event(struct hid_sensor_hub_device *hsdev,
magn_state->common_attributes.data_ready);
if (magn_state->common_attributes.data_ready)
hid_sensor_push_data(indio_dev,
- magn_state->magn_val,
- sizeof(magn_state->magn_val));
+ &(magn_state->iio_val),
+ sizeof(magn_state->iio_val));
return 0;
}
+
/* Capture samples in local storage */
static int magn_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
unsigned usage_id,
@@ -217,63 +219,143 @@ static int magn_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
struct iio_dev *indio_dev = platform_get_drvdata(priv);
struct magn_3d_state *magn_state = iio_priv(indio_dev);
int offset;
+ u32 *magn_val;
int ret = -EINVAL;
- switch (usage_id) {
+ offset = magn_3d_usage_id_to_chan_index(usage_id);
+ if(offset < 0)
+ return ret;
+
+ magn_val = magn_state->magn_val_addr[offset];
+ if(!magn_val)
+ return ret;
+
+ *(magn_val) = *(u32 *)raw_data;
+
+ return 0;
+}
+
+/* Setup the iio_chan_spec for HID Usage ID */
+static int magn_3d_setup_new_iio_chan(struct hid_sensor_hub_device *hsdev,
+ unsigned usage_id,
+ unsigned attr_usage_id,
+ struct iio_chan_spec *iio_chans,
+ struct magn_3d_state *st)
+{
+ int ret = -1;
+ int iio_index;
+ int magn_index;
+ struct iio_chan_spec *channel;
+
+ /* Setup magn_3d_state for new channel */
+ magn_index = magn_3d_usage_id_to_chan_index(attr_usage_id);
+ if(magn_index < 0 || magn_index >= MAGN_3D_CHANNEL_MAX){
+ return -1;
+ }
+
+ /* Check if usage attribute exists in the sensor hub device */
+ ret = sensor_hub_input_get_attribute_info(hsdev,
+ HID_INPUT_REPORT,
+ usage_id,
+ attr_usage_id,
+ &(st->magn[magn_index]));
+ if(ret != 0){
+ /* Usage not found. Nothing to setup.*/
+ return 0;
+ }
+
+ iio_index = st->num_iio_channels;
+ if(iio_index < 0 || iio_index >= IIO_CHANNEL_MAX){
+ return -2;
+ }
+
+ /* Check if this usage hasn't been setup */
+ if(st->magn_val_addr[magn_index] != NULL){
+ return -3;
+ }
+ st->magn_val_addr[magn_index] = &(st->iio_val[iio_index]);
+
+ /* Setup IIO Channel spec */
+ channel = &(iio_chans[iio_index]);
+
+ channel->type = IIO_MAGN;
+ channel->address = attr_usage_id;
+ channel->modified = 1;
+
+ switch (attr_usage_id){
+ case HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH:
+ channel->channel2 = IIO_MOD_NORTH_MAGN_TILT_COMP;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH:
+ channel->channel2 = IIO_MOD_NORTH_TRUE_TILT_COMP;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_MAGN_NORTH:
+ channel->channel2 = IIO_MOD_NORTH_MAGN;
+ break;
+ case HID_USAGE_SENSOR_ORIENT_TRUE_NORTH:
+ channel->channel2 = IIO_MOD_NORTH_TRUE;
+ break;
case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS:
+ channel->channel2 = IIO_MOD_X;
+ break;
case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS:
+ channel->channel2 = IIO_MOD_Y;
+ break;
case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS:
- offset = usage_id - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS;
- magn_state->magn_val[CHANNEL_SCAN_INDEX_X + offset] =
- *(u32 *)raw_data;
- ret = 0;
- break;
- default:
+ channel->channel2 = IIO_MOD_Z;
break;
+ default:
+ return -4;
}
+ channel->info_mask_shared_by_type =
+ BIT(IIO_CHAN_INFO_OFFSET) |
+ BIT(IIO_CHAN_INFO_SCALE) |
+ BIT(IIO_CHAN_INFO_SAMP_FREQ) |
+ BIT(IIO_CHAN_INFO_HYSTERESIS);
+
+ channel->scan_type.sign = 's';
+ /* Real storage bits will change based on the report desc. */
+ channel->scan_type.realbits = st->magn[magn_index].size * 8;
+ /* Maximum size of a sample to capture is u32 */
+ channel->scan_type.storagebits = sizeof(u32) * 8;
+
+ (st->num_iio_channels)++;
+ ret = 0;
+
return ret;
}
-/* Parse report which is specific to an usage id*/
+/* Read the HID reports and setup IIO Channels */
static int magn_3d_parse_report(struct platform_device *pdev,
struct hid_sensor_hub_device *hsdev,
- struct iio_chan_spec *channels,
+ struct iio_chan_spec *iio_chans,
unsigned usage_id,
struct magn_3d_state *st)
{
- int ret;
+ int ret = 0;
int i;
- for (i = 0; i <= CHANNEL_SCAN_INDEX_Z; ++i) {
- ret = sensor_hub_input_get_attribute_info(hsdev,
- HID_INPUT_REPORT,
- usage_id,
- HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS + i,
- &st->magn[CHANNEL_SCAN_INDEX_X + i]);
- if (ret < 0)
- break;
- magn_3d_adjust_channel_bit_mask(channels,
- CHANNEL_SCAN_INDEX_X + i,
- st->magn[CHANNEL_SCAN_INDEX_X + i].size);
- }
- dev_dbg(&pdev->dev, "magn_3d %x:%x, %x:%x, %x:%x\n",
- st->magn[0].index,
- st->magn[0].report_id,
- st->magn[1].index, st->magn[1].report_id,
- st->magn[2].index, st->magn[2].report_id);
-
- /* Set Sensitivity field ids, when there is no individual modifier */
- if (st->common_attributes.sensitivity.index < 0) {
- sensor_hub_input_get_attribute_info(hsdev,
- HID_FEATURE_REPORT, usage_id,
- HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
- HID_USAGE_SENSOR_DATA_ORIENTATION,
- &st->common_attributes.sensitivity);
- dev_dbg(&pdev->dev, "Sensitivity index:report %d:%d\n",
- st->common_attributes.sensitivity.index,
- st->common_attributes.sensitivity.report_id);
- }
+ dev_dbg(&pdev->dev, "magn_3d_parse_reports Usage ID: %x\n", usage_id);
+ for(i = HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS;
+ i <= HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS && ret == 0;
+ i++)
+ ret = magn_3d_setup_new_iio_chan(hsdev,
+ usage_id,
+ i,
+ iio_chans,
+ st);
+
+ dev_dbg(&pdev->dev, "magn_3d_parse_reports Found %d\n magnetic axis. Returned: %d", st->num_iio_channels, ret);
+ for(i = HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH;
+ i <= HID_USAGE_SENSOR_ORIENT_TRUE_NORTH && ret == 0;
+ i++)
+ ret = magn_3d_setup_new_iio_chan(hsdev,
+ usage_id,
+ i,
+ iio_chans,
+ st);
+ dev_dbg(&pdev->dev, "magn_3d_parse_reports Found %d\n magnetic channels. Returned: %d", st->num_iio_channels, ret);
return ret;
}
@@ -307,10 +389,11 @@ static int hid_magn_3d_probe(struct platform_device *pdev)
return ret;
}
- channels = kmemdup(magn_3d_channels, sizeof(magn_3d_channels),
- GFP_KERNEL);
+ channels = kcalloc(MAGN_3D_CHANNEL_MAX,
+ sizeof(struct iio_chan_spec),
+ GFP_KERNEL);
if (!channels) {
- dev_err(&pdev->dev, "failed to duplicate channels\n");
+ dev_err(&pdev->dev, "failed to allocate memory for iio channel\n");
return -ENOMEM;
}
@@ -322,7 +405,7 @@ static int hid_magn_3d_probe(struct platform_device *pdev)
}
indio_dev->channels = channels;
- indio_dev->num_channels = ARRAY_SIZE(magn_3d_channels);
+ indio_dev->num_channels = magn_state->num_iio_channels;
indio_dev->dev.parent = &pdev->dev;
indio_dev->info = &magn_3d_info;
indio_dev->name = name;
--
1.9.3
^ permalink raw reply related
* [PATCHv2 0/3] IIO: Add support for compass north usage attribute
From: Reyad Attiyat @ 2014-06-02 23:14 UTC (permalink / raw)
To: linux-kernel, linux-iio, jic23, srinivas.pandruvada, linux-input,
jkosina
Cc: Reyad Attiyat
The following patches allow the hid-sensor-magn-3d driver to handle
the north usage attribute. It allows the driver to dynamically
create IIO channels depending on which HID reports are found.
Reyad Attiyat (3):
IIO: Documentation: Add north attribute to ABI docs
IIO: Add iio_chan modifier for True/Magnetic North HID usages
IIO: hid-sensor-magn-3d: Add in support for True/Magnetic North HID
usages
Documentation/ABI/testing/sysfs-bus-iio | 76 ++++++++
drivers/iio/industrialio-core.c | 4 +
drivers/iio/magnetometer/hid-sensor-magn-3d.c | 271 +++++++++++++++++---------
include/linux/iio/types.h | 4 +
4 files changed, 261 insertions(+), 94 deletions(-)
--
1.9.3
^ permalink raw reply
* [PATCH] HID: input - Add two new usages for digitizer
From: Ping Cheng @ 2014-06-03 0:19 UTC (permalink / raw)
To: linux-input; +Cc: jkosina, dmitry.torokhov, Ping Cheng
On Feb 17, 2014, two new usages are approved to HID usage Table 18 -
Digitizer Page:
5A Secondary Barrel Switch MC 16.4
5B Transducer Serial Number SV 16.3.1
This patch adds relevant definitions to hid/input. It also removes
outdated comments in hid.h.
Signed-off-by: Ping Cheng <pingc@wacom.com>
Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
---
drivers/hid/hid-debug.c | 2 ++
drivers/hid/hid-input.c | 5 +++++
include/linux/hid.h | 7 ++-----
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c
index 53b771d..f299f42 100644
--- a/drivers/hid/hid-debug.c
+++ b/drivers/hid/hid-debug.c
@@ -165,6 +165,8 @@ static const struct hid_usage_entry hid_usage_table[] = {
{0, 0x53, "DeviceIndex"},
{0, 0x54, "ContactCount"},
{0, 0x55, "ContactMaximumNumber"},
+ {0, 0x5A, "SecondaryBarrelSwitch"},
+ {0, 0x5B, "TransducerSerialNumber"},
{ 15, 0, "PhysicalInterfaceDevice" },
{0, 0x00, "Undefined"},
{0, 0x01, "Physical_Interface_Device"},
diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c
index e7e8b19..da0267e 100644
--- a/drivers/hid/hid-input.c
+++ b/drivers/hid/hid-input.c
@@ -684,9 +684,14 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel
break;
case 0x46: /* TabletPick */
+ case 0x5a: /* SecondaryBarrelSwitch */
map_key_clear(BTN_STYLUS2);
break;
+ case 0x5b: /* TransducerSerialNumber */
+ set_bit(MSC_SERIAL, input->mscbit);
+ break;
+
default: goto unknown;
}
break;
diff --git a/include/linux/hid.h b/include/linux/hid.h
index 720e3a1..a468ec8 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -233,11 +233,6 @@ struct hid_item {
#define HID_DG_BARRELSWITCH 0x000d0044
#define HID_DG_ERASER 0x000d0045
#define HID_DG_TABLETPICK 0x000d0046
-/*
- * as of May 20, 2009 the usages below are not yet in the official USB spec
- * but are being pushed by Microsft as described in their paper "Digitizer
- * Drivers for Windows Touch and Pen-Based Computers"
- */
#define HID_DG_CONFIDENCE 0x000d0047
#define HID_DG_WIDTH 0x000d0048
#define HID_DG_HEIGHT 0x000d0049
@@ -246,6 +241,8 @@ struct hid_item {
#define HID_DG_DEVICEINDEX 0x000d0053
#define HID_DG_CONTACTCOUNT 0x000d0054
#define HID_DG_CONTACTMAX 0x000d0055
+#define HID_DG_BARRELSWITCH2 0x000d005a
+#define HID_DG_TOOLSERIALNUMBER 0x000d005b
/*
* HID report types --- Ouch! HID spec says 1 2 3!
--
1.9.1
^ permalink raw reply related
* [PATCH] elantech: Don't set bit 1 of reg_10 when the no_hw_res quirk is set
From: Hans de Goede @ 2014-06-03 8:31 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: James Lademann, Philipp Wolfer, linux-input, stable,
Hans de Goede
The touchpad on the GIGABYTE U2442 not only stops communicating when we try
to set bit 3 (enable real hardware resolution) of reg_10, but on some BIOS
versions also when we set bit 1 (enable two finger mode auto correct).
I've asked the original reporter of:
https://bugzilla.kernel.org/show_bug.cgi?id=61151
To check that not setting bit 1 does not lead to any adverse effects on
his model / BIOS revision, and it does not, so this commit fixes the touchpad
not working on these versions by simply never setting bit 1 for laptop models
with the no_hw_res quirk.
Reported-and-tested-by: James Lademann <jwlademann@gmail.com>
Tested-by: Philipp Wolfer <ph.wolfer@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
drivers/input/mouse/elantech.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c
index b96e978..4d79821 100644
--- a/drivers/input/mouse/elantech.c
+++ b/drivers/input/mouse/elantech.c
@@ -835,7 +835,7 @@ static int elantech_set_absolute_mode(struct psmouse *psmouse)
if (etd->set_hw_resolution)
etd->reg_10 = 0x0b;
else
- etd->reg_10 = 0x03;
+ etd->reg_10 = 0x01;
if (elantech_write_reg(psmouse, 0x10, etd->reg_10))
rc = -1;
@@ -1336,7 +1336,8 @@ static int elantech_reconnect(struct psmouse *psmouse)
}
/*
- * Some hw_version 3 models go into error state when we try to set bit 3 of r10
+ * Some hw_version 3 models go into error state when we try to set
+ * bit 3 and/or bit 1 of r10
*/
static const struct dmi_system_id no_hw_res_dmi_table[] = {
#if defined(CONFIG_DMI) && defined(CONFIG_X86)
--
2.0.0
^ permalink raw reply related
* Re: [PATCH] HID: input - Add two new usages for digitizer
From: Jiri Kosina @ 2014-06-03 11:32 UTC (permalink / raw)
To: Ping Cheng; +Cc: linux-input, dmitry.torokhov, Ping Cheng
In-Reply-To: <1401754792-5607-1-git-send-email-pingc@wacom.com>
On Mon, 2 Jun 2014, Ping Cheng wrote:
> On Feb 17, 2014, two new usages are approved to HID usage Table 18 -
> Digitizer Page:
>
> 5A Secondary Barrel Switch MC 16.4
> 5B Transducer Serial Number SV 16.3.1
>
> This patch adds relevant definitions to hid/input. It also removes
> outdated comments in hid.h.
>
> Signed-off-by: Ping Cheng <pingc@wacom.com>
> Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Applied, thanks.
--
Jiri Kosina
SUSE Labs
^ permalink raw reply
* [PROBLEM] Asus X450CC touchpad not working
From: Raphaël HUCK @ 2014-06-03 12:06 UTC (permalink / raw)
To: linux-input
Hi,
the touchpad of my Asus X450CC doesn't work at all under a fresh
install of Xubuntu 14.04 with upstream kernel 3.15-rc7. However, it does
work without problems on Windows 7. I have to use an external mouse
"Logitech G500" to be able to control the mouse pointer.
-Raphaël
$ cat /proc/version
Linux version 3.15.0-031500rc7-generic (apw@gomeisa) (gcc version 4.6.3
(Ubuntu/Linaro 4.6.3-1ubuntu5) ) #201405251935 SMP Sun May 25 23:36:23
UTC 2014
$ lsb_release -rd
Description: Ubuntu 14.04 LTS
Release: 14.04
$ cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 58
model name : Intel(R) Core(TM) i3-3217U CPU @ 1.80GHz
stepping : 9
microcode : 0x15
cpu MHz : 1733.625
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe
syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl
xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor
ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic
popcnt tsc_deadline_timer xsave avx f16c lahf_lm ida arat epb xsaveopt
pln pts dtherm tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms
bogomips : 3591.90
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 58
model name : Intel(R) Core(TM) i3-3217U CPU @ 1.80GHz
stepping : 9
microcode : 0x15
cpu MHz : 1649.250
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 1
cpu cores : 2
apicid : 2
initial apicid : 2
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe
syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl
xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor
ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic
popcnt tsc_deadline_timer xsave avx f16c lahf_lm ida arat epb xsaveopt
pln pts dtherm tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms
bogomips : 3591.90
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 2
vendor_id : GenuineIntel
cpu family : 6
model : 58
model name : Intel(R) Core(TM) i3-3217U CPU @ 1.80GHz
stepping : 9
microcode : 0x15
cpu MHz : 1677.375
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 2
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe
syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl
xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor
ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic
popcnt tsc_deadline_timer xsave avx f16c lahf_lm ida arat epb xsaveopt
pln pts dtherm tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms
bogomips : 3591.90
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
processor : 3
vendor_id : GenuineIntel
cpu family : 6
model : 58
model name : Intel(R) Core(TM) i3-3217U CPU @ 1.80GHz
stepping : 9
microcode : 0x15
cpu MHz : 1593.000
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 1
cpu cores : 2
apicid : 3
initial apicid : 3
fpu : yes
fpu_exception : yes
cpuid level : 13
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe
syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl
xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor
ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic
popcnt tsc_deadline_timer xsave avx f16c lahf_lm ida arat epb xsaveopt
pln pts dtherm tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms
bogomips : 3591.90
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
$ cat /proc/modules
ctr 13193 2 - Live 0x0000000000000000
ccm 17856 2 - Live 0x0000000000000000
bnep 19884 2 - Live 0x0000000000000000
rfcomm 75078 0 - Live 0x0000000000000000
bluetooth 461775 10 bnep,rfcomm, Live 0x0000000000000000
6lowpan_iphc 18968 1 bluetooth, Live 0x0000000000000000
nls_iso8859_1 12713 1 - Live 0x0000000000000000
snd_hda_codec_hdmi 48229 1 - Live 0x0000000000000000
snd_hda_codec_realtek 72529 1 - Live 0x0000000000000000
snd_hda_codec_generic 70087 1 snd_hda_codec_realtek, Live 0x0000000000000000
asus_nb_wmi 16990 0 - Live 0x0000000000000000
uvcvideo 82299 0 - Live 0x0000000000000000
asus_wmi 24697 1 asus_nb_wmi, Live 0x0000000000000000
sparse_keymap 13890 1 asus_wmi, Live 0x0000000000000000
videobuf2_vmalloc 13216 1 uvcvideo, Live 0x0000000000000000
videobuf2_memops 13362 1 videobuf2_vmalloc, Live 0x0000000000000000
intel_rapl 19238 0 - Live 0x0000000000000000
videobuf2_core 45435 1 uvcvideo, Live 0x0000000000000000
videodev 149504 2 uvcvideo,videobuf2_core, Live 0x0000000000000000
arc4 12573 2 - Live 0x0000000000000000
x86_pkg_temp_thermal 14312 0 - Live 0x0000000000000000
intel_powerclamp 19099 0 - Live 0x0000000000000000
joydev 17587 0 - Live 0x0000000000000000
rt2800pci 13674 0 - Live 0x0000000000000000
rt2800mmio 21082 1 rt2800pci, Live 0x0000000000000000
rt2800lib 95492 2 rt2800pci,rt2800mmio, Live 0x0000000000000000
nouveau 1212985 1 - Live 0x0000000000000000
coretemp 13638 0 - Live 0x0000000000000000
rt2x00pci 13287 1 rt2800pci, Live 0x0000000000000000
snd_hda_intel 30608 3 - Live 0x0000000000000000
snd_hda_controller 35518 1 snd_hda_intel, Live 0x0000000000000000
rt2x00mmio 13661 2 rt2800pci,rt2800mmio, Live 0x0000000000000000
kvm_intel 148919 0 - Live 0x0000000000000000
mxm_wmi 13021 1 nouveau, Live 0x0000000000000000
kvm 463808 1 kvm_intel, Live 0x0000000000000000
rt2x00lib 56125 5 rt2800pci,rt2800mmio,rt2800lib,rt2x00pci,rt2x00mmio, Live 0x0000000000000000
ttm 90341 1 nouveau, Live 0x0000000000000000
snd_hda_codec 144671 5 snd_hda_codec_hdmi,snd_hda_codec_realtek,snd_hda_codec_generic,snd_hda_intel,snd_hda_controller, Live 0x0000000000000000
mac80211 663883 3 rt2800lib,rt2x00pci,rt2x00lib, Live 0x0000000000000000
snd_hwdep 13613 1 snd_hda_codec, Live 0x0000000000000000
snd_pcm 113863 4 snd_hda_codec_hdmi,snd_hda_intel,snd_hda_controller,snd_hda_codec, Live 0x0000000000000000
crct10dif_pclmul 14268 0 - Live 0x0000000000000000
crc32_pclmul 13180 0 - Live 0x0000000000000000
i915 873516 3 - Live 0x0000000000000000
snd_seq_midi 13564 0 - Live 0x0000000000000000
ghash_clmulni_intel 13230 0 - Live 0x0000000000000000
snd_seq_midi_event 14899 1 snd_seq_midi, Live 0x0000000000000000
snd_rawmidi 30865 1 snd_seq_midi, Live 0x0000000000000000
cryptd 20531 1 ghash_clmulni_intel, Live 0x0000000000000000
cfg80211 515506 2 rt2x00lib,mac80211, Live 0x0000000000000000
drm_kms_helper 59729 2 nouveau,i915, Live 0x0000000000000000
snd_seq 67636 2 snd_seq_midi,snd_seq_midi_event, Live 0x0000000000000000
eeprom_93cx6 13344 1 rt2800pci, Live 0x0000000000000000
mei_me 18562 0 - Live 0x0000000000000000
snd_seq_device 14497 3 snd_seq_midi,snd_rawmidi,snd_seq, Live 0x0000000000000000
crc_ccitt 12707 1 rt2800lib, Live 0x0000000000000000
snd_timer 30118 2 snd_pcm,snd_seq, Live 0x0000000000000000
drm 310655 8 nouveau,ttm,i915,drm_kms_helper, Live 0x0000000000000000
snd 74195 17 snd_hda_codec_hdmi,snd_hda_codec_realtek,snd_hda_codec_generic,snd_hda_intel,snd_hda_codec,snd_hwdep,snd_pcm,snd_rawmidi,snd_seq,snd_seq_device,snd_timer, Live 0x0000000000000000
mei 87522 1 mei_me, Live 0x0000000000000000
i2c_algo_bit 13564 2 nouveau,i915, Live 0x0000000000000000
soundcore 12680 2 snd_hda_codec,snd, Live 0x0000000000000000
microcode 24391 0 - Live 0x0000000000000000
rtsx_pci_ms 18337 0 - Live 0x0000000000000000
lpc_ich 21176 0 - Live 0x0000000000000000
memstick 16968 1 rtsx_pci_ms, Live 0x0000000000000000
mac_hid 13275 0 - Live 0x0000000000000000
video 19932 3 asus_wmi,nouveau,i915, Live 0x0000000000000000
wmi 19379 3 asus_wmi,nouveau,mxm_wmi, Live 0x0000000000000000
serio_raw 13483 0 - Live 0x0000000000000000
parport_pc 32906 0 - Live 0x0000000000000000
ppdev 17711 0 - Live 0x0000000000000000
lp 17799 0 - Live 0x0000000000000000
parport 42481 3 parport_pc,ppdev,lp, Live 0x0000000000000000
hid_generic 12559 0 - Live 0x0000000000000000
usbhid 53121 0 - Live 0x0000000000000000
hid 106436 2 hid_generic,usbhid, Live 0x0000000000000000
rtsx_pci_sdmmc 23482 0 - Live 0x0000000000000000
psmouse 113320 0 - Live 0x0000000000000000
ahci 30167 3 - Live 0x0000000000000000
r8169 73316 0 - Live 0x0000000000000000
rtsx_pci 46393 2 rtsx_pci_ms,rtsx_pci_sdmmc, Live 0x0000000000000000
libahci 32191 1 ahci, Live 0x0000000000000000
mii 13981 1 r8169, Live 0x0000000000000000
$ cat /proc/ioports
0000-0cf7 : PCI Bus 0000:00
0000-001f : dma1
0020-0021 : pic1
0040-0043 : timer0
0050-0053 : timer1
0060-0060 : keyboard
0062-0062 : EC data
0064-0064 : keyboard
0066-0066 : EC cmd
0070-0077 : rtc0
0080-008f : dma page reg
00a0-00a1 : pic2
00c0-00df : dma2
00f0-00ff : fpu
0400-0403 : ACPI PM1a_EVT_BLK
0404-0405 : ACPI PM1a_CNT_BLK
0408-040b : ACPI PM_TMR
0410-0415 : ACPI CPU throttle
0420-042f : ACPI GPE0_BLK
0430-0433 : iTCO_wdt
0450-0450 : ACPI PM2_CNT_BLK
0454-0457 : pnp 00:06
0458-047f : pnp 00:04
0460-047f : iTCO_wdt
04d0-04d1 : pnp 00:07
0500-057f : pnp 00:04
0680-069f : pnp 00:04
0cf8-0cff : PCI conf1
0d00-ffff : PCI Bus 0000:00
1000-100f : pnp 00:04
164e-164f : pnp 00:04
d000-dfff : PCI Bus 0000:04
d000-d0ff : 0000:04:00.2
d000-d0ff : r8169
e000-efff : PCI Bus 0000:01
e000-e07f : 0000:01:00.0
f000-f03f : 0000:00:02.0
f040-f05f : 0000:00:1f.3
f060-f07f : 0000:00:1f.2
f060-f07f : ahci
f080-f083 : 0000:00:1f.2
f080-f083 : ahci
f090-f097 : 0000:00:1f.2
f090-f097 : ahci
f0a0-f0a3 : 0000:00:1f.2
f0a0-f0a3 : ahci
f0b0-f0b7 : 0000:00:1f.2
f0b0-f0b7 : ahci
ffff-ffff : pnp 00:04
ffff-ffff : pnp 00:04
$ cat /proc/iomem
00000000-00000fff : reserved
00001000-0009efff : System RAM
0009f000-0009ffff : reserved
000a0000-000bffff : PCI Bus 0000:00
000c0000-000cefff : Video ROM
000cf000-000cffff : Adapter ROM
000d4000-000d7fff : PCI Bus 0000:00
000d8000-000dbfff : PCI Bus 0000:00
000dc000-000dffff : PCI Bus 0000:00
000f0000-000fffff : System ROM
00100000-1fffffff : System RAM
01000000-0177cd98 : Kernel code
0177cd99-01d1ef7f : Kernel data
01e7b000-01fe0fff : Kernel bss
20000000-201fffff : reserved
20000000-201fffff : pnp 00:0d
20200000-40003fff : System RAM
40004000-40004fff : reserved
40004000-40004fff : pnp 00:0d
40005000-c9788fff : System RAM
c9789000-c9d89fff : ACPI Non-volatile Storage
c9d8a000-c9d8cfff : reserved
c9d8d000-c9da3fff : System RAM
c9da4000-c9da9fff : reserved
c9daa000-c9f16fff : System RAM
c9f17000-c9f1afff : reserved
c9f1b000-c9f65fff : System RAM
c9f66000-c9f6cfff : reserved
c9f6d000-c9f79fff : reserved
c9f7a000-c9f8bfff : reserved
c9f8c000-c9f8efff : System RAM
c9f8f000-c9f90fff : reserved
c9f91000-c9fa7fff : System RAM
c9fa8000-c9fadfff : reserved
c9fae000-c9fb5fff : System RAM
c9fb6000-c9fb6fff : reserved
c9fb7000-c9fc5fff : System RAM
c9fc6000-c9fc6fff : reserved
c9fc7000-c9fd1fff : System RAM
c9fd2000-c9fd6fff : reserved
c9fd7000-ca003fff : System RAM
ca004000-ca004fff : reserved
ca005000-ca014fff : System RAM
ca015000-ca03bfff : reserved
ca03c000-ca04efff : System RAM
ca04f000-ca04ffff : reserved
ca050000-ca050fff : System RAM
ca051000-ca052fff : reserved
ca053000-ca053fff : System RAM
ca054000-ca058fff : reserved
ca059000-ca06ffff : System RAM
ca070000-ca0cffff : reserved
ca0d0000-ca0eafff : reserved
ca0eb000-ca614fff : reserved
ca615000-ca894fff : ACPI Non-volatile Storage
ca895000-ca899fff : ACPI Tables
ca89a000-ca89afff : System RAM
ca89b000-ca8ddfff : ACPI Non-volatile Storage
ca8de000-cad01fff : System RAM
cad02000-caff3fff : reserved
caff4000-caffffff : System RAM
cb000000-cbbfffff : RAM buffer
cbc00000-cfdfffff : reserved
cbe00000-cfdfffff : Graphics Stolen Memory
cfe00000-feafffff : PCI Bus 0000:00
cfe00000-cfe00fff : pnp 00:0b
cfe00000-cfe00fff : pnp 00:0c
d0000000-dfffffff : 0000:00:02.0
e0000000-f1ffffff : PCI Bus 0000:01
e0000000-efffffff : 0000:01:00.0
f0000000-f1ffffff : 0000:01:00.0
f2100000-f21fffff : PCI Bus 0000:04
f2100000-f2103fff : 0000:04:00.2
f2100000-f2103fff : r8169
f6000000-f70fffff : PCI Bus 0000:01
f6000000-f6ffffff : 0000:01:00.0
f7000000-f707ffff : 0000:01:00.0
f7400000-f77fffff : 0000:00:02.0
f7800000-f78fffff : PCI Bus 0000:04
f7800000-f780ffff : 0000:04:00.0
f7800000-f780ffff : rtsx_pci
f7810000-f7810fff : 0000:04:00.2
f7810000-f7810fff : r8169
f7900000-f79fffff : PCI Bus 0000:03
f7900000-f790ffff : 0000:03:00.1
f7910000-f791ffff : 0000:03:00.0
f7910000-f791ffff : 0000:03:00.0
f7a00000-f7a0ffff : 0000:00:14.0
f7a00000-f7a0ffff : xhci_hcd
f7a10000-f7a13fff : 0000:00:1b.0
f7a10000-f7a13fff : ICH HD audio
f7a15000-f7a150ff : 0000:00:1f.3
f7a16000-f7a167ff : 0000:00:1f.2
f7a16000-f7a167ff : ahci
f7a17000-f7a173ff : 0000:00:1d.0
f7a17000-f7a173ff : ehci_hcd
f7a18000-f7a183ff : 0000:00:1a.0
f7a18000-f7a183ff : ehci_hcd
f7a1a000-f7a1a00f : 0000:00:16.0
f7a1a000-f7a1a00f : mei_me
f8000000-fbffffff : PCI MMCONFIG 0000 [bus 00-3f]
f8000000-fbffffff : reserved
f8000000-fbffffff : pnp 00:0b
fec00000-fec00fff : reserved
fec00000-fec003ff : IOAPIC 0
fed00000-fed03fff : reserved
fed00000-fed003ff : HPET 0
fed10000-fed17fff : pnp 00:0b
fed18000-fed18fff : pnp 00:0b
fed19000-fed19fff : pnp 00:0b
fed1c000-fed1ffff : reserved
fed1c000-fed1ffff : pnp 00:0b
fed1f410-fed1f414 : iTCO_wdt
fed20000-fed3ffff : pnp 00:0b
fed40000-fed44fff : pnp 00:00
fed45000-fed8ffff : pnp 00:0b
fed90000-fed93fff : pnp 00:0b
fee00000-fee00fff : Local APIC
fee00000-fee00fff : reserved
ff000000-ffffffff : reserved
ff000000-ffffffff : pnp 00:0b
100000000-12f1fffff : System RAM
12f200000-12fffffff : RAM buffer
$ sudo lspci -vvv
00:00.0 Host bridge: Intel Corporation 3rd Gen Core processor DRAM Controller (rev 09)
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information: Len=0c <?>
Kernel driver in use: ivb_uncore
00:01.0 PCI bridge: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port (rev 09) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 0000e000-0000efff
Memory behind bridge: f6000000-f70fffff
Prefetchable memory behind bridge: 00000000e0000000-00000000f1ffffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [88] Subsystem: ASUSTeK Computer Inc. Device 126d
Capabilities: [80] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee0f00c Data: 4161
Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 256 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <256ns, L1 <8us
ClockPM- Surprise- LLActRep- BwNot+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #1, PowerLimit 75.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet+ LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [140 v1] Root Complex Link
Desc: PortNumber=02 ComponentID=01 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=01 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed19000
Kernel driver in use: pcieport
00:02.0 VGA compatible controller: Intel Corporation 3rd Gen Core processor Graphics Controller (rev 09) (prog-if 00 [VGA controller])
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 46
Region 0: Memory at f7400000 (64-bit, non-prefetchable) [size=4M]
Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M]
Region 4: I/O ports at f000 [size=64]
Expansion ROM at <unassigned> [disabled]
Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee0f00c Data: 41e1
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a4] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: i915
00:14.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset Family USB xHCI Host Controller (rev 04) (prog-if 30 [XHCI])
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 41
Region 0: Memory at f7a00000 (64-bit, non-prefetchable) [size=64K]
Capabilities: [70] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+
Address: 00000000fee0500c Data: 4191
Kernel driver in use: xhci_hcd
00:16.0 Communication controller: Intel Corporation 7 Series/C210 Series Chipset Family MEI Controller #1 (rev 04)
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 45
Region 0: Memory at f7a1a000 (64-bit, non-prefetchable) [size=16]
Capabilities: [50] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0f00c Data: 41d1
Kernel driver in use: mei_me
00:1a.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #2 (rev 04) (prog-if 20 [EHCI])
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at f7a18000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
00:1b.0 Audio device: Intel Corporation 7 Series/C210 Series Chipset Family High Definition Audio Controller (rev 04)
Subsystem: ASUSTeK Computer Inc. Device 116f
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 47
Region 0: Memory at f7a10000 (64-bit, non-prefetchable) [size=16K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0f00c Data: 4142
Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
Status: NegoPending- InProgress-
VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=1 ArbSelect=Fixed TC/VC=22
Status: NegoPending- InProgress-
Capabilities: [130 v1] Root Complex Link
Desc: PortNumber=0f ComponentID=00 EltType=Config
Link0: Desc: TargetPort=00 TargetComponent=00 AssocRCRB- LinkType=MemMapped LinkValid+
Addr: 00000000fed1c000
Kernel driver in use: snd_hda_intel
00:1c.0 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 1 (rev c4) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: fff00000-000fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <1us, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM L0s L1 Enabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #0, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-
Changed: MRL- PresDet- LinkState-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 126d
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
00:1c.1 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 2 (rev c4) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
I/O behind bridge: 0000f000-00000fff
Memory behind bridge: f7900000-f79fffff
Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #2, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #1, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 126d
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
00:1c.3 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 4 (rev c4) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
I/O behind bridge: 0000d000-0000dfff
Memory behind bridge: f7800000-f78fffff
Prefetchable memory behind bridge: 00000000f2100000-00000000f21fffff
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
LnkCap: Port #4, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <16us
ClockPM- Surprise- LLActRep+ BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-
SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-
Slot #3, PowerLimit 10.000W; Interlock- NoCompl+
SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
Changed: MRL- PresDet- LinkState+
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
Address: 00000000 Data: 0000
Capabilities: [90] Subsystem: ASUSTeK Computer Inc. Device 126d
Capabilities: [a0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: pcieport
00:1d.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #1 (rev 04) (prog-if 20 [EHCI])
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at f7a17000 (32-bit, non-prefetchable) [size=1K]
Capabilities: [50] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [58] Debug port: BAR=1 offset=00a0
Capabilities: [98] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ehci-pci
00:1f.0 ISA bridge: Intel Corporation HM76 Express Chipset LPC Controller (rev 04)
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Capabilities: [e0] Vendor Specific Information: Len=0c <?>
Kernel driver in use: lpc_ich
00:1f.2 SATA controller: Intel Corporation 7 Series Chipset Family 6-port SATA Controller [AHCI mode] (rev 04) (prog-if 01 [AHCI 1.0])
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin B routed to IRQ 43
Region 0: I/O ports at f0b0 [size=8]
Region 1: I/O ports at f0a0 [size=4]
Region 2: I/O ports at f090 [size=8]
Region 3: I/O ports at f080 [size=4]
Region 4: I/O ports at f060 [size=32]
Region 5: Memory at f7a16000 (32-bit, non-prefetchable) [size=2K]
Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
Address: fee0500c Data: 41b1
Capabilities: [70] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004
Capabilities: [b0] PCI Advanced Features
AFCap: TP+ FLR+
AFCtrl: FLR-
AFStatus: TP-
Kernel driver in use: ahci
00:1f.3 SMBus: Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller (rev 04)
Subsystem: ASUSTeK Computer Inc. Device 126d
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin C routed to IRQ 10
Region 0: Memory at f7a15000 (64-bit, non-prefetchable) [size=256]
Region 4: I/O ports at f040 [size=32]
01:00.0 3D controller: NVIDIA Corporation GF117M [GeForce 610M/710M/820M / GT 620M/625M/630M/720M] (rev a1)
Subsystem: ASUSTeK Computer Inc. GeForce GT 720M
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 48
Region 0: Memory at f6000000 (32-bit, non-prefetchable) [size=16M]
Region 1: Memory at e0000000 (64-bit, prefetchable) [size=256M]
Region 3: Memory at f0000000 (64-bit, prefetchable) [size=32M]
Region 5: I/O ports at e000 [size=128]
Expansion ROM at f7000000 [disabled] [size=512K]
Capabilities: [60] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0f00c Data: 4152
Capabilities: [78] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 <64us
ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
MaxPayload 256 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x8, ASPM L0s L1, Exit Latency L0s <512ns, L1 <4us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range AB, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b4] Vendor Specific Information: Len=14 <?>
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [128 v1] Power Budgeting <?>
Capabilities: [600 v1] Vendor Specific Information: ID=0001 Rev=1 Len=024 <?>
Kernel driver in use: nouveau
03:00.0 Network controller: Ralink corp. RT3290 Wireless 802.11n 1T/1R PCIe
Subsystem: Foxconn International, Inc. Device e055
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 17
Region 0: Memory at f7910000 (32-bit, non-prefetchable) [size=64K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <128ns, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [140 v1] Device Serial Number 00-00-b3-22-82-30-35-54
Kernel driver in use: rt2800pci
03:00.1 Bluetooth: Ralink corp. RT3290 Bluetooth
Subsystem: Foxconn International, Inc. Device e056
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 3
Region 0: Memory at f7900000 (32-bit, non-prefetchable) [size=64K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <128ns, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [140 v1] Device Serial Number 00-00-b4-22-82-30-35-54
04:00.0 Unassigned class [ff00]: Realtek Semiconductor Co., Ltd. Device 5289 (rev 01)
Subsystem: ASUSTeK Computer Inc. Device 202f
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin B routed to IRQ 42
Region 0: Memory at f7800000 (32-bit, non-prefetchable) [size=64K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0f00c Data: 41a1
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 <64us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b0] MSI-X: Enable- Count=1 Masked-
Vector table: BAR=0 offset=00000000
PBA: BAR=0 offset=00000000
Capabilities: [d0] Vital Product Data
Not readable
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [140 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [160 v1] Device Serial Number 00-00-00-00-00-00-00-00
Kernel driver in use: rtsx_pci
04:00.2 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 0a)
Subsystem: ASUSTeK Computer Inc. Device 200f
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 64 bytes
Interrupt: pin A routed to IRQ 44
Region 0: I/O ports at d000 [size=256]
Region 2: Memory at f7810000 (64-bit, non-prefetchable) [size=4K]
Region 4: Memory at f2100000 (64-bit, prefetchable) [size=16K]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+
Address: 00000000fee0f00c Data: 41c1
Capabilities: [70] Express (v2) Endpoint, MSI 01
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 4096 bytes
DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s unlimited, L1 <64us
ClockPM+ Surprise- LLActRep- BwNot-
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [b0] MSI-X: Enable- Count=4 Masked-
Vector table: BAR=4 offset=00000000
PBA: BAR=4 offset=00000800
Capabilities: [d0] Vital Product Data
Unknown small resource type 00, will not decode more.
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr+ BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
Capabilities: [160 v1] Device Serial Number 01-00-00-00-68-4c-e0-00
Kernel driver in use: r8169
$ cat /proc/bus/input/devices
I: Bus=0019 Vendor=0000 Product=0005 Version=0000
N: Name="Lid Switch"
P: Phys=PNP0C0D/button/input0
S: Sysfs=/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input0
U: Uniq=
H: Handlers=event0
B: PROP=0
B: EV=21
B: SW=1
I: Bus=0019 Vendor=0000 Product=0003 Version=0000
N: Name="Sleep Button"
P: Phys=PNP0C0E/button/input0
S: Sysfs=/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input1
U: Uniq=
H: Handlers=kbd event1
B: PROP=0
B: EV=3
B: KEY=4000 0 0
I: Bus=0019 Vendor=0000 Product=0001 Version=0000
N: Name="Power Button"
P: Phys=LNXPWRBN/button/input0
S: Sysfs=/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2
U: Uniq=
H: Handlers=kbd event2
B: PROP=0
B: EV=3
B: KEY=10000000000000 0
I: Bus=0011 Vendor=0001 Product=0001 Version=ab41
N: Name="AT Translated Set 2 keyboard"
P: Phys=isa0060/serio0/input0
S: Sysfs=/devices/platform/i8042/serio0/input/input3
U: Uniq=
H: Handlers=sysrq kbd event3
B: PROP=0
B: EV=120013
B: KEY=402000000 3803078f800d001 feffffdfffefffff fffffffffffffffe
B: MSC=10
B: LED=7
I: Bus=0003 Vendor=046d Product=c068 Version=0111
N: Name="Logitech G500"
P: Phys=usb-0000:00:14.0-2/input0
S:
Sysfs=/devices/pci0000:00/0000:00:14.0/usb3/3-2/3-2:1.0/0003:046D:C068.0001/input/input12
U: Uniq=5B1D8872EC0018 H: Handlers=mouse0 event4
B: PROP=0
B: EV=17
B: KEY=ffff0000 0 0 0 0
B: REL=143
B: MSC=10
I: Bus=0003 Vendor=046d Product=c068 Version=0111
N: Name="Logitech G500"
P: Phys=usb-0000:00:14.0-2/input1
S:
Sysfs=/devices/pci0000:00/0000:00:14.0/usb3/3-2/3-2:1.1/0003:046D:C068.0002/input/input13
U: Uniq=5B1D8872EC0018 H: Handlers=sysrq kbd event5
B: PROP=0
B: EV=10001f
B: KEY=4837fff17aff32d bf54444600000000 1 30f908b17c007
ffe77bfad9415fff febeffdfffefffff fffffffffffffffe B: REL=40
B: ABS=100000000
B: MSC=10
I: Bus=0011 Vendor=0002 Product=0001 Version=0063
N: Name="PS/2 Logitech Wheel Mouse"
P: Phys=isa0060/serio4/input0
S: Sysfs=/devices/platform/i8042/serio4/input/input11
U: Uniq=
H: Handlers=mouse1 event6
B: PROP=0
B: EV=7
B: KEY=70000 0 0 0 0
B: REL=3
I: Bus=0003 Vendor=04f2 Product=b40a Version=6964
N: Name="USB2.0 HD UVC WebCam"
P: Phys=usb-0000:00:1a.0-1.3/button
S:
Sysfs=/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.3/1-1.3:1.0/input/input14
U: Uniq= H: Handlers=kbd event7
B: PROP=0
B: EV=3
B: KEY=100000 0 0 0
I: Bus=0019 Vendor=0000 Product=0006 Version=0000
N: Name="Video Bus"
P: Phys=LNXVIDEO/video/input0
S:
Sysfs=/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:02/LNXVIDEO:00/input/input15
U: Uniq= H: Handlers=kbd event8
B: PROP=0
B: EV=3
B: KEY=3e000b00000000 0 0 0
I: Bus=0019 Vendor=0000 Product=0000 Version=0000
N: Name="Asus WMI hotkeys"
P: Phys=asus-nb-wmi/input0
S: Sysfs=/devices/platform/asus-nb-wmi/input/input16
U: Uniq=
H: Handlers=rfkill kbd event9
B: PROP=0
B: EV=100013
B: KEY=80000 0 800000000000 0 0 a1606f00900000 8200027800501000
e000000000000 0 B: MSC=10
I: Bus=0019 Vendor=0000 Product=0006 Version=0000
N: Name="Video Bus"
P: Phys=LNXVIDEO/video/input0
S:
Sysfs=/devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:01/input/input17
U: Uniq= H: Handlers=kbd event10
B: PROP=0
B: EV=3
B: KEY=3e000b00000000 0 0 0
I: Bus=0000 Vendor=0000 Product=0000 Version=0000
N: Name="HDA Intel PCH Headphone"
P: Phys=ALSA
S: Sysfs=/devices/pci0000:00/0000:00:1b.0/sound/card0/input18
U: Uniq=
H: Handlers=event11
B: PROP=0
B: EV=21
B: SW=4
I: Bus=0000 Vendor=0000 Product=0000 Version=0000
N: Name="HDA Intel PCH HDMI/DP,pcm=3"
P: Phys=ALSA
S: Sysfs=/devices/pci0000:00/0000:00:1b.0/sound/card0/input19
U: Uniq=
H: Handlers=event12
B: PROP=0
B: EV=21
B: SW=140
$ xinput
⎡ Virtual core pointer id=2 [master pointer (3)]
⎜ ↳ Virtual core XTEST pointer id=4 [slave pointer (2)]
⎜ ↳ Logitech G500 id=10 [slave pointer (2)]
⎜ ↳ Logitech G500 id=11 [slave pointer (2)]
⎜ ↳ PS/2 Logitech Wheel Mouse id=15 [slave pointer (2)]
⎣ Virtual core keyboard id=3 [master keyboard (2)]
↳ Virtual core XTEST keyboard id=5 [slave keyboard (3)]
↳ Power Button id=6 [slave keyboard (3)]
↳ Video Bus id=7 [slave keyboard (3)]
↳ Video Bus id=8 [slave keyboard (3)]
↳ Sleep Button id=9 [slave keyboard (3)]
↳ USB2.0 HD UVC WebCam id=12 [slave keyboard (3)]
↳ Asus WMI hotkeys id=13 [slave keyboard (3)]
↳ AT Translated Set 2 keyboard id=14 [slave keyboard (3)]
$ dmesg | grep PS/2
[ 2.198041] i8042: PNP: PS/2 Controller [PNP030b:PS2K,PNP0f03:PS2M] at 0x60,0x64 irq 1,12
[ 2.207915] mousedev: PS/2 mouse device common for all mice
[ 5.391745] input: PS/2 Logitech Wheel Mouse as /devices/platform/i8042/serio4/input/input11
$ cat /var/log/Xorg.0.log | grep PS/2
[ 30.339] (II) config/udev: Adding input device PS/2 Logitech Wheel Mouse (/dev/input/event6)
[ 30.339] (**) PS/2 Logitech Wheel Mouse: Applying InputClass "evdev pointer catchall"
[ 30.339] (II) Using input driver 'evdev' for 'PS/2 Logitech Wheel Mouse'
[ 30.339] (**) PS/2 Logitech Wheel Mouse: always reports core events
[ 30.339] (**) evdev: PS/2 Logitech Wheel Mouse: Device: "/dev/input/event6"
[ 30.339] (--) evdev: PS/2 Logitech Wheel Mouse: Vendor 0x2 Product 0x1
[ 30.340] (--) evdev: PS/2 Logitech Wheel Mouse: Found 3 mouse buttons
[ 30.340] (--) evdev: PS/2 Logitech Wheel Mouse: Found relative axes
[ 30.340] (--) evdev: PS/2 Logitech Wheel Mouse: Found x and y relative axes
[ 30.340] (II) evdev: PS/2 Logitech Wheel Mouse: Configuring as mouse
[ 30.340] (**) evdev: PS/2 Logitech Wheel Mouse: YAxisMapping: buttons 4 and 5
[ 30.340] (**) evdev: PS/2 Logitech Wheel Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
[ 30.340] (II) XINPUT: Adding extended input device "PS/2 Logitech Wheel Mouse" (type: MOUSE, id 15)
[ 30.340] (II) evdev: PS/2 Logitech Wheel Mouse: initialized for relative axes.
[ 30.340] (**) PS/2 Logitech Wheel Mouse: (accel) keeping acceleration scheme 1
[ 30.340] (**) PS/2 Logitech Wheel Mouse: (accel) acceleration profile 0
[ 30.340] (**) PS/2 Logitech Wheel Mouse: (accel) acceleration factor: 2.000
[ 30.340] (**) PS/2 Logitech Wheel Mouse: (accel) acceleration threshold: 4
[ 30.340] (II) config/udev: Adding input device PS/2 Logitech Wheel Mouse (/dev/input/mouse1)
--
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^ permalink raw reply
* Re: [PATCH] i8042: Don't print an error message just because there's no chip
From: Adam Jackson @ 2014-06-03 13:53 UTC (permalink / raw)
To: Josh Boyer; +Cc: linux-input, Linux-Kernel@Vger. Kernel. Org, Peter Jones
In-Reply-To: <CA+5PVA6zHH_rj_2cawnWxQ_JRiyybFsNM3d30cCN=FpMiMuXxg@mail.gmail.com>
On Tue, 2014-02-25 at 11:06 -0500, Josh Boyer wrote:
> On Tue, Feb 25, 2014 at 10:47 AM, Adam Jackson <ajax@redhat.com> wrote:
> > From: Peter Jones <pjones@redhat.com>
> >
> > Some systems, such as EFI-based Apple systems, won't necessarily have an
> > i8042 to initialize. We shouldn't be printing an error message in this
> > case, since not detecting the chip is the correct behavior.
> >
> > v2: Downgrade to pr_notice instead of pr_err.
> >
> > Signed-off-by: Adam Jackson <ajax@redhat.com>
>
> Reviewed-by: Josh Boyer <jwboyer@fedoraproject.org>
Ping? This patch or something like it has been pending since 2008 [1],
would be nice to see it merged before it's old enough to start first
grade.
[1] - https://lkml.org/lkml/2008/9/29/248
- ajax
^ permalink raw reply
* Re: [PATCH] i8042: Don't print an error message just because there's no chip
From: Benjamin Tissoires @ 2014-06-03 14:00 UTC (permalink / raw)
To: Adam Jackson
Cc: Josh Boyer, linux-input, Linux-Kernel@Vger. Kernel. Org,
Peter Jones, Dmitry Torokhov
In-Reply-To: <1401803636.2274.6.camel@dmt>
On Tue, Jun 3, 2014 at 9:53 AM, Adam Jackson <ajax@redhat.com> wrote:
> On Tue, 2014-02-25 at 11:06 -0500, Josh Boyer wrote:
>> On Tue, Feb 25, 2014 at 10:47 AM, Adam Jackson <ajax@redhat.com> wrote:
>> > From: Peter Jones <pjones@redhat.com>
>> >
>> > Some systems, such as EFI-based Apple systems, won't necessarily have an
>> > i8042 to initialize. We shouldn't be printing an error message in this
>> > case, since not detecting the chip is the correct behavior.
>> >
>> > v2: Downgrade to pr_notice instead of pr_err.
>> >
>> > Signed-off-by: Adam Jackson <ajax@redhat.com>
>>
>> Reviewed-by: Josh Boyer <jwboyer@fedoraproject.org>
>
> Ping? This patch or something like it has been pending since 2008 [1],
> would be nice to see it merged before it's old enough to start first
> grade.
>
> [1] - https://lkml.org/lkml/2008/9/29/248
>
Hey Ajax,
regarding the input stuff, adding the maintainers always help.
So adding Dmitry in CC.
BTW, the patch looks good enough:
Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Cheers,
Benjamin
^ permalink raw reply
* Re: [PATCHv2 3/3] IIO: hid-sensor-magn-3d: Add in support for True/Magnetic North HID usages
From: Srinivas Pandruvada @ 2014-06-03 17:43 UTC (permalink / raw)
To: Reyad Attiyat
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, jic23-DgEjT+Ai2ygdnm+yROfE0A,
linux-input-u79uwXL29TY76Z2rM5mHXA, jkosina-AlSwsSmVLrQ
In-Reply-To: <1401750890-31854-4-git-send-email-reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 06/02/2014 04:14 PM, Reyad Attiyat wrote:
> Updated magn_3d_channel enum for all possible north channels
>
> Added functions to setup iio_chan_spec array depending on which hid usage reports are found
>
> Renamed magn_val to iio_val to differentiate the index being used
>
> Updated magn_3d_state struct to hold pointer array (magn_val_addr[]) which points to iio_val[]
>
> Updated magn_3d_parse_report to scan for all compass usages and create iio channels for each
>
> Signed-off-by: Reyad Attiyat <reyad.attiyat-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> drivers/iio/magnetometer/hid-sensor-magn-3d.c | 271 +++++++++++++++++---------
> 1 file changed, 177 insertions(+), 94 deletions(-)
>
> diff --git a/drivers/iio/magnetometer/hid-sensor-magn-3d.c b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
> index 6d162b7..32f4d90 100644
> --- a/drivers/iio/magnetometer/hid-sensor-magn-3d.c
> +++ b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
> @@ -34,63 +34,54 @@ enum magn_3d_channel {
> CHANNEL_SCAN_INDEX_X,
> CHANNEL_SCAN_INDEX_Y,
> CHANNEL_SCAN_INDEX_Z,
> + CHANNEL_SCAN_INDEX_NORTH_MAGN,
> + CHANNEL_SCAN_INDEX_NORTH_TRUE,
> + CHANNEL_SCAN_INDEX_NORTH_TILT_COMP,
> + CHANNEL_SCAN_INDEX_NORTH_TRUE_TILT_COMP,
> MAGN_3D_CHANNEL_MAX,
> };
>
> +#define IIO_CHANNEL_MAX MAGN_3D_CHANNEL_MAX
> +
> struct magn_3d_state {
> struct hid_sensor_hub_callbacks callbacks;
> struct hid_sensor_common common_attributes;
> struct hid_sensor_hub_attribute_info magn[MAGN_3D_CHANNEL_MAX];
> - u32 magn_val[MAGN_3D_CHANNEL_MAX];
> -};
> + u32 *magn_val_addr[MAGN_3D_CHANNEL_MAX];
>
> -static const u32 magn_3d_addresses[MAGN_3D_CHANNEL_MAX] = {
> - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS,
> - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS,
> - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS
> + u32 iio_val[IIO_CHANNEL_MAX];
> + int num_iio_channels;
> };
>
> -/* Channel definitions */
> -static const struct iio_chan_spec magn_3d_channels[] = {
> - {
> - .type = IIO_MAGN,
> - .modified = 1,
> - .channel2 = IIO_MOD_X,
> - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
> - BIT(IIO_CHAN_INFO_SCALE) |
> - BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> - BIT(IIO_CHAN_INFO_HYSTERESIS),
> - .scan_index = CHANNEL_SCAN_INDEX_X,
> - }, {
> - .type = IIO_MAGN,
> - .modified = 1,
> - .channel2 = IIO_MOD_Y,
> - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
> - BIT(IIO_CHAN_INFO_SCALE) |
> - BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> - BIT(IIO_CHAN_INFO_HYSTERESIS),
> - .scan_index = CHANNEL_SCAN_INDEX_Y,
> - }, {
> - .type = IIO_MAGN,
> - .modified = 1,
> - .channel2 = IIO_MOD_Z,
> - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET) |
> - BIT(IIO_CHAN_INFO_SCALE) |
> - BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> - BIT(IIO_CHAN_INFO_HYSTERESIS),
> - .scan_index = CHANNEL_SCAN_INDEX_Z,
May be we should have a field in const struct iio_chan_spec, so that we
can dynamically enable disable channels. In this way we can statically
define channels, but can be enabled/disabled dynamically.
> +/* Find index into magn_3d_state magn[] and magn_val_addr[] from HID Usage */
> +static int magn_3d_usage_id_to_chan_index(unsigned usage_id){
> + int offset = -1;
> +
> + switch (usage_id) {
> + case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS:
> + offset = CHANNEL_SCAN_INDEX_X;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS:
> + offset = CHANNEL_SCAN_INDEX_Y;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS:
> + offset = CHANNEL_SCAN_INDEX_Z;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH:
> + offset = CHANNEL_SCAN_INDEX_NORTH_TILT_COMP;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH:
> + offset = CHANNEL_SCAN_INDEX_NORTH_TRUE_TILT_COMP;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_MAGN_NORTH:
> + offset = CHANNEL_SCAN_INDEX_NORTH_MAGN;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_TRUE_NORTH:
> + offset = CHANNEL_SCAN_INDEX_NORTH_TRUE;
> + break;
> }
> -};
>
> -/* Adjust channel real bits based on report descriptor */
> -static void magn_3d_adjust_channel_bit_mask(struct iio_chan_spec *channels,
> - int channel, int size)
> -{
> - channels[channel].scan_type.sign = 's';
> - /* Real storage bits will change based on the report desc. */
> - channels[channel].scan_type.realbits = size * 8;
> - /* Maximum size of a sample to capture is u32 */
> - channels[channel].scan_type.storagebits = sizeof(u32) * 8;
> + return offset;
> }
>
> /* Channel read_raw handler */
> @@ -101,21 +92,31 @@ static int magn_3d_read_raw(struct iio_dev *indio_dev,
> {
> struct magn_3d_state *magn_state = iio_priv(indio_dev);
> int report_id = -1;
> - u32 address;
> + unsigned usage_id;
> + int chan_index = -1;
> int ret;
> int ret_type;
>
> + dev_dbg(&indio_dev->dev, "magn_3d_read_raw\n");
> +
> *val = 0;
> *val2 = 0;
> switch (mask) {
> case 0:
> + /* We store the HID usage ID of the iio channel
> + * in its address field
> + */
> + usage_id = chan->address;
> + chan_index = magn_3d_usage_id_to_chan_index(usage_id);
> + if(chan_index < 0)
> + return -EINVAL;
> +
> report_id =
> - magn_state->magn[chan->scan_index].report_id;
> - address = magn_3d_addresses[chan->scan_index];
> + magn_state->magn[chan_index].report_id;
> if (report_id >= 0)
> *val = sensor_hub_input_attr_get_raw_value(
> magn_state->common_attributes.hsdev,
> - HID_USAGE_SENSOR_COMPASS_3D, address,
> + HID_USAGE_SENSOR_COMPASS_3D, usage_id,
> report_id);
> else {
> *val = 0;
> @@ -202,12 +203,13 @@ static int magn_3d_proc_event(struct hid_sensor_hub_device *hsdev,
> magn_state->common_attributes.data_ready);
> if (magn_state->common_attributes.data_ready)
> hid_sensor_push_data(indio_dev,
> - magn_state->magn_val,
> - sizeof(magn_state->magn_val));
> + &(magn_state->iio_val),
> + sizeof(magn_state->iio_val));
>
> return 0;
> }
>
> +
> /* Capture samples in local storage */
> static int magn_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
> unsigned usage_id,
> @@ -217,63 +219,143 @@ static int magn_3d_capture_sample(struct hid_sensor_hub_device *hsdev,
> struct iio_dev *indio_dev = platform_get_drvdata(priv);
> struct magn_3d_state *magn_state = iio_priv(indio_dev);
> int offset;
> + u32 *magn_val;
> int ret = -EINVAL;
>
> - switch (usage_id) {
> + offset = magn_3d_usage_id_to_chan_index(usage_id);
> + if(offset < 0)
> + return ret;
> +
> + magn_val = magn_state->magn_val_addr[offset];
> + if(!magn_val)
> + return ret;
> +
> + *(magn_val) = *(u32 *)raw_data;
> +
> + return 0;
> +}
> +
> +/* Setup the iio_chan_spec for HID Usage ID */
> +static int magn_3d_setup_new_iio_chan(struct hid_sensor_hub_device *hsdev,
> + unsigned usage_id,
> + unsigned attr_usage_id,
> + struct iio_chan_spec *iio_chans,
> + struct magn_3d_state *st)
> +{
> + int ret = -1;
> + int iio_index;
> + int magn_index;
> + struct iio_chan_spec *channel;
> +
> + /* Setup magn_3d_state for new channel */
> + magn_index = magn_3d_usage_id_to_chan_index(attr_usage_id);
> + if(magn_index < 0 || magn_index >= MAGN_3D_CHANNEL_MAX){
> + return -1;
> + }
> +
> + /* Check if usage attribute exists in the sensor hub device */
> + ret = sensor_hub_input_get_attribute_info(hsdev,
> + HID_INPUT_REPORT,
> + usage_id,
> + attr_usage_id,
> + &(st->magn[magn_index]));
> + if(ret != 0){
> + /* Usage not found. Nothing to setup.*/
> + return 0;
> + }
> +
> + iio_index = st->num_iio_channels;
> + if(iio_index < 0 || iio_index >= IIO_CHANNEL_MAX){
> + return -2;
> + }
> +
> + /* Check if this usage hasn't been setup */
> + if(st->magn_val_addr[magn_index] != NULL){
> + return -3;
> + }
> + st->magn_val_addr[magn_index] = &(st->iio_val[iio_index]);
> +
> + /* Setup IIO Channel spec */
> + channel = &(iio_chans[iio_index]);
> +
> + channel->type = IIO_MAGN;
> + channel->address = attr_usage_id;
> + channel->modified = 1;
> +
> + switch (attr_usage_id){
> + case HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH:
> + channel->channel2 = IIO_MOD_NORTH_MAGN_TILT_COMP;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_COMP_TRUE_NORTH:
> + channel->channel2 = IIO_MOD_NORTH_TRUE_TILT_COMP;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_MAGN_NORTH:
> + channel->channel2 = IIO_MOD_NORTH_MAGN;
> + break;
> + case HID_USAGE_SENSOR_ORIENT_TRUE_NORTH:
> + channel->channel2 = IIO_MOD_NORTH_TRUE;
> + break;
> case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS:
> + channel->channel2 = IIO_MOD_X;
> + break;
> case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Y_AXIS:
> + channel->channel2 = IIO_MOD_Y;
> + break;
> case HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS:
> - offset = usage_id - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS;
> - magn_state->magn_val[CHANNEL_SCAN_INDEX_X + offset] =
> - *(u32 *)raw_data;
> - ret = 0;
> - break;
> - default:
> + channel->channel2 = IIO_MOD_Z;
> break;
> + default:
> + return -4;
> }
>
> + channel->info_mask_shared_by_type =
> + BIT(IIO_CHAN_INFO_OFFSET) |
> + BIT(IIO_CHAN_INFO_SCALE) |
> + BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> + BIT(IIO_CHAN_INFO_HYSTERESIS);
> +
> + channel->scan_type.sign = 's';
> + /* Real storage bits will change based on the report desc. */
> + channel->scan_type.realbits = st->magn[magn_index].size * 8;
> + /* Maximum size of a sample to capture is u32 */
> + channel->scan_type.storagebits = sizeof(u32) * 8;
> +
> + (st->num_iio_channels)++;
> + ret = 0;
> +
> return ret;
> }
>
> -/* Parse report which is specific to an usage id*/
> +/* Read the HID reports and setup IIO Channels */
> static int magn_3d_parse_report(struct platform_device *pdev,
> struct hid_sensor_hub_device *hsdev,
> - struct iio_chan_spec *channels,
> + struct iio_chan_spec *iio_chans,
> unsigned usage_id,
> struct magn_3d_state *st)
> {
> - int ret;
> + int ret = 0;
> int i;
>
> - for (i = 0; i <= CHANNEL_SCAN_INDEX_Z; ++i) {
> - ret = sensor_hub_input_get_attribute_info(hsdev,
> - HID_INPUT_REPORT,
> - usage_id,
> - HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS + i,
> - &st->magn[CHANNEL_SCAN_INDEX_X + i]);
> - if (ret < 0)
> - break;
> - magn_3d_adjust_channel_bit_mask(channels,
> - CHANNEL_SCAN_INDEX_X + i,
> - st->magn[CHANNEL_SCAN_INDEX_X + i].size);
> - }
> - dev_dbg(&pdev->dev, "magn_3d %x:%x, %x:%x, %x:%x\n",
> - st->magn[0].index,
> - st->magn[0].report_id,
> - st->magn[1].index, st->magn[1].report_id,
> - st->magn[2].index, st->magn[2].report_id);
> -
> - /* Set Sensitivity field ids, when there is no individual modifier */
> - if (st->common_attributes.sensitivity.index < 0) {
> - sensor_hub_input_get_attribute_info(hsdev,
> - HID_FEATURE_REPORT, usage_id,
> - HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
> - HID_USAGE_SENSOR_DATA_ORIENTATION,
> - &st->common_attributes.sensitivity);
> - dev_dbg(&pdev->dev, "Sensitivity index:report %d:%d\n",
> - st->common_attributes.sensitivity.index,
> - st->common_attributes.sensitivity.report_id);
> - }
> + dev_dbg(&pdev->dev, "magn_3d_parse_reports Usage ID: %x\n", usage_id);
> + for(i = HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_X_AXIS;
> + i <= HID_USAGE_SENSOR_ORIENT_MAGN_FLUX_Z_AXIS && ret == 0;
> + i++)
> + ret = magn_3d_setup_new_iio_chan(hsdev,
> + usage_id,
> + i,
> + iio_chans,
> + st);
> +
> + dev_dbg(&pdev->dev, "magn_3d_parse_reports Found %d\n magnetic axis. Returned: %d", st->num_iio_channels, ret);
> + for(i = HID_USAGE_SENSOR_ORIENT_COMP_MAGN_NORTH;
> + i <= HID_USAGE_SENSOR_ORIENT_TRUE_NORTH && ret == 0;
> + i++)
> + ret = magn_3d_setup_new_iio_chan(hsdev,
> + usage_id,
> + i,
> + iio_chans,
> + st);
> + dev_dbg(&pdev->dev, "magn_3d_parse_reports Found %d\n magnetic channels. Returned: %d", st->num_iio_channels, ret);
>
I think we need to present angle in radians. Are you basing change
present in linux-next? This will automatically do in this function.
> return ret;
> }
> @@ -307,10 +389,11 @@ static int hid_magn_3d_probe(struct platform_device *pdev)
> return ret;
> }
>
> - channels = kmemdup(magn_3d_channels, sizeof(magn_3d_channels),
> - GFP_KERNEL);
> + channels = kcalloc(MAGN_3D_CHANNEL_MAX,
> + sizeof(struct iio_chan_spec),
> + GFP_KERNEL);
I don't see kfree. Try devm_kcalloc?
> if (!channels) {
> - dev_err(&pdev->dev, "failed to duplicate channels\n");
> + dev_err(&pdev->dev, "failed to allocate memory for iio channel\n");
> return -ENOMEM;
> }
>
> @@ -322,7 +405,7 @@ static int hid_magn_3d_probe(struct platform_device *pdev)
> }
>
> indio_dev->channels = channels;
> - indio_dev->num_channels = ARRAY_SIZE(magn_3d_channels);
> + indio_dev->num_channels = magn_state->num_iio_channels;
> indio_dev->dev.parent = &pdev->dev;
> indio_dev->info = &magn_3d_info;
> indio_dev->name = name;
>
Thanks,
Srinivas
^ permalink raw reply
* [PATCH] Input - synaptics: fix resolution for manually provided min/max
From: Benjamin Tissoires @ 2014-06-03 17:59 UTC (permalink / raw)
To: Dmitry Torokhov, linux-input, linux-kernel; +Cc: Hans de Goede, Peter Hutterer
commit 421e08c41fda fixed the reported min/max for the X and Y axis,
but unfortunately, it broke the resolution of those same axis.
On the t540p, the resolution is the same regarding X and Y. It is not
a problem for xf86-input-synaptics because this driver is only interested
in the ratio between X and Y.
Unfortunately, xf86-input-cmt uses directly the resolution, and having a
null resolution leads to some divide by 0 errors, which are translated by
-infinity in the resulting coordinates.
Reported-by: Peter Hutterer <peter.hutterer@who-t.net>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Cc: stable@vger.kernel.org
---
Hi Dmitry,
in the original submission, the test for the quirk was at the end of the
synaptics_resolution() function. However, there was a mixmatch with the config
in this original submission and you had to change the patch slightly.
Unfortunately, this change created this bug which was hard to notice, which is
why it comes that late in the cycle (and also because we are trying to find out
if xf86-input-cmt could replace xf86-input-synaptics).
Anyway, as mentioned in the commit message, this will not harm a big majority
of users, because only those using ChromeOS will be impacted (not sure they
have the Lenovo 40 series in their kernel either).
Again, it's your call to leave or not the stable@ tag, but given that all we
put regarding those crappy devices are tagged as such, I put it there also.
Cheers,
Benjamin
drivers/input/mouse/synaptics.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index c5ec703..9cff1f8 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -347,15 +347,6 @@ static int synaptics_resolution(struct psmouse *psmouse)
unsigned char resp[3];
int i;
- for (i = 0; min_max_pnpid_table[i].pnp_ids; i++)
- if (matches_pnp_id(psmouse, min_max_pnpid_table[i].pnp_ids)) {
- priv->x_min = min_max_pnpid_table[i].x_min;
- priv->x_max = min_max_pnpid_table[i].x_max;
- priv->y_min = min_max_pnpid_table[i].y_min;
- priv->y_max = min_max_pnpid_table[i].y_max;
- return 0;
- }
-
if (SYN_ID_MAJOR(priv->identity) < 4)
return 0;
@@ -366,6 +357,15 @@ static int synaptics_resolution(struct psmouse *psmouse)
}
}
+ for (i = 0; min_max_pnpid_table[i].pnp_ids; i++)
+ if (matches_pnp_id(psmouse, min_max_pnpid_table[i].pnp_ids)) {
+ priv->x_min = min_max_pnpid_table[i].x_min;
+ priv->x_max = min_max_pnpid_table[i].x_max;
+ priv->y_min = min_max_pnpid_table[i].y_min;
+ priv->y_max = min_max_pnpid_table[i].y_max;
+ return 0;
+ }
+
if (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 5 &&
SYN_CAP_MAX_DIMENSIONS(priv->ext_cap_0c)) {
if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_MAX_COORDS, resp)) {
--
1.9.0
^ permalink raw reply related
* Re: [PATCH v6 4/7] Input: pixcir_i2c_ts: Use Type-B Multi-Touch protocol
From: Roger Quadros @ 2014-06-04 8:53 UTC (permalink / raw)
To: dmitry.torokhov
Cc: rydberg, balbi, dmurphy, mugunthanvnm, nsekhar, linux-input,
linux-kernel, devicetree
In-Reply-To: <5379BFCE.9050107@ti.com>
Hi Dmitry,
We're still missing patches 4, 5 and 7 for 3.16, to get device tree and type-B support.
Do you want me to send them separately?
cheers,
-roger
On 05/19/2014 11:24 AM, Roger Quadros wrote:
> From: Roger Quadros <rogerq@ti.com>
>
> Switch to using the Type-B Multi-Touch protocol.
>
> Reviewed-by: Henrik Rydberg <rydberg@euromail.se>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
> drivers/input/touchscreen/pixcir_i2c_ts.c | 125 ++++++++++++++++++++++--------
> 1 file changed, 94 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/input/touchscreen/pixcir_i2c_ts.c b/drivers/input/touchscreen/pixcir_i2c_ts.c
> index 8a7da61..627d2f5 100644
> --- a/drivers/input/touchscreen/pixcir_i2c_ts.c
> +++ b/drivers/input/touchscreen/pixcir_i2c_ts.c
> @@ -23,9 +23,12 @@
> #include <linux/slab.h>
> #include <linux/i2c.h>
> #include <linux/input.h>
> +#include <linux/input/mt.h>
> #include <linux/input/pixcir_ts.h>
> #include <linux/gpio.h>
>
> +#define PIXCIR_MAX_SLOTS 2
> +
> struct pixcir_i2c_ts_data {
> struct i2c_client *client;
> struct input_dev *input;
> @@ -33,12 +36,25 @@ struct pixcir_i2c_ts_data {
> bool running;
> };
>
> -static void pixcir_ts_poscheck(struct pixcir_i2c_ts_data *data)
> +struct pixcir_touch {
> + int x;
> + int y;
> +};
> +
> +struct pixcir_report_data {
> + int num_touches;
> + struct pixcir_touch touches[PIXCIR_MAX_SLOTS];
> +};
> +
> +static void pixcir_ts_parse(struct pixcir_i2c_ts_data *tsdata,
> + struct pixcir_report_data *report)
> {
> - struct pixcir_i2c_ts_data *tsdata = data;
> u8 rdbuf[10], wrbuf[1] = { 0 };
> + u8 *bufptr;
> u8 touch;
> - int ret;
> + int ret, i;
> +
> + memset(report, 0, sizeof(struct pixcir_report_data));
>
> ret = i2c_master_send(tsdata->client, wrbuf, sizeof(wrbuf));
> if (ret != sizeof(wrbuf)) {
> @@ -56,45 +72,85 @@ static void pixcir_ts_poscheck(struct pixcir_i2c_ts_data *data)
> return;
> }
>
> - touch = rdbuf[0];
> - if (touch) {
> - u16 posx1 = (rdbuf[3] << 8) | rdbuf[2];
> - u16 posy1 = (rdbuf[5] << 8) | rdbuf[4];
> - u16 posx2 = (rdbuf[7] << 8) | rdbuf[6];
> - u16 posy2 = (rdbuf[9] << 8) | rdbuf[8];
> -
> - input_report_key(tsdata->input, BTN_TOUCH, 1);
> - input_report_abs(tsdata->input, ABS_X, posx1);
> - input_report_abs(tsdata->input, ABS_Y, posy1);
> -
> - input_report_abs(tsdata->input, ABS_MT_POSITION_X, posx1);
> - input_report_abs(tsdata->input, ABS_MT_POSITION_Y, posy1);
> - input_mt_sync(tsdata->input);
> -
> - if (touch == 2) {
> - input_report_abs(tsdata->input,
> - ABS_MT_POSITION_X, posx2);
> - input_report_abs(tsdata->input,
> - ABS_MT_POSITION_Y, posy2);
> - input_mt_sync(tsdata->input);
> - }
> - } else {
> - input_report_key(tsdata->input, BTN_TOUCH, 0);
> + touch = rdbuf[0] & 0x7;
> + if (touch > PIXCIR_MAX_SLOTS)
> + touch = PIXCIR_MAX_SLOTS;
> +
> + report->num_touches = touch;
> + bufptr = &rdbuf[2];
> +
> + for (i = 0; i < touch; i++) {
> + report->touches[i].x = (bufptr[1] << 8) | bufptr[0];
> + report->touches[i].y = (bufptr[3] << 8) | bufptr[2];
> +
> + bufptr = bufptr + 4;
> }
> +}
> +
> +static void pixcir_ts_report(struct pixcir_i2c_ts_data *ts,
> + struct pixcir_report_data *report)
> +{
> + struct input_mt_pos pos[PIXCIR_MAX_SLOTS];
> + int slots[PIXCIR_MAX_SLOTS];
> + struct pixcir_touch *touch;
> + int n, i, slot;
> + struct device *dev = &ts->client->dev;
>
> - input_sync(tsdata->input);
> + n = report->num_touches;
> + if (n > PIXCIR_MAX_SLOTS)
> + n = PIXCIR_MAX_SLOTS;
> +
> + for (i = 0; i < n; i++) {
> + touch = &report->touches[i];
> + pos[i].x = touch->x;
> + pos[i].y = touch->y;
> + }
> +
> + input_mt_assign_slots(ts->input, slots, pos, n);
> +
> + for (i = 0; i < n; i++) {
> + touch = &report->touches[i];
> + slot = slots[i];
> +
> + input_mt_slot(ts->input, slot);
> + input_mt_report_slot_state(ts->input,
> + MT_TOOL_FINGER, true);
> +
> + input_event(ts->input, EV_ABS, ABS_MT_POSITION_X, touch->x);
> + input_event(ts->input, EV_ABS, ABS_MT_POSITION_Y, touch->y);
> +
> + dev_dbg(dev, "%d: slot %d, x %d, y %d\n",
> + i, slot, touch->x, touch->y);
> + }
> +
> + input_mt_sync_frame(ts->input);
> + input_sync(ts->input);
> }
>
> static irqreturn_t pixcir_ts_isr(int irq, void *dev_id)
> {
> struct pixcir_i2c_ts_data *tsdata = dev_id;
> const struct pixcir_ts_platform_data *pdata = tsdata->chip;
> + struct pixcir_report_data report;
>
> while (tsdata->running) {
> - pixcir_ts_poscheck(tsdata);
> -
> - if (gpio_get_value(pdata->gpio_attb))
> + /* parse packet */
> + pixcir_ts_parse(tsdata, &report);
> +
> + /* report it */
> + pixcir_ts_report(tsdata, &report);
> +
> + if (gpio_get_value(pdata->gpio_attb)) {
> + if (report.num_touches) {
> + /*
> + * Last report with no finger up?
> + * Do it now then.
> + */
> + input_mt_sync_frame(tsdata->input);
> + input_sync(tsdata->input);
> + }
> break;
> + }
>
> msleep(20);
> }
> @@ -333,6 +389,13 @@ static int pixcir_i2c_ts_probe(struct i2c_client *client,
> input_set_abs_params(input, ABS_MT_POSITION_X, 0, pdata->x_max, 0, 0);
> input_set_abs_params(input, ABS_MT_POSITION_Y, 0, pdata->y_max, 0, 0);
>
> + error = input_mt_init_slots(input, PIXCIR_MAX_SLOTS,
> + INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED);
> + if (error) {
> + dev_err(dev, "Error initializing Multi-Touch slots\n");
> + return error;
> + }
> +
> input_set_drvdata(input, tsdata);
>
> error = devm_gpio_request_one(dev, pdata->gpio_attb,
>
^ permalink raw reply
* Re: [PATCHv2 3/3] IIO: hid-sensor-magn-3d: Add in support for True/Magnetic North HID usages
From: Reyad Attiyat @ 2014-06-04 15:23 UTC (permalink / raw)
To: Srinivas Pandruvada
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA, Jonathan Cameron, linux-input,
Jiri Kosina
In-Reply-To: <538E092F.9040004-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Hey Srinivas,
On Tue, Jun 3, 2014 at 12:43 PM, Srinivas Pandruvada
<srinivas.pandruvada-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote:
>
> May be we should have a field in const struct iio_chan_spec, so that we
> can dynamically enable disable channels. In this way we can statically
> define channels, but can be enabled/disabled dynamically.
>
Would this require changing iio subsystem to create sysfs entries only
when enabled? Would we need to add functions to disable and enable
later on?
>
> I think we need to present angle in radians. Are you basing change present
> in linux-next? This will automatically do in this function.
>
I'll look into this. What function should I use to make the iio chanel
to report radians?
>
>
> I don't see kfree. Try devm_kcalloc?
>
I changed kmemdup to kcalloc so there is still a kfree in the exsiting
code. I can change this to devm_kcalloc but only if we don't go with
static channels that are enabled as found.
Thanks,
Reyad Attiyat
^ permalink raw reply
* Re: [PATCHv2 3/3] IIO: hid-sensor-magn-3d: Add in support for True/Magnetic North HID usages
From: Srinivas Pandruvada @ 2014-06-04 15:42 UTC (permalink / raw)
To: Reyad Attiyat
Cc: linux-kernel, linux-iio, Jonathan Cameron, linux-input,
Jiri Kosina
In-Reply-To: <CA+BWVUTxnS_C+EXm1SuShywk998+E5KfTdtTrS6_a0+k+4U4ig@mail.gmail.com>
On 06/04/2014 08:23 AM, Reyad Attiyat wrote:
> Hey Srinivas,
>
> On Tue, Jun 3, 2014 at 12:43 PM, Srinivas Pandruvada
> <srinivas.pandruvada@linux.intel.com> wrote:
>
>>
>> May be we should have a field in const struct iio_chan_spec, so that we
>> can dynamically enable disable channels. In this way we can statically
>> define channels, but can be enabled/disabled dynamically.
>>
> Would this require changing iio subsystem to create sysfs entries only
> when enabled? Would we need to add functions to disable and enable
> later on?
This is just a thought. You don't have to change it. I am sure Jonathan
will have some opinion this.
>>
>> I think we need to present angle in radians. Are you basing change present
>> in linux-next? This will automatically do in this function.
>>
> I'll look into this. What function should I use to make the iio chanel
> to report radians?
I think it will work if the existing sequence is maintained
st->scale_precision = hid_sensor_format_scale(
HID_USAGE_SENSOR_COMPASS_3D,
&st->magn[CHANNEL_SCAN_INDEX_X],
&st->scale_pre_decml,
&st->scale_post_decml);
So as long as you call this function, the scale value to user space will
be returned correctly.
>>
>>
>> I don't see kfree. Try devm_kcalloc?
>>
> I changed kmemdup to kcalloc so there is still a kfree in the exsiting
> code. I can change this to devm_kcalloc but only if we don't go with
> static channels that are enabled as found.
>
Since you are changing this part, devm_ calls are preferred, I think.
Thanks,
Srinivas
> Thanks,
> Reyad Attiyat
>
^ permalink raw reply
* Re: [PATCH] Input: wacom - cleanup multitouch code when touch_max is 2
From: Jason Gerecke @ 2014-06-04 21:44 UTC (permalink / raw)
To: Ping Cheng; +Cc: Linux Input, Dmitry Torokhov, Ping Cheng
In-Reply-To: <1401393791-15614-1-git-send-email-pingc@wacom.com>
On Thu, May 29, 2014 at 1:03 PM, Ping Cheng <pinglinux@gmail.com> wrote:
> Historically we dealt with touch_max equals to 2 differently from
> other MT devices. Now we use input_mt_*() to process all MT events,
> as long as touch_max is greater than 1. So, there is no need to
> take (touch_max == 2) as a special case any more.
>
> Signed-off-by: Ping Cheng <pingc@wacom.com>
> ---
> drivers/input/tablet/wacom_wac.c | 26 ++++++--------------------
> 1 file changed, 6 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
> index 977d05c..964db47 100644
> --- a/drivers/input/tablet/wacom_wac.c
> +++ b/drivers/input/tablet/wacom_wac.c
> @@ -1217,8 +1217,8 @@ static void wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data)
> * a=(pi*r^2)/C.
> */
> int a = data[5];
> - int x_res = input_abs_get_res(input, ABS_X);
> - int y_res = input_abs_get_res(input, ABS_Y);
> + int x_res = input_abs_get_res(input, ABS_MT_POSITION_X);
> + int y_res = input_abs_get_res(input, ABS_MT_POSITION_Y);
> width = 2 * int_sqrt(a * WACOM_CONTACT_AREA_SCALE);
> height = width * y_res / x_res;
> }
> @@ -1587,7 +1587,7 @@ static void wacom_abs_set_axis(struct input_dev *input_dev,
> input_abs_set_res(input_dev, ABS_X, features->x_resolution);
> input_abs_set_res(input_dev, ABS_Y, features->y_resolution);
> } else {
> - if (features->touch_max <= 2) {
> + if (features->touch_max == 1) {
> input_set_abs_params(input_dev, ABS_X, 0,
> features->x_max, features->x_fuzz, 0);
> input_set_abs_params(input_dev, ABS_Y, 0,
> @@ -1815,14 +1815,8 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev,
> case MTTPC:
> case MTTPC_B:
> case TABLETPC2FG:
> - if (features->device_type == BTN_TOOL_FINGER) {
> - unsigned int flags = INPUT_MT_DIRECT;
> -
> - if (wacom_wac->features.type == TABLETPC2FG)
> - flags = 0;
> -
> - input_mt_init_slots(input_dev, features->touch_max, flags);
> - }
> + if ((features->device_type == BTN_TOOL_FINGER) && features->touch_max > 1)
> + input_mt_init_slots(input_dev, features->touch_max, INPUT_MT_DIRECT);
> /* fall through */
>
> case TABLETPC:
> @@ -1883,10 +1877,6 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev,
> __set_bit(BTN_RIGHT, input_dev->keybit);
>
> if (features->touch_max) {
> - /* touch interface */
> - unsigned int flags = INPUT_MT_POINTER;
> -
> - __set_bit(INPUT_PROP_POINTER, input_dev->propbit);
> if (features->pktlen == WACOM_PKGLEN_BBTOUCH3) {
> input_set_abs_params(input_dev,
> ABS_MT_TOUCH_MAJOR,
> @@ -1894,12 +1884,8 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev,
> input_set_abs_params(input_dev,
> ABS_MT_TOUCH_MINOR,
> 0, features->y_max, 0, 0);
> - } else {
> - __set_bit(BTN_TOOL_FINGER, input_dev->keybit);
> - __set_bit(BTN_TOOL_DOUBLETAP, input_dev->keybit);
> - flags = 0;
> }
> - input_mt_init_slots(input_dev, features->touch_max, flags);
> + input_mt_init_slots(input_dev, features->touch_max, INPUT_MT_POINTER);
I think you want to use 'input_mt_init_slots(input_dev,
features->touch_max + 1, INPUT_MT_POINTER)' instead. This is one more
slot than necessary, but the number of slots is used in deciding which
of the BTN_TOOL_*TAP buttons the kernel will advertise. Our protocol
has the driver sending one more TAP than expected to differentiate
touch and pad (e.g. single-touch device needs DOUBLETAP and two-finger
touch needs TRIPLETAP). Adding one to the number of slots ensures a
high enough TAP is advertised.
Aside from that... Reviewed-by: Jason Gerecke <killertofu@gmail.com>
Jason
---
Now instead of four in the eights place /
you’ve got three, ‘Cause you added one /
(That is to say, eight) to the two, /
But you can’t take seven from three, /
So you look at the sixty-fours....
> } else {
> /* buttons/keys only interface */
> __clear_bit(ABS_X, input_dev->absbit);
> --
> 1.9.1
>
> --
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^ permalink raw reply
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