* Re: [PATCH] Input: psmouse - fix use-after-free bugs due to rescheduled delayed works
From: duoming @ 2025-11-08 6:22 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: linux-input, linux-kernel, kuba, alexander.deucher, pali,
hverkuil+cisco, akpm, andriy.shevchenko, tglx, mingo,
Jonathan.Cameron
In-Reply-To: <jbkzqczxnnf5el6xxyumeyoact7iw3js6reoand3clrpjyyblf@fhxvbg7fu6n5>
On Fri, 7 Nov 2025 21:43:37 -0800, Dmitry Torokhov wrote:
> > The flush_workqueue() in psmouse_disconnect() only blocks and waits for
> > work items that were already queued to the workqueue prior to its
> > invocation. Any work items submitted after flush_workqueue() is called
> > are not included in the set of tasks that the flush operation awaits.
> > This means that after flush_workqueue() has finished executing, the
> > resync_work and dev3_register_work could be rescheduled again, resulting
> > in the following two use-after-free scenarios:
> >
> > 1. The psmouse structure is deallocated in psmouse_disconnect(), while
> > resync_work remains active and attempts to dereference the already
> > freed psmouse in psmouse_resync().
> >
> > CPU 0 | CPU 1
> > psmouse_disconnect() | psmouse_receive_byte()
> > | if(psmouse->state == ...)
> > psmouse_set_state() |
> > flush_workqueue() |
> > | psmouse_queue_work() //reschedule
> > kfree(psmouse); //FREE|
> > | psmouse_resync()
> > | psmouse = container_of(); //USE
> > | psmouse-> //USE
>
> Before flushing the workqueue we set psmouse state to PSMOUSE_CMD_MODE,
> but psmouse_queue_work() is only called from psmouse_receive_byte() if
> the mouse is PSMOUSE_ACTIVE. Therefore there is no chance that work will
> be scheduled while psmouse instance is being freed.
I believe a potential race condition still exists between
psmouse_receive_byte() and psmouse_disconnect(). Specifically,
if the condition check 'if (psmouse->state == PSMOUSE_ACTIVATED)'
has already been passed, and then we set the psmouse state to
PSMOUSE_CMD_MODE and flush the workqueue, it is still possible
for psmouse_queue_work() to be scheduled after flush_workqueue().
Here is the problematic sequence:
CPU 0 | CPU 1
psmouse_disconnect() | psmouse_receive_byte()
| if(psmouse->state == PSMOUSE_ACTIVATED && ...)
psmouse_set_state() |
flush_workqueue() |
| psmouse_queue_work()
kfree(psmouse); //FREE|
| psmouse_resync()
| psmouse = container_of(); //USE
| psmouse-> //USE
> For ALPS, the work is a "single shot", so will not get rescheduled.
I agree with you, the 'rescheduled' is not accurate. But the race condition
is still possible. The dev3_register_work is initialized through alps_reconnect()
and scheduled when receiving the first bare PS/2 packet from an external
device connected to the ALPS touchpad's PS/2 port. When the device
is disconnecting, the original code does not cancel the dev3_register_work.
This leads to a use-after-free scenario where the alps_data is
freed in alps_disconnect(), but the dev3_register_work remains active
and may attempt to access the freed alps_data in alps_register_bare_ps2_mouse().
A typical race condition is illustrated below:
CPU 0 (cleanup) | CPU 1 (delayed work)
alps_disconnect() |
kfree(priv); |
| alps_register_bare_ps2_mouse()
| priv = container_of(...); //USE
| // access priv->... (USE)
Fix this by ensuring that the delayed work is canceled in alps_disconnect()
using disable_delayed_work_sync().
> However I think that the changes are improvement to the code. Please
> split in 2 (for psmouse-base and alps separately) and drop mentions of
> UAF in psmouse but rather mention that disable_delayed_work_sync() is
> more robust and efficient. I think if we switch to it we should be able
> to get rid of kpsmoused workqueue and use default system workqueue.
Thank you for your suggestions, I will split this into two patches:
one to fix the issue in psmouse-base, and another for the ALPS.
Best regards,
Duoming Zhou
^ permalink raw reply
* Re: [PATCH] Input: psmouse - fix use-after-free bugs due to rescheduled delayed works
From: Dmitry Torokhov @ 2025-11-08 5:43 UTC (permalink / raw)
To: Duoming Zhou
Cc: linux-input, linux-kernel, kuba, alexander.deucher, pali,
hverkuil+cisco, akpm, andriy.shevchenko, tglx, mingo,
Jonathan.Cameron
In-Reply-To: <20251108045609.26338-1-duoming@zju.edu.cn>
Hi Duoming,
On Sat, Nov 08, 2025 at 12:56:09PM +0800, Duoming Zhou wrote:
> The flush_workqueue() in psmouse_disconnect() only blocks and waits for
> work items that were already queued to the workqueue prior to its
> invocation. Any work items submitted after flush_workqueue() is called
> are not included in the set of tasks that the flush operation awaits.
> This means that after flush_workqueue() has finished executing, the
> resync_work and dev3_register_work could be rescheduled again, resulting
> in the following two use-after-free scenarios:
>
> 1. The psmouse structure is deallocated in psmouse_disconnect(), while
> resync_work remains active and attempts to dereference the already
> freed psmouse in psmouse_resync().
>
> CPU 0 | CPU 1
> psmouse_disconnect() | psmouse_receive_byte()
> | if(psmouse->state == ...)
> psmouse_set_state() |
> flush_workqueue() |
> | psmouse_queue_work() //reschedule
> kfree(psmouse); //FREE|
> | psmouse_resync()
> | psmouse = container_of(); //USE
> | psmouse-> //USE
Before flushing the workqueue we set psmouse state to PSMOUSE_CMD_MODE,
but psmouse_queue_work() is only called from psmouse_receive_byte() if
the mouse is PSMOUSE_ACTIVE. Therefore there is no chance that work will
be scheduled while psmouse instance is being freed.
For ALPS, the work is a "single shot", so will not get rescheduled.
However I think that the changes are improvement to the code. Please
split in 2 (for psmouse-base and alps separately) and drop mentions of
UAF in psmouse but rather mention that disable_delayed_work_sync() is
more robust and efficient. I think if we switch to it we should be able
to get rid of kpsmoused workqueue and use default system workqueue.
Thanks.
--
Dmitry
^ permalink raw reply
* [PATCH] Input: psmouse - fix use-after-free bugs due to rescheduled delayed works
From: Duoming Zhou @ 2025-11-08 4:56 UTC (permalink / raw)
To: linux-input
Cc: linux-kernel, dmitry.torokhov, kuba, alexander.deucher, pali,
hverkuil+cisco, akpm, andriy.shevchenko, tglx, mingo,
Jonathan.Cameron, Duoming Zhou
The flush_workqueue() in psmouse_disconnect() only blocks and waits for
work items that were already queued to the workqueue prior to its
invocation. Any work items submitted after flush_workqueue() is called
are not included in the set of tasks that the flush operation awaits.
This means that after flush_workqueue() has finished executing, the
resync_work and dev3_register_work could be rescheduled again, resulting
in the following two use-after-free scenarios:
1. The psmouse structure is deallocated in psmouse_disconnect(), while
resync_work remains active and attempts to dereference the already
freed psmouse in psmouse_resync().
CPU 0 | CPU 1
psmouse_disconnect() | psmouse_receive_byte()
| if(psmouse->state == ...)
psmouse_set_state() |
flush_workqueue() |
| psmouse_queue_work() //reschedule
kfree(psmouse); //FREE|
| psmouse_resync()
| psmouse = container_of(); //USE
| psmouse-> //USE
2. The alps_data structure is deallocated in alps_disconnect(), while
dev3_register_work remains active and attempts to dereference the
already freed alps_data inside alps_register_bare_ps2_mouse().
CPU 0 | CPU 1
psmouse_disconnect() | alps_process_byte()
flush_workqueue() | alps_report_bare_ps2_packet()
| psmouse_queue_work() //reschedule
alps_disconnect() |
| alps_register_bare_ps2_mouse()
kfree(priv); //FREE |
| priv = container_of(); //USE
| priv-> //USE
Replace flush_workqueue() with disable_delayed_work_sync(), and also
add disable_delayed_work_sync() in alps_disconnect(). This ensures
that both resync_work and dev3_register_work are properly canceled
and prevented from being rescheduled before the psmouse and alps_data
structures are deallocated.
These bugs are identified by static analysis.
Fixes: f0d5c6f419d3 ("Input: psmouse - attempt to re-synchronize mouse every 5 seconds")
Fixes: 04aae283ba6a ("Input: ALPS - do not mix trackstick and external PS/2 mouse data")
Signed-off-by: Duoming Zhou <duoming@zju.edu.cn>
---
drivers/input/mouse/alps.c | 1 +
drivers/input/mouse/psmouse-base.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index d0cb9fb9482..df8953a5196 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -2975,6 +2975,7 @@ static void alps_disconnect(struct psmouse *psmouse)
psmouse_reset(psmouse);
timer_shutdown_sync(&priv->timer);
+ disable_delayed_work_sync(&priv->dev3_register_work);
if (priv->dev2)
input_unregister_device(priv->dev2);
if (!IS_ERR_OR_NULL(priv->dev3))
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index 77ea7da3b1c..eb41c553e80 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -1484,7 +1484,7 @@ static void psmouse_disconnect(struct serio *serio)
/* make sure we don't have a resync in progress */
mutex_unlock(&psmouse_mutex);
- flush_workqueue(kpsmoused_wq);
+ disable_delayed_work_sync(&psmouse->resync_work);
mutex_lock(&psmouse_mutex);
if (serio->parent && serio->id.type == SERIO_PS_PSTHRU) {
--
2.34.1
^ permalink raw reply related
* Re: [BUG] Edifier QR30 (2d99:a101, Jieli Technology) reboots itself when RGB brightness button is used under Linux
From: Terry Junge @ 2025-11-08 4:41 UTC (permalink / raw)
To: The-Luga; +Cc: linux-sound, linux-usb, linux-input
In-Reply-To: <CALvgqEAq8ZWgG4Dyg_oL7_+nUDy+LUoTXi+-6aceO-AKtBS3Mg@mail.gmail.com>
Hi The-Luga,
I have added linux-input list to CC: as whatever is causing the device
to reset is most likely in the HID domain not the sound domain.
The device has two HID interfaces. It would be helpful if you could get
the report descriptors for both of them.
You can find them by executing
find /sys/devices -name "report_descriptor"
You should see two that have 0003:2D99:A101: in the path to the files.
They are binary files so you can just attach them to the email or you
could use xxd or similar to convert them to HEX text files first.
Please see my comments below.
Thanks,
Terry
On 10/17/2025 9:22 AM, The-Luga wrote:
> Device: Edifier QR30 USB Speakers
> Vendor: Jieli Technology
> USB ID: 2d99:a101
> Firmware label in descriptors: "EDIFIER Hal0 2.0 SE"
> Kernel tested: 6.12.53-1-lts and 6.17.2-arch1-1
> Distribution: Arch Linux
> DE: Gnome 49
>
>
> Problem:
> When connected via USB on Linux, rotating the built-in RGB brightness
> button on the speaker causes an immediate USB disconnect/reconnect
> (firmware reboot).
> This does NOT occur under Windows.
>
> Steps to reproduce:
> 1. Connect Edifier QR30 via USB.
> 2. Confirm working playback.
> 3. Rotate the RGB brightness button on the side of the speaker.
> 4. Observe immediate reboot/disconnect.
>
>
> ```
>> lsusb -t
>
> /: Bus 003.Port 001: Dev 001, Class=root_hub, Driver=xhci_hcd/4p, 480M
> |__ Port 002: Dev 002, If 0, Class=Audio, Driver=snd-usb-audio, 12M
> |__ Port 002: Dev 002, If 1, Class=Audio, Driver=snd-usb-audio, 12M
> |__ Port 002: Dev 002, If 2, Class=Human Interface Device,
> Driver=usbhid, 12M
> |__ Port 002: Dev 002, If 3, Class=Human Interface Device,
> Driver=usbhid, 12M
>
> ```
>
> I tried unbinding every HID device :
>
> ```
>> echo -n '3-2:1.2' | sudo tee /sys/bus/usb/drivers/usbhid/unbind
> 3-2:1.2%
>> echo -n '3-2:1.3' | sudo tee /sys/bus/usb/drivers/usbhid/unbind
> 3-2:1.3%
>
> ```
>
> When using the brightness button, reboots of the speaker still occurs.
>
> I also tried unbinding the audio itself:
>
> ```
>> echo -n '3-2:1.0' | sudo tee /sys/bus/usb/drivers/snd-usb-audio/unbind
> 3-2:1.0%
>> echo -n '3-2:1.1' | sudo tee /sys/bus/usb/drivers/snd-usb-audio/unbind
> 3-2:1.1%
> ```
>
> The reboots continues to happen.
>
> Here's the output of dmesg when the reboot of the speaker occurs:
>
> ```
>> sudo dmesg -w
>
> [ 994.674827] usb 3-2: USB disconnect, device number 7
> [ 996.031031] usb 3-2: new full-speed USB device number 8 using xhci_hcd
> [ 996.865709] usb 3-2: device descriptor read/64, error -71
> [ 997.106087] usb 3-2: New USB device found, idVendor=2d99,
> idProduct=a101, bcdDevice= 1.00
> [ 997.106094] usb 3-2: New USB device strings: Mfr=1, Product=2, SerialNumber=3
> [ 997.106097] usb 3-2: Product: EDIFIER Hal0 2.0 SE
> [ 997.106099] usb 3-2: Manufacturer: Jieli Technology
> [ 997.106102] usb 3-2: SerialNumber: 4250315A34383502
> [ 997.180035] input: Jieli Technology EDIFIER Hal0 2.0 SE as
> /devices/pci0000:00/0000:00:08.1/0000:06:00.4/usb3/3-2/3-2:1.2/0003:2D99:A101.0014/input/input51
> [ 997.230824] hid-generic 0003:2D99:A101.0014: input,hidraw0: USB HID
> v1.00 Device [Jieli Technology EDIFIER Hal0 2.0 SE] on
> usb-0000:06:00.4-2/input2
> [ 997.237434] hid-generic 0003:2D99:A101.0015: hiddev96,hidraw1: USB
> HID v2.01 Device [Jieli Technology EDIFIER Hal0 2.0 SE] on
> usb-0000:06:00.4-2/input3
> ```
>
> Information of the USB device:
>
> ```
>> sudo lsusb -v -d 2d99:a101
>
> Bus 003 Device 002: ID 2d99:a101 Jieli Technology EDIFIER Hal0 2.0 SE
> Negotiated speed: Full Speed (12Mbps)
> Device Descriptor:
> bLength 18
> bDescriptorType 1
> bcdUSB 1.10
bcdUSB should be 2.00 or higher to support Interface Association
but the kernel doesn't care...
> bDeviceClass 239 Miscellaneous Device
> bDeviceSubClass 2 [unknown]
> bDeviceProtocol 1 Interface Association
> bMaxPacketSize0 64
> idVendor 0x2d99 Jieli Technology
> idProduct 0xa101 EDIFIER Hal0 2.0 SE
> bcdDevice 1.00
> iManufacturer 1 Jieli Technology
> iProduct 2 EDIFIER Hal0 2.0 SE
> iSerial 3 4250315A34383502
> bNumConfigurations 1
> Configuration Descriptor:
> bLength 9
> bDescriptorType 2
> wTotalLength 0x00b6
> bNumInterfaces 4
> bConfigurationValue 1
> iConfiguration 0
> bmAttributes 0x80
> (Bus Powered)
> MaxPower 100mA
> Interface Association:
> bLength 8
> bDescriptorType 11
> bFirstInterface 0
> bInterfaceCount 2
> bFunctionClass 1 Audio
> bFunctionSubClass 2 Streaming
> bFunctionProtocol 0
> iFunction 5 EDIFIER QR30
> Interface Descriptor:
> bLength 9
> bDescriptorType 4
> bInterfaceNumber 0
> bAlternateSetting 0
> bNumEndpoints 0
> bInterfaceClass 1 Audio
> bInterfaceSubClass 1 Control Device
> bInterfaceProtocol 0
> iInterface 5 EDIFIER QR30
> AudioControl Interface Descriptor:
> bLength 9
> bDescriptorType 36
> bDescriptorSubtype 1 (HEADER)
> bcdADC 1.00
> wTotalLength 0x002f
> bInCollection 1
> baInterfaceNr(0) 1
> AudioControl Interface Descriptor:
> bLength 12
> bDescriptorType 36
> bDescriptorSubtype 2 (INPUT_TERMINAL)
> bTerminalID 1
> wTerminalType 0x0101 USB Streaming
> bAssocTerminal 0
> bNrChannels 2
> wChannelConfig 0x0003
> Left Front (L)
> Right Front (R)
> iChannelNames 0
> iTerminal 0
> AudioControl Interface Descriptor:
> bLength 10
> bDescriptorType 36
> bDescriptorSubtype 6 (FEATURE_UNIT)
> bUnitID 2
> bSourceID 1
> bControlSize 1
> bmaControls(0) 0x03
> Mute Control
> Volume Control
> bmaControls(1) 0x00
> bmaControls(2) 0x00
> iFeature 0
> AudioControl Interface Descriptor:
> bLength 7
> bDescriptorType 36
> bDescriptorSubtype 5 (SELECTOR_UNIT)
> bUnitID 8
> bNrInPins 1
> baSourceID(0) 2
> iSelector 0
> AudioControl Interface Descriptor:
> bLength 9
> bDescriptorType 36
> bDescriptorSubtype 3 (OUTPUT_TERMINAL)
> bTerminalID 3
> wTerminalType 0x0301 Speaker
> bAssocTerminal 0
> bSourceID 2
> iTerminal 0
> Interface Descriptor:
> bLength 9
> bDescriptorType 4
> bInterfaceNumber 1
> bAlternateSetting 0
> bNumEndpoints 0
> bInterfaceClass 1 Audio
> bInterfaceSubClass 2 Streaming
> bInterfaceProtocol 0
> iInterface 0
> Interface Descriptor:
> bLength 9
> bDescriptorType 4
> bInterfaceNumber 1
> bAlternateSetting 1
> bNumEndpoints 1
> bInterfaceClass 1 Audio
> bInterfaceSubClass 2 Streaming
> bInterfaceProtocol 0
> iInterface 0
> AudioStreaming Interface Descriptor:
> bLength 7
> bDescriptorType 36
> bDescriptorSubtype 1 (AS_GENERAL)
> bTerminalLink 1
> bDelay 1 frames
> wFormatTag 0x0001 PCM
> AudioStreaming Interface Descriptor:
> bLength 11
> bDescriptorType 36
> bDescriptorSubtype 2 (FORMAT_TYPE)
> bFormatType 1 (FORMAT_TYPE_I)
> bNrChannels 2
> bSubframeSize 3
> bBitResolution 24
> bSamFreqType 1 Discrete
> tSamFreq[ 0] 48000
> Endpoint Descriptor:
> bLength 9
> bDescriptorType 5
> bEndpointAddress 0x03 EP 3 OUT
> bmAttributes 9
> Transfer Type Isochronous
> Synch Type Adaptive
> Usage Type Data
> wMaxPacketSize 0x0120 1x 288 bytes
> bInterval 1
> bRefresh 0
> bSynchAddress 0
> AudioStreaming Endpoint Descriptor:
> bLength 7
> bDescriptorType 37
> bDescriptorSubtype 1 (EP_GENERAL)
> bmAttributes 0x00
> bLockDelayUnits 0 Undefined
> wLockDelay 0x0000
> Interface Descriptor:
> bLength 9
> bDescriptorType 4
> bInterfaceNumber 2
> bAlternateSetting 0
> bNumEndpoints 1
> bInterfaceClass 3 Human Interface Device
> bInterfaceSubClass 0 [unknown]
> bInterfaceProtocol 0
> iInterface 0
> HID Device Descriptor:
> bLength 9
> bDescriptorType 33
> bcdHID 1.00
HID version has been 1.11 for more than 20 years
should be 1.11 but the kernel doesn't care...
> bCountryCode 0 Not supported
> bNumDescriptors 1
> bDescriptorType 34 (null)
> wDescriptorLength 33
> Report Descriptors:
> ** UNAVAILABLE **
> Endpoint Descriptor:
> bLength 7
> bDescriptorType 5
> bEndpointAddress 0x82 EP 2 IN
> bmAttributes 3
> Transfer Type Interrupt
> Synch Type None
> Usage Type Data
> wMaxPacketSize 0x0010 1x 16 bytes
> bInterval 1
> Interface Descriptor:
> bLength 9
> bDescriptorType 4
> bInterfaceNumber 3
> bAlternateSetting 0
> bNumEndpoints 2
> bInterfaceClass 3 Human Interface Device
> bInterfaceSubClass 0 [unknown]
> bInterfaceProtocol 0
> iInterface 0
> HID Device Descriptor:
> bLength 9
> bDescriptorType 33
> bcdHID 2.01
There is no HID version 2.01 yet, latest is 1.11
should be 1.11 but the kernel doesn't care...
> bCountryCode 0 Not supported
> bNumDescriptors 1
> bDescriptorType 34 (null)
> wDescriptorLength 66
> Report Descriptors:
> ** UNAVAILABLE **
> Endpoint Descriptor:
> bLength 7
> bDescriptorType 5
> bEndpointAddress 0x84 EP 4 IN
> bmAttributes 3
> Transfer Type Interrupt
> Synch Type None
> Usage Type Data
> wMaxPacketSize 0x0040 1x 64 bytes
> bInterval 1
> Endpoint Descriptor:
> bLength 7
> bDescriptorType 5
> bEndpointAddress 0x04 EP 4 OUT
> bmAttributes 3
> Transfer Type Interrupt
> Synch Type None
> Usage Type Data
> wMaxPacketSize 0x0040 1x 64 bytes
> bInterval 1
> Device Status: 0x0000
> (Bus Powered)
> ```
>
> Here's the log of bus 3 when rebooting:
>
> ```
>> sudo modprobe usbmon
>> sudo cat /sys/kernel/debug/usb/usbmon/3u > qr30.log
>
> ffff8e9c81b28fc0 1394065014 C Ii:3:001:1 0:2048 1 = 04
> ffff8e9c81b28fc0 1394065023 S Ii:3:001:1 -115:2048 4 <
> ffff8e9c88c2a300 1394065033 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2a300 1394065038 C Ci:3:001:0 0 4 = 00010100
> ffff8e9c88c2a300 1394065041 S Co:3:001:0 s 23 01 0010 0002 0000 0
> ffff8e9c88c2a300 1394065046 C Co:3:001:0 0 0
> ffff8e9c88c2bd40 1394065457 C Ii:3:009:2 -108:1 0
Device is already gone "Cannot send after transport endpoint shutdown"
Whatever the trigger was occurred earlier in the trace.
If possible, can you get a trace that includes the trigger event?
> ffff8e9c88c2b980 1394103576 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1394103627 C Ci:3:001:0 0 4 = 00010000
> ffff8e9c88c2b980 1394129013 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1394129024 C Ci:3:001:0 0 4 = 00010000
> ffff8e9c88c2b980 1394155010 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1394155017 C Ci:3:001:0 0 4 = 00010000
> ffff8e9c88c2b980 1394181022 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1394181031 C Ci:3:001:0 0 4 = 00010000
> ffff8e9c88c2b980 1394207292 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1394207317 C Ci:3:001:0 0 4 = 00010000
> ffff8e9c81b28fc0 1395205229 C Ii:3:001:1 0:2048 1 = 04
> ffff8e9c81b28fc0 1395205252 S Ii:3:001:1 -115:2048 4 <
> ffff8e9c88c2b980 1395205278 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395205293 C Ci:3:001:0 0 4 = 01010100
> ffff8e9c88c2b980 1395205300 S Co:3:001:0 s 23 01 0010 0002 0000 0
> ffff8e9c88c2b980 1395205306 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1395205310 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395205314 C Ci:3:001:0 0 4 = 01010000
> ffff8e9c88c2b980 1395231031 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395231049 C Ci:3:001:0 0 4 = 01010000
> ffff8e9c88c2b980 1395257305 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395257334 C Ci:3:001:0 0 4 = 01010000
> ffff8e9c88c2b980 1395283283 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395283311 C Ci:3:001:0 0 4 = 01010000
> ffff8e9c88c2b980 1395309287 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395309317 C Ci:3:001:0 0 4 = 01010000
> ffff8e9c88c2b980 1395309418 S Co:3:001:0 s 23 03 0004 0002 0000 0
> ffff8e9c88c2b980 1395309426 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1395370721 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395370746 C Ci:3:001:0 0 4 = 03011000
> ffff8e9c88c2b980 1395370756 S Co:3:001:0 s 23 01 0014 0002 0000 0
> ffff8e9c88c2b980 1395370762 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1395421446 S Ci:3:000:0 s 80 06 0100 0000 0040 64 <
Attempting to enumerate the device after it has restarted
> ffff8e9c81b28fc0 1395454957 C Ii:3:001:1 0:2048 1 = 04
> ffff8e9c81b28fc0 1395454979 S Ii:3:001:1 -115:2048 4 <
> ffff8e9c88c2b980 1395456684 C Ci:3:000:0 -71 0
> ffff8e9c88c2b980 1395456717 S Ci:3:000:0 s 80 06 0100 0000 0040 64 <
> ffff8e9c88c2b980 1395459710 C Ci:3:000:0 -71 0
> ffff8e9c88c2b980 1395459745 S Ci:3:000:0 s 80 06 0100 0000 0040 64 <
> ffff8e9c88c2b980 1395461696 C Ci:3:000:0 -71 0
> ffff8e9c88c2b980 1395461730 S Co:3:001:0 s 23 03 0004 0002 0000 0
> ffff8e9c88c2b980 1395461742 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1395522293 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395522315 C Ci:3:001:0 0 4 = 00011100
> ffff8e9c81b28fc0 1395567319 C Ii:3:001:1 0:2048 1 = 04
> ffff8e9c81b28fc0 1395567346 S Ii:3:001:1 -115:2048 4 <
> ffff8e9c88c2b980 1395583053 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395583070 C Ci:3:001:0 0 4 = 00011100
> ffff8e9c88c2b980 1395791311 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395791332 C Ci:3:001:0 0 4 = 00011100
> ffff8e9c81b28fc0 1395823253 C Ii:3:001:1 0:2048 1 = 04
> ffff8e9c81b28fc0 1395823276 S Ii:3:001:1 -115:2048 4 <
> ffff8e9c88c2b980 1395999298 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1395999325 C Ci:3:001:0 0 4 = 01011100
> ffff8e9c88c2b980 1395999334 S Co:3:001:0 s 23 01 0010 0002 0000 0
> ffff8e9c88c2b980 1395999339 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1395999342 S Co:3:001:0 s 23 03 0004 0002 0000 0
> ffff8e9c88c2b980 1395999347 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1396207024 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1396207040 C Ci:3:001:0 0 4 = 03011000
> ffff8e9c88c2b980 1396207045 S Co:3:001:0 s 23 01 0014 0002 0000 0
> ffff8e9c88c2b980 1396207049 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1396359012 S Ci:3:000:0 s 80 06 0100 0000 0040 64 <
> ffff8e9c88c2b980 1396359403 C Ci:3:000:0 0 18 = 12011001 ef020140
> 992d01a1 00010102 0301
Getting the Device Descriptor from the now responding device
> ffff8e9c88c2b980 1396359408 S Co:3:001:0 s 23 03 0004 0002 0000 0
> ffff8e9c88c2b980 1396359417 C Co:3:001:0 0 0
> ffff8e9c88c2b980 1396420014 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b980 1396420023 C Ci:3:001:0 0 4 = 03011000
> ffff8e9c88c2b980 1396420027 S Co:3:001:0 s 23 01 0014 0002 0000 0
> ffff8e9c88c2b980 1396420031 C Co:3:001:0 0 0
Device addressed
> ffff8e9c88c2b980 1396482417 S Ci:3:010:0 s 80 06 0100 0000 0012 18 <
> ffff8e9c88c2b980 1396483409 C Ci:3:010:0 0 18 = 12011001 ef020140
> 992d01a1 00010102 0301
Get Device Descriptor at address
> ffff8e9c88c2b980 1396483422 S Ci:3:010:0 s 80 06 0200 0000 0009 9 <
> ffff8e9c88c2b980 1396485399 C Ci:3:010:0 0 9 = 0902b600 04010080 32
Get Configuration Descriptor size
> ffff8e9c88c2acc0 1396485406 S Ci:3:010:0 s 80 06 0200 0000 00b6 182 <
> ffff8e9c88c2acc0 1396488386 C Ci:3:010:0 0 182 = 0902b600 04010080
> 32080b00 02010200 05090400 00000101 00050924 0100012f
Get full Configuration Descriptor
> ffff8e9c88c2a6c0 1396488397 S Ci:3:010:0 s 80 06 0300 0000 00ff 255 <
> ffff8e9c88c2a6c0 1396491393 C Ci:3:010:0 0 4 = 04030904
Get String Descriptor language array
> ffff8e9c88c2a6c0 1396491402 S Ci:3:010:0 s 80 06 0302 0409 00ff 255 <
> ffff8e9c88c2a6c0 1396493424 C Ci:3:010:0 0 40 = 28034500 44004900
> 46004900 45005200 20004800 61006c00 30002000 32002e00
Get String Descriptor index 2
> ffff8e9c88c2a6c0 1396493441 S Ci:3:010:0 s 80 06 0301 0409 00ff 255 <
> ffff8e9c88c2a6c0 1396495422 C Ci:3:010:0 0 34 = 22034a00 69006500
> 6c006900 20005400 65006300 68006e00 6f006c00 6f006700
Get String Descriptor index 1
> ffff8e9c88c2a6c0 1396495437 S Ci:3:010:0 s 80 06 0303 0409 00ff 255 <
> ffff8e9c88c2a6c0 1396497827 C Ci:3:010:0 0 34 = 22033400 32003500
> 30003300 31003500 41003300 34003300 38003300 35003000
Get String Descriptor index 3
> ffff8e9c88c2a6c0 1396507381 S Co:3:010:0 s 00 09 0001 0000 0000 0
> ffff8e9c88c2a6c0 1396508385 C Co:3:010:0 0 0
Set Configuration 1
> ffff8e9c88c2a6c0 1396508469 S Ci:3:010:0 s 80 06 0305 0409 00ff 255 <
> ffff8e9c88c2a6c0 1396511390 C Ci:3:010:0 0 26 = 1a034500 44004900
> 46004900 45005200 20005100 52003300 3000
Get String Descriptor index 5
> ffff8e9c88c2b5c0 1396511455 S Ci:3:010:0 s 80 06 0302 0409 00ff 255 <
> ffff8e9c88c2b5c0 1396513425 C Ci:3:010:0 0 40 = 28034500 44004900
> 46004900 45005200 20004800 61006c00 30002000 32002e00
Get String Descriptor index 2
> ffff8e9c88c2b5c0 1396513435 S Ci:3:010:0 s 80 06 0301 0409 00ff 255 <
> ffff8e9c88c2b5c0 1396515418 C Ci:3:010:0 0 34 = 22034a00 69006500
> 6c006900 20005400 65006300 68006e00 6f006c00 6f006700
Get String Descriptor index 1
> ffff8e9c88c2bec0 1396515454 S Co:3:010:0 s 01 0b 0000 0001 0000 0
> ffff8e9c88c2bec0 1396517391 C Co:3:010:0 0 0
Set Interface 1 to Alternate 0
> ffff8e9c88c2bec0 1396519380 S Co:3:010:0 s 01 0b 0001 0001 0000 0
> ffff8e9c88c2bec0 1396520379 C Co:3:010:0 0 0
Set Interface 1 to Alternate 1
> ffff8e9c88c2bec0 1396523379 S Co:3:010:0 s 01 0b 0000 0001 0000 0
> ffff8e9c88c2bec0 1396524387 C Co:3:010:0 0 0
Set Interface 1 to Alternate 0
> ffff8e9c88c2b380 1396524402 S Ci:3:010:0 s a1 81 0100 0200 0001 1 <
> ffff8e9c88c2b380 1396527394 C Ci:3:010:0 0 1 = 00
Get Current Mute state (off)
> ffff8e9c88c2a840 1396527409 S Ci:3:010:0 s a1 83 0200 0200 0002 2 <
> ffff8e9c88c2a840 1396529395 C Ci:3:010:0 0 2 = 0fff
Get Maximum Volume level (-0.94140625 dB)
> ffff8e9c88c2a840 1396529405 S Ci:3:010:0 s a1 82 0200 0200 0002 2 <
> ffff8e9c88c2a840 1396531395 C Ci:3:010:0 0 2 = a0e3
Get Minimum Volume level (-28.375 dB)
> ffff8e9c88c2a840 1396531405 S Ci:3:010:0 s a1 84 0200 0200 0002 2 <
> ffff8e9c88c2a840 1396533383 C Ci:3:010:0 0 2 = 3000
Get Volume Resolution (0.1875 dB)
> ffff8e9c88c2a840 1396533390 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396535463 C Co:3:010:0 -32 0
Set Volume Resolution (0.09375 dB) not supported by device
> ffff8e9c88c2a840 1396535468 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396537463 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396537468 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396539462 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396539467 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396541462 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396541466 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396543452 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396543457 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396545461 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396545468 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396547462 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396547467 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396549462 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396549468 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396551462 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396551468 S Co:3:010:0 s 21 04 0200 0200 0002 2 = 1800
> ffff8e9c88c2a840 1396553462 C Co:3:010:0 -32 0
> ffff8e9c88c2a840 1396553467 S Ci:3:010:0 s a1 84 0200 0200 0002 2 <
> ffff8e9c88c2a840 1396555383 C Ci:3:010:0 0 2 = 3000
Get Volume Resolution (0.1875 dB)
> ffff8e9c88c2a840 1396555388 S Ci:3:010:0 s a1 81 0200 0200 0002 2 <
> ffff8e9c88c2a840 1396557382 C Ci:3:010:0 0 2 = 0fff
Get Current Volume level (-0.94140625 dB)
> ffff8e9c88c2a840 1396557387 S Co:3:010:0 s 21 01 0200 0200 0002 2 = dffe
> ffff8e9c88c2a840 1396560374 C Co:3:010:0 0 2 >
Set Current Volume level (-1.12890625)
> ffff8e9c88c2a840 1396560378 S Ci:3:010:0 s a1 81 0200 0200 0002 2 <
> ffff8e9c88c2a840 1396563380 C Ci:3:010:0 0 2 = dffe
Get Current Volume level (-1.12890625)
> ffff8e9c88c2a840 1396563384 S Co:3:010:0 s 21 01 0200 0200 0002 2 = 0fff
> ffff8e9c88c2a840 1396566369 C Co:3:010:0 0 2 >
Set Current Volume level (-0.94140625 dB)
> ffff8e9c88c2bb00 1396566719 S Ci:3:010:0 s 80 06 0303 0409 00ff 255 <
> ffff8e9c88c2bb00 1396569381 C Ci:3:010:0 0 34 = 22033400 32003500
> 30003300 31003500 41003300 34003300 38003300 35003000
Get String Descriptor index 3
> ffff8e9c88c2bb00 1396569394 S Co:3:010:0 s 21 0a 0000 0002 0000 0
> ffff8e9c88c2bb00 1396571376 C Co:3:010:0 0 0
Set Idle to indefinite for Interface 2
> ffff8e9c88c2bb00 1396571379 S Ci:3:010:0 s 81 06 2200 0002 0021 33 <
> ffff8e9c88c2bb00 1396573402 C Ci:3:010:0 0 33 = 050c0901 a1011500
> 250109e9 09ea09e2 09cd09b5 09b609b3 09b77501 95088142
Get Interface 2 Report Descriptor (only 32 of 33 bytes shown)
> ffff8e9c88c2bb00 1396573571 S Ii:3:010:2 -115:1 1 <
> ffff8e9c88c2a540 1396624419 S Ci:3:010:0 s 80 06 0303 0409 00ff 255 <
> ffff8e9c88c2a540 1396625422 C Ci:3:010:0 0 34 = 22033400 32003500
> 30003300 31003500 41003300 34003300 38003300 35003000
Get String Descriptor index 3
> ffff8e9c88c2a540 1396625438 S Co:3:010:0 s 21 0a 0000 0003 0000 0
> ffff8e9c88c2a540 1396627394 C Co:3:010:0 0 0
Set Idle to indefinite for Interface 3
> ffff8e9c88c2a540 1396627401 S Ci:3:010:0 s 81 06 2200 0003 0042 66 <
> ffff8e9c88c2a540 1396630398 C Ci:3:010:0 0 66 = 0613ff09 01a10115
> 0026ff00 85060900 7508953d 91028507 09007508 953d8102
Get Interface 3 Report Descriptor (only 32 of 66 bytes shown)
> ffff8e9c88c2b680 1396630828 S Ci:3:001:0 s a3 00 0000 0002 0004 4 <
> ffff8e9c88c2b680 1396630840 C Ci:3:001:0 0 4 = 03010000
> ffff8e9c8ae5b740 1396647084 S Co:3:010:0 s 21 01 0200 0200 0002 2 = 20f4
> ffff8e9c8ae5b740 1396648382 C Co:3:010:0 0 2 >
Set Current Volume level (-11.875 dB)
> ffff8e9d9b3c75c0 1396701374 S Co:3:010:0 s 01 0b 0001 0001 0000 0
> ffff8e9d9b3c75c0 1396702379 C Co:3:010:0 0 0
Set Interface 1 to Alternate 1
> ffff8e9c88c11ec0 1396705364 S Co:3:010:0 s 01 0b 0000 0001 0000 0
> ffff8e9c88c11ec0 1396706376 C Co:3:010:0 0 0
Set Interface 1 to Alternate 0
> ffff8e9d1ecd2780 1396711369 S Co:3:010:0 s 01 0b 0001 0001 0000 0
> ffff8e9d1ecd2780 1396712377 C Co:3:010:0 0 0
Set Interface 1 to Alternate 1
> ffff8e9c88c2b680 1396715364 S Co:3:010:0 s 01 0b 0000 0001 0000 0
> ffff8e9c88c2b680 1396716377 C Co:3:010:0 0 0
Set Interface 1 to Alternate 0
> ffff8e9d9b3c7bc0 1396729375 S Co:3:010:0 s 01 0b 0001 0001 0000 0
> ffff8e9d9b3c7bc0 1396730378 C Co:3:010:0 0 0
Set Interface 1 to Alternate 1
> ffff8e9d9b3c7bc0 1396733363 S Co:3:010:0 s 01 0b 0000 0001 0000 0
> ffff8e9d9b3c7bc0 1396734376 C Co:3:010:0 0 0
Set Interface 1 to Alternate 0
> ```
>
>
> I'm not familiar with kernel development, but I’m happy to run any
> tests or provide additional information.
> Please just let me know which commands to execute or what logs would
> be most useful.
>
> I'm sending again in plaintext, sorry.
>
> Thank you!
>
^ permalink raw reply
* [PATCH 4/4] PM: sleep: clear pm_abort_suspend at suspend
From: Muhammad Usama Anjum @ 2025-11-07 18:44 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Danilo Krummrich, Dmitry Torokhov, Thomas Gleixner,
Peter Zijlstra, linux-acpi, linux-kernel, linux-pm, linux-input
Cc: Muhammad Usama Anjum, kernel, superm1
In-Reply-To: <20251107184438.1328717-1-usama.anjum@collabora.com>
Clear pm_abort_suspend counter in case a wakeup is detected during
hibernation process. If this counter isn't reset, it'll affect the
next hibernation cycle and next time hibernation will not happen as
pm_abort_suspend is still positive.
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
---
drivers/base/power/main.c | 2 ++
kernel/cpu.c | 1 +
kernel/power/hibernate.c | 5 ++++-
kernel/power/process.c | 1 +
4 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 5760abb25b591..84e76f8df1e02 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -1642,6 +1642,7 @@ static void device_suspend_late(struct device *dev, pm_message_t state, bool asy
goto Complete;
if (pm_wakeup_pending()) {
+ pm_wakeup_clear(0);
WRITE_ONCE(async_error, -EBUSY);
goto Complete;
}
@@ -1887,6 +1888,7 @@ static void device_suspend(struct device *dev, pm_message_t state, bool async)
if (pm_wakeup_pending()) {
dev->power.direct_complete = false;
+ pm_wakeup_clear(0);
WRITE_ONCE(async_error, -EBUSY);
goto Complete;
}
diff --git a/kernel/cpu.c b/kernel/cpu.c
index db9f6c539b28c..74c9f6b4947dd 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -1921,6 +1921,7 @@ int freeze_secondary_cpus(int primary)
if (pm_wakeup_pending()) {
pr_info("Wakeup pending. Abort CPU freeze\n");
+ pm_wakeup_clear(0);
error = -EBUSY;
break;
}
diff --git a/kernel/power/hibernate.c b/kernel/power/hibernate.c
index e15907f28c4cd..1f6b60df45d34 100644
--- a/kernel/power/hibernate.c
+++ b/kernel/power/hibernate.c
@@ -349,8 +349,10 @@ static int create_image(int platform_mode)
goto Enable_irqs;
}
- if (hibernation_test(TEST_CORE) || pm_wakeup_pending())
+ if (hibernation_test(TEST_CORE) || pm_wakeup_pending()) {
+ pm_wakeup_clear(0);
goto Power_up;
+ }
in_suspend = 1;
save_processor_state();
@@ -660,6 +662,7 @@ int hibernation_platform_enter(void)
goto Enable_irqs;
if (pm_wakeup_pending()) {
+ pm_wakeup_clear(0);
error = -EAGAIN;
goto Power_up;
}
diff --git a/kernel/power/process.c b/kernel/power/process.c
index dc0dfc349f22b..e935b27a04ae0 100644
--- a/kernel/power/process.c
+++ b/kernel/power/process.c
@@ -67,6 +67,7 @@ static int try_to_freeze_tasks(bool user_only)
break;
if (pm_wakeup_pending()) {
+ pm_wakeup_clear(0);
wakeup = true;
break;
}
--
2.47.3
^ permalink raw reply related
* [PATCH 3/4] Input: Ignore the KEY_POWER events if hibernation is in progress
From: Muhammad Usama Anjum @ 2025-11-07 18:44 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Danilo Krummrich, Dmitry Torokhov, Thomas Gleixner,
Peter Zijlstra, linux-acpi, linux-kernel, linux-pm, linux-input
Cc: Muhammad Usama Anjum, kernel, superm1
In-Reply-To: <20251107184438.1328717-1-usama.anjum@collabora.com>
Input (Serio) drivers call input_handle_event(). Although the serio
drivers have duplicate events, they have separate code path and call
input_handle_event(). Ignore the KEY_POWER such that this event isn't
sent to the userspace if hibernation is in progress.
Abort the hibernation by calling pm_wakeup_dev_event(). In case of serio,
doesn't have wakeup source registered, this call doesn't do anything.
But there may be other input drivers which will require this.
Without this, the event is sent to the userspace and it suspends the
device after hibernation cancellation.
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
---
Changes since RFC:
- Use pm_sleep_transition_in_progress()
- Update description
---
drivers/input/input.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index a500e1e276c21..7939bd9e47668 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -26,6 +26,7 @@
#include <linux/kstrtox.h>
#include <linux/mutex.h>
#include <linux/rcupdate.h>
+#include <linux/suspend.h>
#include "input-compat.h"
#include "input-core-private.h"
#include "input-poller.h"
@@ -362,6 +363,11 @@ void input_handle_event(struct input_dev *dev,
lockdep_assert_held(&dev->event_lock);
+ if (code == KEY_POWER && pm_sleep_transition_in_progress()) {
+ pm_wakeup_dev_event(&dev->dev, 0, true);
+ return;
+ }
+
disposition = input_get_disposition(dev, type, code, &value);
if (disposition != INPUT_IGNORE_EVENT) {
if (type != EV_SYN)
--
2.47.3
^ permalink raw reply related
* [PATCH 2/4] ACPI: button: Cancel hibernation if button is pressed during hibernation
From: Muhammad Usama Anjum @ 2025-11-07 18:44 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Danilo Krummrich, Dmitry Torokhov, Thomas Gleixner,
Peter Zijlstra, linux-acpi, linux-kernel, linux-pm, linux-input
Cc: Muhammad Usama Anjum, kernel, superm1
In-Reply-To: <20251107184438.1328717-1-usama.anjum@collabora.com>
acpi_pm_wakeup_event() is called from acpi_button_notify() which is
called when power button is pressed. The system is worken up from s2idle
in this case by setting hard parameter to pm_wakeup_dev_event().
Call acpi_pm_wakeup_event() if power button is pressed and hibernation
is in progress. Set the hard parameter such that pm_system_wakeup()
gets called which increments pm_abort_suspend counter. The explicit call
to acpi_pm_wakeup_event() is necessary as ACPI button device has the
wakeup source. Hence call to input_report_key() with input device
doesn't call pm_system_wakeup() as it doesn't have wakeup source
registered.
Hence hibernation would be cancelled as in hibernation path, this counter
is checked if it should be aborted.
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
---
Changes since RFC:
- Use pm_sleep_transition_in_progress()
- Update descriptin why explicit call to acpi_pm_wakeup_event() is
necessary
---
drivers/acpi/button.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
index 3c6dd9b4ba0ad..e4be5c763edaf 100644
--- a/drivers/acpi/button.c
+++ b/drivers/acpi/button.c
@@ -20,6 +20,7 @@
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <acpi/button.h>
+#include <linux/suspend.h>
#define ACPI_BUTTON_CLASS "button"
#define ACPI_BUTTON_FILE_STATE "state"
@@ -458,11 +459,16 @@ static void acpi_button_notify(acpi_handle handle, u32 event, void *data)
acpi_pm_wakeup_event(&device->dev);
button = acpi_driver_data(device);
- if (button->suspended || event == ACPI_BUTTON_NOTIFY_WAKE)
- return;
-
input = button->input;
keycode = test_bit(KEY_SLEEP, input->keybit) ? KEY_SLEEP : KEY_POWER;
+ if (event == ACPI_BUTTON_NOTIFY_STATUS && keycode == KEY_POWER &&
+ pm_sleep_transition_in_progress()) {
+ pm_wakeup_dev_event(&device->dev, 0, true);
+ return;
+ }
+
+ if (button->suspended || event == ACPI_BUTTON_NOTIFY_WAKE)
+ return;
input_report_key(input, keycode, 1);
input_sync(input);
--
2.47.3
^ permalink raw reply related
* [PATCH 1/4] PM: hibernate: export pm_sleep_transition_in_progress()
From: Muhammad Usama Anjum @ 2025-11-07 18:44 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Danilo Krummrich, Dmitry Torokhov, Thomas Gleixner,
Peter Zijlstra, linux-acpi, linux-kernel, linux-pm, linux-input
Cc: Muhammad Usama Anjum, kernel, superm1
In-Reply-To: <20251107184438.1328717-1-usama.anjum@collabora.com>
Export pm_sleep_transition_in_progress() to be used by other
modules.
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
---
kernel/power/main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/power/main.c b/kernel/power/main.c
index 33a47ed15994f..ff3354b5be150 100644
--- a/kernel/power/main.c
+++ b/kernel/power/main.c
@@ -570,6 +570,7 @@ bool pm_sleep_transition_in_progress(void)
{
return pm_suspend_in_progress() || hibernation_in_progress();
}
+EXPORT_SYMBOL_GPL(pm_sleep_transition_in_progress);
#endif /* CONFIG_PM_SLEEP */
#ifdef CONFIG_PM_SLEEP_DEBUG
--
2.47.3
^ permalink raw reply related
* [PATCH 0/4] PM: Hibernate: Add hibernation cancellation support
From: Muhammad Usama Anjum @ 2025-11-07 18:44 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Pavel Machek, Greg Kroah-Hartman,
Danilo Krummrich, Dmitry Torokhov, Thomas Gleixner,
Peter Zijlstra, linux-acpi, linux-kernel, linux-pm, linux-input
Cc: Muhammad Usama Anjum, kernel, superm1
On a normal laptop/PC, the hibernation takes 15-20 seconds which is
considerable time. Once hibernation is triggered from command line or by
some GUI option, the hibernation cannot be cancelled until completed.
Its not a blocker, but poor user experience.
When power button is pressed during hibernation, it generates interrupt
and then the event is routed to userspace. If systemd is being used, the
logind handles these events and performs the specific action.
During hibernation, the first stage is to freeze the userspace. Hence
even if the power button is pressed, it doesn't aborts the hibernation
as user space daemon is frozen.
My device takes ~19 seconds to hibernate. When I was testing hibernation
using rtcwake with timeout of 10 seconds, I found out that hibernation
gets canceled around 10 seconds mark when the interrupt fires.
In this series, the idea is to find a way to cancel the hibernation.
With this series applied, the hibernation gets cancelled gracefully.
The hibernation cancellation support isn't present in very last stage
just before power_down(). I've not been able to handle the error paths
correctly there yet as logs aren't available from that stage. I'll send
that patch separately when it works.
Cc: rafael@kernel.org
Cc: superm1@kernel.org
---
Changes since RFC:
- Update description of patches
- Use pm_sleep_transition_in_progress() instead of
hibernation_in_progress()
Muhammad Usama Anjum (4):
PM: hibernate: export pm_sleep_transition_in_progress()
ACPI: button: Cancel hibernation if button is pressed during
hibernation
Input: Ignore the KEY_POWER events if hibernation is in progress
PM: sleep: clear pm_abort_suspend at suspend
drivers/acpi/button.c | 12 +++++++++---
drivers/base/power/main.c | 2 ++
drivers/input/input.c | 6 ++++++
kernel/cpu.c | 1 +
kernel/power/hibernate.c | 5 ++++-
kernel/power/main.c | 1 +
kernel/power/process.c | 1 +
7 files changed, 24 insertions(+), 4 deletions(-)
--
2.47.3
^ permalink raw reply
* Re: [PATCH v2] hid/hid-multitouch: Keep latency normal on deactivate for reactivation gesture
From: Werner Sembach @ 2025-11-07 17:57 UTC (permalink / raw)
To: Jiri Kosina, Benjamin Tissoires; +Cc: linux-input, linux-kernel
In-Reply-To: <20251106200752.1523111-1-wse@tuxedocomputers.com>
Am 06.11.25 um 20:59 schrieb Werner Sembach:
> Uniwill devices have a built in gesture in the touchpad to de- and
> reactivate it by double taping the upper left corner. This gesture stops
> working when latency is set to high, so this patch keeps the latency on
> normal.
Just a heads up: For some reason this patch breaks the touchpad on Intel
devices. I will look into it on monday.
>
> Signed-off-by: Werner Sembach <wse@tuxedocomputers.com>
> Cc: stable@vger.kernel.org
> ---
> V1->V2: Use a quirk to narrow down the devices this is applied to.
>
> I have three Uniwill devices at hand right now that have at least two
> physically different touchpads, but same Vendor + Product ID combination.
> Maybe the vendor uses this product ID for all i2c connected touchpads, or
> it is used as some kind of subvendor ID to indicate Uniwill?
>
> To be able to really narrow it down to Uniwill only devices I would need to
> check DMI strings, but then I will probably narrow it down to much as I
> only know what we at TUXEDO use there.
>
> drivers/hid/hid-multitouch.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
> index 179dc316b4b51..470f199148057 100644
> --- a/drivers/hid/hid-multitouch.c
> +++ b/drivers/hid/hid-multitouch.c
> @@ -76,6 +76,7 @@ MODULE_LICENSE("GPL");
> #define MT_QUIRK_DISABLE_WAKEUP BIT(21)
> #define MT_QUIRK_ORIENTATION_INVERT BIT(22)
> #define MT_QUIRK_APPLE_TOUCHBAR BIT(23)
> +#define MT_QUIRK_KEEP_LATENCY_ON_CLOSE BIT(24)
>
> #define MT_INPUTMODE_TOUCHSCREEN 0x02
> #define MT_INPUTMODE_TOUCHPAD 0x03
> @@ -229,6 +230,7 @@ static void mt_post_parse(struct mt_device *td, struct mt_application *app);
> #define MT_CLS_RAZER_BLADE_STEALTH 0x0112
> #define MT_CLS_SMART_TECH 0x0113
> #define MT_CLS_APPLE_TOUCHBAR 0x0114
> +#define MT_CLS_UNIWILL_TOUCHPAD 0x0115
> #define MT_CLS_SIS 0x0457
>
> #define MT_DEFAULT_MAXCONTACT 10
> @@ -420,6 +422,9 @@ static const struct mt_class mt_classes[] = {
> MT_QUIRK_APPLE_TOUCHBAR,
> .maxcontacts = 11,
> },
> + { .name = MT_CLS_UNIWILL_TOUCHPAD,
> + .quirks = MT_QUIRK_KEEP_LATENCY_ON_CLOSE,
> + },
> { .name = MT_CLS_SIS,
> .quirks = MT_QUIRK_NOT_SEEN_MEANS_UP |
> MT_QUIRK_ALWAYS_VALID |
> @@ -1998,7 +2003,12 @@ static void mt_on_hid_hw_open(struct hid_device *hdev)
>
> static void mt_on_hid_hw_close(struct hid_device *hdev)
> {
> - mt_set_modes(hdev, HID_LATENCY_HIGH, TOUCHPAD_REPORT_NONE);
> + struct mt_device *td = hid_get_drvdata(hdev);
> +
> + if (td->mtclass.quirks & MT_QUIRK_KEEP_LATENCY_ON_CLOSE)
> + mt_set_modes(hdev, HID_LATENCY_NORMAL, TOUCHPAD_REPORT_NONE);
> + else
> + mt_set_modes(hdev, HID_LATENCY_HIGH, TOUCHPAD_REPORT_NONE);
> }
>
> /*
> @@ -2375,6 +2385,11 @@ static const struct hid_device_id mt_devices[] = {
> MT_USB_DEVICE(USB_VENDOR_ID_UNITEC,
> USB_DEVICE_ID_UNITEC_USB_TOUCH_0A19) },
>
> + /* Uniwill touchpads */
> + { .driver_data = MT_CLS_UNIWILL_TOUCHPAD,
> + HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8,
> + USB_VENDOR_ID_PIXART, 0x0255) },
> +
> /* VTL panels */
> { .driver_data = MT_CLS_VTL,
> MT_USB_DEVICE(USB_VENDOR_ID_VTL,
^ permalink raw reply
* Re: [PATCH v2 02/11] dt-bindings: display: panel: ronbo,rb070d30: panel-common ref
From: Conor Dooley @ 2025-11-07 17:48 UTC (permalink / raw)
To: Josua Mayer
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-2-d8233ded999e@solid-run.com>
[-- Attachment #1: Type: text/plain, Size: 677 bytes --]
On Fri, Nov 07, 2025 at 12:46:09PM +0100, Josua Mayer wrote:
> Add missing ref on panel-common.yaml for this dsi panel so that common
> properties can be shared.
>
> Drop reset-gpios and backlight as they are already in panel-common.
>
> Switch from additionalProperties to unevaluatedProperties so that common
> panel properties are available without repeating them in this binding.
>
> Notably panel-common defines the "port" property for linking panels to a
> source - which was missing from this panel. Mark it as required.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v2 03/11] dt-bindings: panel: lvds: add Winstar WF70A8SYJHLNGA
From: Conor Dooley @ 2025-11-07 17:47 UTC (permalink / raw)
To: Josua Mayer
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-3-d8233ded999e@solid-run.com>
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH] HID: nintendo: add WQ_PERCPU to alloc_workqueue users
From: Marco Crivellari @ 2025-11-07 17:04 UTC (permalink / raw)
To: Jiri Kosina
Cc: linux-kernel, linux-input, Tejun Heo, Lai Jiangshan,
Frederic Weisbecker, Sebastian Andrzej Siewior, Michal Hocko,
Daniel J . Ogorchock, Benjamin Tissoires
In-Reply-To: <50rq8s8q-q098-rrs5-r1rp-p5p5r7929psq@xreary.bet>
On Fri, Nov 7, 2025 at 6:03 PM Jiri Kosina <jikos@kernel.org> wrote:
>[...]
> Applied to hid.git#for-6.19/nintendo, thanks Marco.
Many thanks, Jiri!
--
Marco Crivellari
L3 Support Engineer, Technology & Product
^ permalink raw reply
* Re: [PATCH] HID: nintendo: add WQ_PERCPU to alloc_workqueue users
From: Jiri Kosina @ 2025-11-07 17:03 UTC (permalink / raw)
To: Marco Crivellari
Cc: linux-kernel, linux-input, Tejun Heo, Lai Jiangshan,
Frederic Weisbecker, Sebastian Andrzej Siewior, Michal Hocko,
Daniel J . Ogorchock, Benjamin Tissoires
In-Reply-To: <20251107132443.180151-1-marco.crivellari@suse.com>
On Fri, 7 Nov 2025, Marco Crivellari wrote:
> Currently if a user enqueues a work item using schedule_delayed_work() the
> used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use
> WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to
> schedule_work() that is using system_wq and queue_work(), that makes use
> again of WORK_CPU_UNBOUND.
> This lack of consistency cannot be addressed without refactoring the API.
>
> alloc_workqueue() treats all queues as per-CPU by default, while unbound
> workqueues must opt-in via WQ_UNBOUND.
>
> This default is suboptimal: most workloads benefit from unbound queues,
> allowing the scheduler to place worker threads where they’re needed and
> reducing noise when CPUs are isolated.
>
> This continues the effort to refactor workqueue APIs, which began with
> the introduction of new workqueues and a new alloc_workqueue flag in:
>
> commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq")
> commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag")
>
> This change adds a new WQ_PERCPU flag to explicitly request
> alloc_workqueue() to be per-cpu when WQ_UNBOUND has not been specified.
>
> With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND),
> any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND
> must now use WQ_PERCPU.
>
> Once migration is complete, WQ_UNBOUND can be removed and unbound will
> become the implicit default.
>
> Suggested-by: Tejun Heo <tj@kernel.org>
> Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
Applied to hid.git#for-6.19/nintendo, thanks Marco.
--
Jiri Kosina
SUSE Labs
^ permalink raw reply
* Re: [PATCH v2 04/11] Input: ilitek_ts_i2c: fix warning with gpio controllers that sleep
From: Frank Li @ 2025-11-07 15:58 UTC (permalink / raw)
To: Josua Mayer
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-4-d8233ded999e@solid-run.com>
On Fri, Nov 07, 2025 at 12:46:11PM +0100, Josua Mayer wrote:
> The ilitek touchscreen driver uses the non-sleeping gpiod_set_value
> function for reset.
>
> When the connected gpio controller needs to sleep as is common for i2c
> based expanders, this causes noisy complaints in kernel log.
>
> Reset is not time-critical, switch to the gpiod_set_value_cansleep
> variant.
Suggest use simple words
Switch to using gpiod_set_value_cansleep() when controlling reset_gpio to
support GPIO providers that may sleep, such as I2C GPIO expanders.
Frank
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> drivers/input/touchscreen/ilitek_ts_i2c.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/input/touchscreen/ilitek_ts_i2c.c b/drivers/input/touchscreen/ilitek_ts_i2c.c
> index 0dd632724a003..8c5a54b336816 100644
> --- a/drivers/input/touchscreen/ilitek_ts_i2c.c
> +++ b/drivers/input/touchscreen/ilitek_ts_i2c.c
> @@ -396,9 +396,9 @@ static const struct ilitek_protocol_map ptl_func_map[] = {
> static void ilitek_reset(struct ilitek_ts_data *ts, int delay)
> {
> if (ts->reset_gpio) {
> - gpiod_set_value(ts->reset_gpio, 1);
> + gpiod_set_value_cansleep(ts->reset_gpio, 1);
> mdelay(10);
> - gpiod_set_value(ts->reset_gpio, 0);
> + gpiod_set_value_cansleep(ts->reset_gpio, 0);
> mdelay(delay);
> }
> }
>
> --
> 2.51.0
>
^ permalink raw reply
* Re: [PATCH v2 02/11] dt-bindings: display: panel: ronbo,rb070d30: panel-common ref
From: Frank Li @ 2025-11-07 15:53 UTC (permalink / raw)
To: Josua Mayer
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding,
Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-2-d8233ded999e@solid-run.com>
On Fri, Nov 07, 2025 at 12:46:09PM +0100, Josua Mayer wrote:
> Add missing ref on panel-common.yaml for this dsi panel so that common
> properties can be shared.
>
> Drop reset-gpios and backlight as they are already in panel-common.
>
> Switch from additionalProperties to unevaluatedProperties so that common
> panel properties are available without repeating them in this binding.
>
> Notably panel-common defines the "port" property for linking panels to a
> source - which was missing from this panel. Mark it as required.
>
> Signed-off-by: Josua Mayer <josua@solid-run.com>
> ---
> .../devicetree/bindings/display/panel/ronbo,rb070d30.yaml | 14 +++++---------
> 1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml b/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml
> index 04f86e0cbac91..6940373015833 100644
> --- a/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml
> +++ b/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml
> @@ -9,6 +9,9 @@ title: Ronbo RB070D30 DSI Display Panel
> maintainers:
> - Maxime Ripard <mripard@kernel.org>
>
> +allOf:
> + - $ref: panel-common.yaml#
> +
Can you move allof after required incase add if-else branch later.
Frank
> properties:
> compatible:
> const: ronbo,rb070d30
> @@ -20,10 +23,6 @@ properties:
> description: GPIO used for the power pin
> maxItems: 1
>
> - reset-gpios:
> - description: GPIO used for the reset pin
> - maxItems: 1
> -
> shlr-gpios:
> description: GPIO used for the shlr pin (horizontal flip)
> maxItems: 1
> @@ -35,10 +34,6 @@ properties:
> vcc-lcd-supply:
> description: Power regulator
>
> - backlight:
> - description: Backlight used by the panel
> - $ref: /schemas/types.yaml#/definitions/phandle
> -
> required:
> - compatible
> - power-gpios
> @@ -47,5 +42,6 @@ required:
> - shlr-gpios
> - updn-gpios
> - vcc-lcd-supply
> + - port
>
> -additionalProperties: false
> +unevaluatedProperties: false
>
> --
> 2.51.0
>
^ permalink raw reply
* [PATCH] HID: nintendo: add WQ_PERCPU to alloc_workqueue users
From: Marco Crivellari @ 2025-11-07 13:24 UTC (permalink / raw)
To: linux-kernel, linux-input
Cc: Tejun Heo, Lai Jiangshan, Frederic Weisbecker,
Sebastian Andrzej Siewior, Marco Crivellari, Michal Hocko,
Daniel J . Ogorchock, Jiri Kosina, Benjamin Tissoires
Currently if a user enqueues a work item using schedule_delayed_work() the
used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use
WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to
schedule_work() that is using system_wq and queue_work(), that makes use
again of WORK_CPU_UNBOUND.
This lack of consistency cannot be addressed without refactoring the API.
alloc_workqueue() treats all queues as per-CPU by default, while unbound
workqueues must opt-in via WQ_UNBOUND.
This default is suboptimal: most workloads benefit from unbound queues,
allowing the scheduler to place worker threads where they’re needed and
reducing noise when CPUs are isolated.
This continues the effort to refactor workqueue APIs, which began with
the introduction of new workqueues and a new alloc_workqueue flag in:
commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq")
commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag")
This change adds a new WQ_PERCPU flag to explicitly request
alloc_workqueue() to be per-cpu when WQ_UNBOUND has not been specified.
With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND),
any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND
must now use WQ_PERCPU.
Once migration is complete, WQ_UNBOUND can be removed and unbound will
become the implicit default.
Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
---
drivers/hid/hid-nintendo.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/hid/hid-nintendo.c b/drivers/hid/hid-nintendo.c
index c2849a541f65..bb088a066dd0 100644
--- a/drivers/hid/hid-nintendo.c
+++ b/drivers/hid/hid-nintendo.c
@@ -2648,7 +2648,8 @@ static int nintendo_hid_probe(struct hid_device *hdev,
init_waitqueue_head(&ctlr->wait);
spin_lock_init(&ctlr->lock);
ctlr->rumble_queue = alloc_workqueue("hid-nintendo-rumble_wq",
- WQ_FREEZABLE | WQ_MEM_RECLAIM, 0);
+ WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,
+ 0);
if (!ctlr->rumble_queue) {
ret = -ENOMEM;
goto err;
--
2.51.1
^ permalink raw reply related
* [PATCH v2 11/11] arm64: dts: add description for solidrun i.mx8mm som and evb
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
Add description for the SolidRun i.MX8M Mini SoM on HummingBoard Ripple.
The SoM features:
- 1Gbps Ethernet with PHY
- eMMC
- 1/2GB DDR
- NPU (assembly option)
- WiFi + Bluetooth
The HummingBoard Ripple features:
- 2x USB-2.0 Type-A connector
- 1Gbps RJ45 Ethernet with PoE
- microSD connector
- microHDMI connector
- mpcie connector with USB-2.0 interface + SIM card holder
- microUSB connector for console (using fdtdi chip)
- RTC with backup battery
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../dts/freescale/imx8mm-hummingboard-ripple.dts | 335 +++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi | 395 +++++++++++++++++++++
3 files changed, 732 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index c56137097da3b..3fbc8a1a1bf6e 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -124,6 +124,8 @@ imx8mm-evk-pcie-ep-dtbs += imx8mm-evk.dtb imx-pcie0-ep.dtbo
imx8mm-evkb-pcie-ep-dtbs += imx8mm-evkb.dtb imx-pcie0-ep.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk-pcie-ep.dtb imx8mm-evkb-pcie-ep.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-hummingboard-ripple.dtb
+DTC_FLAGS_imx8mm-hummingboard-ripple += -@
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-iot-gateway.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-hummingboard-ripple.dts b/arch/arm64/boot/dts/freescale/imx8mm-hummingboard-ripple.dts
new file mode 100644
index 0000000000000..110e7ff1ff135
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-hummingboard-ripple.dts
@@ -0,0 +1,335 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "imx8mm-sr-som.dtsi"
+
+/ {
+ model = "SolidRun i.MX8MM HummingBoard Ripple";
+ compatible = "solidrun,imx8mm-hummingboard-ripple",
+ "solidrun,imx8mm-sr-som", "fsl,imx8mm";
+
+ aliases {
+ rtc0 = &carrier_rtc;
+ rtc1 = &snvs_rtc;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "c";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&adv7535_out>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ led-0 {
+ label = "D30";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-1 {
+ label = "D31";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-2 {
+ label = "D32";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-3 {
+ label = "D33";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+
+ led-4 {
+ label = "D34";
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+ };
+
+ rfkill-mpcie-wifi {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_rfkill_pins>;
+ label = "mpcie WiFi";
+ radio-type = "wlan";
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
+ };
+
+ vmmc: regulator-mmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vmmc_pins>;
+ regulator-name = "vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;
+ startup-delay-us = <250>;
+ };
+
+ vbus1: regulator-vbus-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus1";
+ gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vbus1_pins>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vbus2: regulator-vbus-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus2";
+ gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vbus2_pins>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ v_1_2: regulator-1-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "1v2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+ status = "okay";
+
+ carrier_rtc: rtc@69 {
+ compatible = "abracon,ab1805";
+ reg = <0x69>;
+ abracon,tc-diode = "schottky";
+ abracon,tc-resistor = <3>;
+ };
+
+ carrier_eeprom: eeprom@57{
+ compatible = "st,24c02", "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+
+ hdmi@3d {
+ compatible = "adi,adv7535";
+ reg = <0x3d>, <0x3f>, <0x3c>, <0x38>;
+ reg-names = "main", "edid", "cec", "packet";
+ adi,dsi-lanes = <4>;
+ avdd-supply = <&v_1_8>;
+ dvdd-supply = <&v_1_8>;
+ pvdd-supply = <&v_1_8>;
+ a2vdd-supply = <&v_1_8>;
+ v3p3-supply = <&v_3_3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_pins>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ pd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adv7535_from_dsim: endpoint {
+ remote-endpoint = <&mipi_dsi_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ adv7535_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
+};
+
+&iomuxc {
+ hdmi_pins: pinctrl-hdmi-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x0
+ MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x0
+ >;
+ };
+
+ i2c3_pins: pinctrl-i2c3-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
+ >;
+ };
+
+ led_pins: pinctrl-led-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x0
+ MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x0
+ MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x0
+ MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7 0x0
+ MX8MM_IOMUXC_ECSPI1_SCLK_GPIO5_IO6 0x0
+ >;
+ };
+
+ pcie_rfkill_pins: pinctrl-pcie-rfkill-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x0
+ >;
+ };
+
+ usb_hub_pins: pinctrl-usb-hub-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x0
+ >;
+ };
+
+ usdhc2_pins: pinctrl-usdhc2-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x140
+ MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
+ >;
+ };
+
+ usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x140
+ MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
+ >;
+ };
+
+ usdhc2_200mhz_pins: pinctrl-usdhc2-100mhz-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x140
+ MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
+ >;
+ };
+
+ vbus1_pins: pinctrl-vbus-1-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x20
+ >;
+ };
+
+ vbus2_pins: pinctrl-vbus-2-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x20
+ >;
+ };
+
+ vmmc_pins: pinctrl-vmmc-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
+ >;
+ };
+};
+
+&lcdif {
+ status = "okay";
+};
+
+&mipi_dsi {
+ samsung,esc-clock-frequency = <10000000>;
+ status = "okay";
+};
+
+&mipi_dsi_out {
+ remote-endpoint = <&adv7535_from_dsim>;
+};
+
+&usbotg1 {
+ dr_mode = "host";
+ vbus-supply = <&vbus2>;
+ status = "okay";
+};
+
+&usbotg2 {
+ status = "okay";
+ dr_mode = "host";
+ vbus-supply = <&vbus1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_hub_pins>;
+
+ hub_2_0: hub@1 {
+ compatible = "usb4b4,6502", "usb4b4,6506";
+ reg = <1>;
+ peer-hub = <&hub_3_0>;
+ reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&v_1_2>;
+ vdd2-supply = <&v_3_3>;
+ };
+
+ /* this device is not visible because host supports 2.0 only */
+ hub_3_0: hub@2 {
+ compatible = "usb4b4,6500", "usb4b4,6504";
+ reg = <2>;
+ peer-hub = <&hub_2_0>;
+ reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&v_1_2>;
+ vdd2-supply = <&v_3_3>;
+ };
+};
+
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&usdhc2_pins>;
+ pinctrl-1 = <&usdhc2_100mhz_pins>;
+ pinctrl-2 = <&usdhc2_200mhz_pins>;
+ vmmc-supply = <&vmmc>;
+ bus-width = <4>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi
new file mode 100644
index 0000000000000..04c16475e64a8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi
@@ -0,0 +1,395 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+
+#include "imx8mm.dtsi"
+
+/ {
+ model = "SolidRun i.MX8MM SoM";
+ compatible = "solidrun,imx8mm-sr-som", "fsl,imx8mm";
+
+ chosen {
+ bootargs = "earlycon=ec_imx6q,0x30890000,115200";
+ stdout-path = &uart2;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x0 0x40000000 0 0x80000000>;
+ };
+
+ usdhc1_pwrseq: usdhc1-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+ };
+
+ v_1_8: regulator-1-8 {
+ compatible = "regulator-fixed";
+ regulator-name = "1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ v_3_3: regulator-3-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fec1_pins>;
+ phy-mode = "rgmii-id";
+ phy = <&phy0>;
+ fsl,magic-packet;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@4 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x4>;
+ reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
+ qca,smarteee-tw-us-1g = <24>;
+ vddio-supply = <&vddio>;
+
+ vddio: vddio-regulator {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+
+ som_eeprom: eeprom@50{
+ compatible = "st,24c01", "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ pmic@4b {
+ compatible = "rohm,bd71847";
+ reg = <0x4b>;
+ pinctrl-0 = <&pmic_pins>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ rohm,reset-snvs-powered;
+
+ #clock-cells = <0>;
+ clocks = <&osc_32k>;
+ clock-output-names = "clk-32k-out";
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = "buck1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <1250>;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "buck2";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <1250>;
+ rohm,dvs-run-voltage = <1000000>;
+ rohm,dvs-idle-voltage = <900000>;
+ };
+
+ buck3_reg: BUCK3 {
+ // BUCK5 in datasheet
+ regulator-name = "buck3";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck4_reg: BUCK4 {
+ // BUCK6 in datasheet
+ regulator-name = "buck4";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5_reg: BUCK5 {
+ // BUCK7 in datasheet
+ regulator-name = "buck5";
+ regulator-min-microvolt = <1605000>;
+ regulator-max-microvolt = <1995000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6_reg: BUCK6 {
+ // BUCK8 in datasheet
+ regulator-name = "buck6";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: LDO1 {
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <900000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "ldo6";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&iomuxc {
+ fec1_pins: pinctrl-fec1-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
+ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
+ MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
+ MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
+ MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
+ MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
+ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
+ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
+ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
+ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
+ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
+ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
+ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
+ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
+ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
+ >;
+ };
+
+ i2c1_pins: pinctrl-i2c1-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
+ >;
+ };
+
+ pcie_pins: pinctrl-pcie-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x0
+ >;
+ };
+
+ pmic_pins: pinctrl-pmic-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x140
+ >;
+ };
+
+ uart1_pins: pinctrl-uart1-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+ MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+ MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+ MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+ /* BT_REG_ON */
+ MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x0
+ /* BT_WAKE_DEV */
+ MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x0
+ /* BT_WAKE_HOST */
+ MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x100
+ >;
+ };
+
+ uart2_pins: pinctrl-uart2-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ usdhc1_pins: pinctrl-usdhc1-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
+ /* wifi refclk */
+ MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x0
+ /* WL_REG_ON */
+ MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x0
+ /* WL_WAKE_HOST */
+ MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x100
+ >;
+ };
+
+ usdhc3_pins: pinctrl-usdhc3-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
+ >;
+ };
+
+ usdhc3_100mhz_pins: pinctrl-usdhc3-100mhz-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
+ >;
+ };
+
+ usdhc3_200mhz_pins: pinctrl-usdhc3-200mhz-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
+ >;
+ };
+
+ wdog1_pins: pinctrl-wdog1-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x140
+ >;
+ };
+};
+
+&pcie_phy {
+ fsl,clkreq-unsupported;
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
+ status = "okay";
+};
+
+/* assembly-option for AI accelerator on SoM, otherwise routed to carrier */
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
+ reset-gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ uart-has-rtscts;
+ /* select 80MHz parent clock to support maximum baudrate 4Mbps */
+ assigned-clocks = <&clk IMX8MM_CLK_UART1>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+ max-speed = <3000000>;
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usdhc1_pins>;
+ vmmc-supply = <&v_3_3>;
+ vqmmc-supply = <&v_1_8>;
+ bus-width = <4>;
+ mmc-pwrseq = <&usdhc1_pwrseq>;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&usdhc3_pins>;
+ pinctrl-1 = <&usdhc3_100mhz_pins>;
+ pinctrl-2 = <&usdhc3_200mhz_pins>;
+ vmmc-supply = <&v_3_3>;
+ vqmmc-supply = <&v_1_8>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wdog1_pins>;
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related
* [PATCH v2 10/11] arm64: dts: add description for solidrun solidsense-n8 board
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
Add description for the SolidRun SolidSense N8 Compact.
The board is designed around the i.MX8MN SoC and comes as a complete
product including enclosure and labels.
Features:
- USB-2.0 Type A connector
- 1Gbps RJ45 Ethernet with PoE
- microSD connector
- eMMC
- Cellular Modem + SIM holder
- WiFi + Bluetooth
- RS485
- CAN
- 802.15.1 radio
- supercapacitor backup power supply
This is a headless design without display.
The board includes an internal expansion connector for daughterboards
which may be described by dt addon.
The supercap is not currently described due to lack of suitable bindings.
Vendor BSP uses gpio-keys driver to trigger shutdown on power loss.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../dts/freescale/imx8mn-solidsense-n8-compact.dts | 853 +++++++++++++++++++++
2 files changed, 855 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index d414d0efe5e74..c56137097da3b 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -181,6 +181,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr3l-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-rve-gateway.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mn-solidsense-n8-compact.dtb
+DTC_FLAGS_imx8mn-solidsense-n8-compact += -@
dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts b/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts
new file mode 100644
index 0000000000000..93396e22ba409
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts
@@ -0,0 +1,853 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Device Tree file for SolidSense N8 Compact
+ *
+ * Copyright 2024 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "imx8mn.dtsi"
+
+/ {
+ model = "SolidRun SolidSense N8 Compact";
+ compatible = "solidrun,solidsense-n8-compact", "fsl,imx8mn";
+
+ aliases {
+ gpio5 = &expander;
+ rtc0 = &rtc;
+ rtc1 = &snvs_rtc;
+ usb0 = &usbotg1;
+ watchdog0 = &wdog1;
+ watchdog1 = &rtc;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ /* LED labels based on enclosure, schematic names differ. */
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ /* D20 */
+ led1 {
+ label = "led1";
+ gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ /* D18 */
+ led2 {
+ label = "led2";
+ gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ /* D19 */
+ led3 {
+ label = "led3";
+ gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ memory@40000000 {
+ reg = <0x0 0x40000000 0 0x80000000>;
+ device_type = "memory";
+ };
+
+ reg_modem_vbat: regulator-modem-vbat {
+ compatible = "regulator-fixed";
+ regulator-name = "modem-vbat";
+ pinctrl-names = "default";
+ pinctrl-0 = <®ulator_modem_vbat_pins>;
+ regulator-min-microvolt = <3800000>;
+ regulator-max-microvolt = <3800000>;
+ gpio = <&gpio3 25 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ /* power to lte modems behind hub ports 2/3 */
+ reg_modem_vbus: regulator-modem-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "modem-vbus";
+ pinctrl-names = "default";
+ pinctrl-0 = <®ulator_modem_vbus_pins>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio5 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ /* power to usb hub, and type-a behind hub port 1 */
+ reg_usb1_vbus: regulator-usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ pinctrl-names = "default";
+ pinctrl-0 = <®ulator_usb1_vbus_pins>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio5 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_vdd_1v8: regulator-vdd-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reg_vdd_3v3: regulator-vdd-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "usdhc2-vmmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <®ulator_usdhc2_vmmc_pins>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <®_vdd_3v3>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ off-on-delay-us = <250>;
+ };
+
+ rfkill {
+ compatible = "rfkill-gpio";
+ label = "rfkill-wwan";
+ radio-type = "wwan";
+ pinctrl-names = "default";
+ pinctrl-0 = <&modem_pins>;
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ usdhc1_pwrseq: usdhc1-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&A53_0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_1 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_2 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&A53_3 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&ddrc {
+ operating-points-v2 = <&ddrc_opp_table>;
+
+ ddrc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-266500000 {
+ opp-hz = /bits/ 64 <266500000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ };
+ };
+};
+
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ecspi2_pins>;
+ /* native chip-select causes reading 0xffffffff */
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ num-cs = <1>;
+ status = "okay";
+
+ can@0 {
+ compatible = "microchip,mcp2518fd";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&can_pins>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+ clocks = <&clk IMX8MN_CLK_CLKOUT1>;
+ /* generate 8MHz clock from soc-internal 24mhz reference */
+ assigned-clocks = <&clk IMX8MN_CLK_CLKOUT1_SEL>,
+ <&clk IMX8MN_CLK_CLKOUT1_DIV>;
+ assigned-clock-rates = <0>, <8000000>;
+ assigned-clock-parents = <&clk IMX8MN_CLK_24M>, <0>;
+ };
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fec1_pins>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy4>;
+ local-mac-address = [00 00 00 00 00 00];
+ fsl,magic-packet;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * Depending on board revision two different phys are used:
+ * - v1.1: atheros phy at address 4
+ * - v1.2+: analog devices phy at address 0
+ * Configure first version by default.
+ * On v1.2 and later, U-Boot will enable the correct phy
+ * based on runtime detection and patch dtb accordingly.
+ */
+
+ /* ADIN1300 */
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10>;
+ reset-deassert-us = <5000>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+ adi,link-st-polarity = <GPIO_ACTIVE_LOW>;
+ adi,led-polarity = <GPIO_ACTIVE_LOW>;
+ status = "disabled";
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_YELLOW>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ active-low;
+ };
+ };
+ };
+
+ /* AR8035 */
+ phy4: ethernet-phy@4 {
+ reg = <4>;
+ reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ status = "okay";
+ };
+ };
+};
+
+&gpio5 {
+ usb-hub-reset-hog {
+ gpio-hog;
+ gpios = <3 GPIO_ACTIVE_LOW>;
+ output-low; /* deasserted */
+ line-name = "usb-hub-reset";
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "okay";
+
+ pmic@4b {
+ compatible = "rohm,bd71847";
+ reg = <0x4b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ rohm,reset-snvs-powered;
+
+ #clock-cells = <0>;
+ clocks = <&osc_32k>;
+ clock-output-names = "clk-32k-out";
+
+ regulators {
+ BUCK1 {
+ // supplies soc vdd, soc mipi vdd @ 0.9V
+ regulator-name = "buck1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <1250>;
+ rohm,dvs-run-voltage = <850000>;
+ rohm,dvs-suspend-voltage = <750000>;
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "buck2";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <1250>;
+ rohm,dvs-run-voltage = <1000000>;
+ rohm,dvs-idle-voltage = <900000>;
+ rohm,dvs-suspend-voltage = <0>;
+ };
+
+ BUCK3 {
+ // BUCK5 in datasheet
+ // output floating
+ regulator-name = "buck3";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1350000>;
+ };
+
+ BUCK4 {
+ // BUCK6 in datasheet
+ // supplies ldo3, ldo5, muxsw
+ regulator-name = "buck4";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ BUCK5 {
+ // BUCK7 in datasheet
+ // supplies ldo4, ldo6, muxsw
+ // enables dram vpp @ 2.5V
+ regulator-name = "buck5";
+ regulator-min-microvolt = <1605000>;
+ regulator-max-microvolt = <1995000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ BUCK6 {
+ // BUCK8 in datasheet
+ // supplies dram @ 1.2V
+ regulator-name = "buck6";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ LDO1 {
+ // supplies soc snvs @ 1.8V
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ LDO2 {
+ // supplies soc snvs @ 0.8V
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <900000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ LDO3 {
+ // supplies soc vdd @ 1.8V
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ LDO4 {
+ // output floating
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ LDO5 {
+ // output floating
+ regulator-name = "ldo5";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ LDO6 {
+ // supplies soc vdd mipi @ 1.2V
+ regulator-name = "ldo6";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ /*
+ * routed to various connectors:
+ * - basler camera (CON2)
+ * - touchscreen (J3)
+ * - expansion connector (J14)
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "okay";
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+ status = "okay";
+
+ expander: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_expander_pins>;
+ reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "SYSGD", "PFO#", "CAPGD", "CAPFLT#",
+ "CHGEN#", "BSTEN#", "", "";
+ };
+
+ light-sensor@44 {
+ compatible = "isil,isl29023";
+ reg = <0x44>;
+ };
+
+ accelerometer@53 {
+ compatible = "adi,adxl345";
+ reg = <0x53>;
+ };
+
+ /* battery-charger@68 */
+
+ rtc: rtc@69 {
+ compatible = "abracon,abx80x";
+ reg = <0x69>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_pins>;
+ abracon,tc-diode = "schottky";
+ abracon,tc-resistor = <3>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&i2c4 {
+ /* routed to expansion connector (J14) */
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pins>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tamper_pins>, <&usb_hub_pins>;
+
+ ieee802151_radio_pins: pinctrl-ieee802151-radio-grp {
+ fsl,pins = <
+ /* RESETN */
+ MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x0
+ /* VDD_EN */
+ MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x0
+ /* SWDCLK */
+ MX8MN_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x0
+ /* SDIO */
+ MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x0
+ >;
+ };
+
+ can_pins: pinctrl-can-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SAI3_TXD_GPIO5_IO1 0x140
+ >;
+ };
+
+ ecspi2_pins: pinctrl-ecspi2-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x96
+ MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x1d6
+ MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x1d6
+ MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x1d6
+ >;
+ };
+
+ fec1_pins: pinctrl-fec1-grp {
+ /*
+ * Some pins are sampled at phy reset to apply configuration:
+ * - AR803x PHY (revision 1.1)
+ * - RXD[1:0]: phy address bits [1:0]
+ * - RXD[3:2],RX_CTL: mac interface select bits 3,1,0
+ * - ADIN1300 PHY (revision 1.2 or later)
+ * - RXD[3:0]: phy address bits [3:0]
+ * - RX_CTL,RXC: mac interface select bits 1,0
+ * SoC enables pull-down at reset, PHYs have internal
+ * pull-down, so pinmux may unset pull-enable.
+ */
+ fsl,pins = <
+ MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x2
+ MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x2
+ MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1e
+ MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1e
+ MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1e
+ MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1e
+ /* RD[3:0] sampled at phy reset for address bits [3:0] */
+ MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90
+ MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90
+ MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90
+ MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90
+ MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x10
+ MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90
+ MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90
+ MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x10
+ /* phy reset */
+ MX8MN_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x0
+ /* phy interrupt */
+ MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x140
+ >;
+ };
+
+ gpio_expander_pins: pinctrl-gpio-expander-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_NAND_READY_B_GPIO3_IO16 0x140
+ MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0x140
+ >;
+ };
+
+ i2c1_pins: pinctrl-i2c1-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c2
+ MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c2
+ >;
+ };
+
+ i2c2_pins: pinctrl-i2c2-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2
+ MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2
+ >;
+ };
+
+ i2c3_pins: pinctrl-i2c3-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
+ MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
+ >;
+ };
+
+ i2c4_pins: pinctrl-i2c4-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c2
+ MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c2
+ >;
+ };
+
+ led_pins: pinctrl-led-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x100
+ MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x100
+ MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x100
+ >;
+ };
+
+ modem_pins: pinctrl-modem-grp {
+ fsl,pins = <
+ /* RESET_N: modem-internal pull-down */
+ MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x0
+ /* PWRKEY: pull-down ensures always-on */
+ MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x100
+ >;
+ };
+
+ pmic_pins: pinctrl-pmic-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x140
+ >;
+ };
+
+ regulator_modem_vbat_pins: pinctrl-regulator-modem-vbat-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x0
+ >;
+ };
+
+ regulator_modem_vbus_pins: pinctrl-regulator-modem-vbus-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x0
+ >;
+ };
+
+ regulator_usb1_vbus_pins: pinctrl-regulator-usb1-vbus-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x0
+ >;
+ };
+
+ regulator_usdhc2_vmmc_pins: pinctrl-regulator-usdhc2-vmmc-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x0
+ >;
+ };
+
+ rtc_pins: pinctrl-rtc-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x140
+ MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x100
+ >;
+ };
+
+ tamper_pins: pinctrl-tamper-grp {
+ /*
+ * Routed to physical tamper input (J12),
+ * accelerometer and light-sensor interrupts.
+ */
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x140
+ >;
+ };
+
+ uart1_pins: pinctrl-uart1-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+ MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+ MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+ MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+ /* BT_REG_ON */
+ MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x0
+ /* BT_WAKE_DEV */
+ MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x0
+ /* BT_WAKE_HOST */
+ MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x100
+ >;
+ };
+
+ uart2_pins: pinctrl-uart2-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
+ MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
+ >;
+ };
+
+ uart3_pins: pinctrl-uart3-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DTE_RX 0x140
+ MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DTE_TX 0x140
+ MX8MN_IOMUXC_ECSPI1_MISO_UART3_DTE_RTS_B 0x140
+ MX8MN_IOMUXC_ECSPI1_SS0_UART3_DTE_CTS_B 0x140
+ >;
+ };
+
+ uart4_pins: pinctrl-uart4-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+ MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+ >;
+ };
+
+ usb_hub_pins: pinctrl-usb-hub-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3 0x0
+ >;
+ };
+
+ usdhc1_pins: pinctrl-usdhc1-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
+ MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
+ MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
+ MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
+ MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
+ MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
+ /* wifi refclk */
+ MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x0
+ /* WL_WAKE_HOST */
+ MX8MN_IOMUXC_SD1_DATA7_GPIO2_IO9 0x100
+ /* WL_REG_ON */
+ MX8MN_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x0
+ >;
+ };
+
+ usdhc2_pins: pinctrl-usdhc2-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
+ MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
+ MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
+ MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
+ MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
+ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
+ MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
+ /* usdhc2 signalling voltage pmic control */
+ MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x140
+ >;
+ };
+
+ usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
+ MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
+ MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
+ MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
+ MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
+ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
+ MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
+ /* usdhc2 signalling voltage pmic control */
+ MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x140
+ >;
+ };
+
+ usdhc2_200mhz_pins: pinctrl-usdhc2-100mhz-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
+ MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
+ MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
+ MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
+ MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
+ MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
+ MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0
+ /* usdhc2 signalling voltage pmic control */
+ MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x140
+ >;
+ };
+
+ usdhc3_pins: pinctrl-usdhc3-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
+ MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
+ MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
+ MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
+ MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
+ MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
+ MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
+ MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
+ MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
+ MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
+ >;
+ };
+
+ wdog1_pins: pinctrl-wdog1-grp {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x140
+ >;
+ };
+};
+
+/* Bluetooth */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ uart-has-rtscts;
+ /* select 80MHz parent clock to support maximum baudrate 4Mbps */
+ assigned-clocks = <&clk IMX8MN_CLK_UART1>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+ max-speed = <3000000>;
+ };
+};
+
+/* console */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
+/* RS485 */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ uart-has-rtscts;
+ linux,rs485-enabled-at-boot-time;
+ fsl,dte-mode;
+ status = "okay";
+};
+
+/* 802.15.1 radio */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins &ieee802151_radio_pins>;
+ status = "okay";
+};
+
+&usbotg1 {
+ vbus-supply = <®_usb1_vbus>;
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+/* WiFi */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usdhc1_pins>;
+ vmmc-supply = <®_vdd_3v3>;
+ vqmmc-supply = <®_vdd_1v8>;
+ bus-width = <4>;
+ mmc-pwrseq = <&usdhc1_pwrseq>;
+ status = "okay";
+};
+
+/* microSD */
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&usdhc2_pins>;
+ pinctrl-1 = <&usdhc2_100mhz_pins>;
+ pinctrl-2 = <&usdhc2_200mhz_pins>;
+ vmmc-supply = <®_usdhc2_vmmc>;
+ bus-width = <4>;
+ broken-cd;
+ status = "okay";
+};
+
+/* eMMC */
+&usdhc3 {
+ /*
+ * Use lowest drive strength for all high-speed modes to minimise
+ * electro-magnetic emissions.
+ * In this particular design HS-400 still works okay, no extra
+ * pinctrl for 100mhz and 200mhz are required.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&usdhc3_pins>;
+ vmmc-supply = <®_vdd_3v3>;
+ vqmmc-supply = <®_vdd_1v8>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wdog1_pins>;
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related
* [PATCH v2 05/11] drm/panel: ronbo-rb070d30: fix warning with gpio controllers that sleep
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
The ronbo-rb070d30 controles the various gpios for reset, standby,
vertical and horizontal flip using the non-sleeping gpiod_set_value()
function.
When the connected gpio controller needs to sleep as is common for i2c
based expanders, this causes noisy complaints in kernel log.
Control of these gpios is not time-critical, switch to the
gpiod_set_value_cansleep() variant.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
drivers/gpu/drm/panel/panel-ronbo-rb070d30.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
index ad35d0fb0a167..c3fbc459c7e0d 100644
--- a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
+++ b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c
@@ -54,9 +54,9 @@ static int rb070d30_panel_prepare(struct drm_panel *panel)
}
msleep(20);
- gpiod_set_value(ctx->gpios.power, 1);
+ gpiod_set_value_cansleep(ctx->gpios.power, 1);
msleep(20);
- gpiod_set_value(ctx->gpios.reset, 1);
+ gpiod_set_value_cansleep(ctx->gpios.reset, 1);
msleep(20);
return 0;
}
@@ -65,8 +65,8 @@ static int rb070d30_panel_unprepare(struct drm_panel *panel)
{
struct rb070d30_panel *ctx = panel_to_rb070d30_panel(panel);
- gpiod_set_value(ctx->gpios.reset, 0);
- gpiod_set_value(ctx->gpios.power, 0);
+ gpiod_set_value_cansleep(ctx->gpios.reset, 0);
+ gpiod_set_value_cansleep(ctx->gpios.power, 0);
regulator_disable(ctx->supply);
return 0;
--
2.51.0
^ permalink raw reply related
* [PATCH v2 09/11] arm64: dts: add description for solidrun imx8mp hummingboard-iiot
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
Add description for the SolidRun i.MX8MP HummingBoard IIoT.
The board is a new design around the i.MX8MP System on Module, not
sharing much with previous HummingBoards.
It comes with some common features:
- 3x USB-3.0 Type A connector
- 2x 1Gbps RJ45 Ethernet
- USB Type-C Console Port
- microSD connector
- RTC with backup battery
- RGB Status LED
- 1x M.2 M-Key connector with PCI-E Gen. 3 x1
- 1x M.2 B-Key connector with USB-2.0/3.0 + SIM card holder
- 1x LVDS Display Connector
- 1x DSI Display Connector
- GPIO header
- 2x RS232/RS485 ports (configurable)
- 2x CAN
In addition there is a board-to-board expansion connector to support
custom daughter boards with access to SPI, a range of GPIOs and -
notably - CAN and UART. Both 2x CAN and 2x UART can be muxed either
to this b2b connector, or a termianl block connector on the base board.
The routing choice for UART and CAN is expressed through gpio
mux-controllers in DT and can be changed by applying dtb addons.
Four dtb addons are provided:
- dsi panel Winstar WJ70N3TYJHMNG0
- lvds panel Winstar WF70A8SYJHLNGA
- RS485 on UART port "A" (default rs232)
- RS485 on UART port "B" (default rs232)
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/Makefile | 6 +
...hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso | 69 ++
...ummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtso | 105 +++
.../imx8mp-hummingboard-iiot-rs485-a.dtso | 18 +
.../imx8mp-hummingboard-iiot-rs485-b.dtso | 18 +
.../dts/freescale/imx8mp-hummingboard-iiot.dts | 712 +++++++++++++++++++++
6 files changed, 928 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 8bda6fb0ff9c1..d414d0efe5e74 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -207,6 +207,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-iiot.dtb
+DTC_FLAGS_imx8mp-hummingboard-iiot := -@
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-iiot-rs485-a.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-iiot-rs485-b.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-mate.dtb
DTC_FLAGS_imx8mp-hummingboard-mate := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pro.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
new file mode 100644
index 0000000000000..e66ee2ce69d8d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT MIPI-DSI connector
+ * with Winstar WJ70N3TYJHMNG0 panel.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&{/} {
+ dsi_backlight: dsi-backlight {
+ compatible = "gpio-backlight";
+ gpios = <&tca6408_u48 3 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&i2c_dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@41 {
+ compatible = "ilitek,ili2130";
+ reg = <0x41>;
+ reset-gpios = <&tca6408_u48 6 GPIO_ACTIVE_LOW>;
+ interrupts-extended = <&tca6416_u21 13 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&lcdif1 {
+ status = "okay";
+};
+
+&mipi_dsi {
+ samsung,esc-clock-frequency = <10000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ panel@0 {
+ /* This is a Winstar panel, but the ronbo panel uses same controls. */
+ compatible = "ronbo,rb070d30";
+ reg = <0>;
+ vcc-lcd-supply = <®_dsi_panel>;
+ power-gpios = <&tca6408_u48 2 GPIO_ACTIVE_HIGH>;
+ /* reset is active-low but driver inverts it internally */
+ reset-gpios = <&tca6408_u48 1 GPIO_ACTIVE_HIGH>;
+ updn-gpios = <&tca6408_u48 5 GPIO_ACTIVE_HIGH>;
+ shlr-gpios = <&tca6408_u48 4 GPIO_ACTIVE_LOW>;
+ backlight = <&dsi_backlight>;
+
+ port {
+ panel_from_dsim: endpoint {
+ remote-endpoint = <&dsim_to_panel>;
+ };
+ };
+ };
+
+ port@1 {
+ dsim_to_panel: endpoint {
+ remote-endpoint = <&panel_from_dsim>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtso b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtso
new file mode 100644
index 0000000000000..f8fb7fd0e4e49
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtso
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT LVDS connector
+ * with Winstar WF70A8SYJHLNGA panel.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&{/} {
+ lvds_backlight: lvds-backlight {
+ compatible = "gpio-backlight";
+ gpios = <&tca6408_u37 3 GPIO_ACTIVE_LOW>;
+ };
+
+ panel-lvds {
+ compatible = "winstar,wf70a8syjhlnga", "panel-lvds";
+ backlight = <&lvds_backlight>;
+ power-supply = <®_dsi_panel>;
+ enable-gpios = <&tca6408_u37 2 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tca6408_u37 1 GPIO_ACTIVE_HIGH>;
+ data-mapping = "vesa-24";
+ width-mm = <154>;
+ height-mm = <86>;
+
+ panel-timing {
+ /*
+ * Note: NXP BSP hard-codes 74MHz clock in ldb driver:
+ * drivers/gpu/drm/imx/imx8mp-ldb.c
+ * SolidRun BSP carries patch.
+ */
+ clock-frequency = <49500000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hfront-porch = <40>;
+ hback-porch = <144>;
+ hsync-len = <104>;
+ hsync-active = <0>;
+ vfront-porch = <3>;
+ vback-porch = <11>;
+ vsync-len = <10>;
+ vsync-active = <1>;
+ de-active = <1>;
+ };
+
+ port {
+ panel_from_lvds: endpoint {
+ remote-endpoint = <&lvds_ch0_out>;
+ };
+ };
+ };
+};
+
+&i2c_lvds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touchscreen@41 {
+ compatible = "ilitek,ili2130";
+ reg = <0x41>;
+ reset-gpios = <&tca6408_u37 6 GPIO_ACTIVE_LOW>;
+ interrupts-extended = <&tca6416_u21 13 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&lcdif2 {
+ status = "okay";
+};
+
+&lvds_bridge {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@1 {
+ lvds_ch0_out: endpoint {
+ remote-endpoint = <&panel_from_lvds>;
+ };
+ };
+ };
+};
+
+&tca6408_u37 {
+ lvds-lr-hog {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "lvds-l/r";
+ };
+
+ lvds-ud-hog {
+ gpio-hog;
+ gpios = <5 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "lvds-u/d";
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-a.dtso b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-a.dtso
new file mode 100644
index 0000000000000..7bbf800b78fb1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-a.dtso
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT on-board RS485 Port A on connector J5004.
+ */
+
+/dts-v1/;
+/plugin/;
+
+&uart3_rs_232_485_mux {
+ /* select rs485 */
+ idle-state = <1>;
+};
+
+&uart3 {
+ linux,rs485-enabled-at-boot-time;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-b.dtso b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-b.dtso
new file mode 100644
index 0000000000000..d4bfea886ad12
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-b.dtso
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ *
+ * Overlay for enabling HummingBoard IIoT on-board RS485 Port B on connector J5004.
+ */
+
+/dts-v1/;
+/plugin/;
+
+&uart4_rs_232_485_mux {
+ /* select rs485 */
+ idle-state = <1>;
+};
+
+&uart4 {
+ linux,rs485-enabled-at-boot-time;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts
new file mode 100644
index 0000000000000..486314c2b9780
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts
@@ -0,0 +1,712 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024 Yazan Shhady <yazan.shhady@solid-run.com>
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+
+#include "imx8mp-sr-som.dtsi"
+
+/ {
+ model = "SolidRun i.MX8MP HummingBoard IIoT";
+ compatible = "solidrun,imx8mp-hummingboard-iiot",
+ "solidrun,imx8mp-sr-som", "fsl,imx8mp";
+
+ aliases {
+ ethernet0 = &eqos; /* J10 */
+ ethernet1 = &fec; /* J11 */
+ rtc0 = &carrier_rtc;
+ rtc1 = &snvs_rtc;
+ gpio5 = &tca6408_u48;
+ gpio6 = &tca6408_u37;
+ gpio7 = &tca6416_u20;
+ gpio8 = &tca6416_u21;
+ i2c6 = &i2c_exp;
+ i2c7 = &i2c_csi;
+ i2c8 = &i2c_dsi;
+ i2c9 = &i2c_lvds;
+ };
+
+ v_1_2: regulator-1-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "1v2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reg_dsi_panel: regulator-dsi-panel {
+ compatible = "regulator-fixed";
+ regulator-name = "dsi-panel";
+ regulator-min-microvolt = <11200000>;
+ regulator-max-microvolt = <11200000>;
+ gpios = <&tca6416_u20 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ /* power for M.2 B-Key connector (J6) */
+ regulator-m2-b {
+ compatible = "regulator-fixed";
+ regulator-name = "m2-b";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpios = <&tca6416_u20 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ /* power for M.2 M-Key connector (J4) */
+ regulator-m2-m {
+ compatible = "regulator-fixed";
+ regulator-name = "m2-m";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpios = <&tca6416_u20 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ vmmc: regulator-mmc {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vmmc_pins>;
+ regulator-name = "vmmc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ startup-delay-us = <250>;
+ };
+
+ /* power for USB-A J5003 */
+ vbus1: regulator-vbus-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus1";
+ gpio = <&tca6416_u20 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ /* power for USB-A J27 behind USB Hub Port 3 */
+ regulator-vbus-2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus2";
+ gpio = <&tca6416_u20 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ /* power for USB-A J27 behind USB Hub Port 4 */
+ regulator-vbus-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vbus3";
+ gpio = <&tca6416_u20 13 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ rfkill-m2-b-gnss {
+ compatible = "rfkill-gpio";
+ label = "m2-b gnss";
+ radio-type = "gps";
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&tca6416_u20 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ rfkill-m2-b-wwan {
+ compatible = "rfkill-gpio";
+ label = "m2-b radio";
+ radio-type = "wwan";
+ /* rfkill-gpio inverts internally */
+ shutdown-gpios = <&tca6416_u20 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ flexcan1_flexcan2_b2b_mux: mux-controller-0 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches both flexcan1 and flexcan2 tx/rx between
+ * expansion connector (J22) and on-board transceivers
+ * using one GPIO: 0 = on-board, 1 connector.
+ */
+ mux-gpios = <&tca6416_u20 3 GPIO_ACTIVE_HIGH>;
+ /* default on-board */
+ idle-state = <0>;
+ };
+
+ mux-controller-1 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches can bus between different SoM board-to-board
+ * connector pins which is used to support different SoMs.
+ * i.MX8M Plus uses J7-12/16 and J9-54/56 for 2x flexcan.
+ */
+ mux-gpios = <&tca6416_u20 4 GPIO_ACTIVE_HIGH>;
+ idle-state = <1>;
+ };
+
+ spi_mux: mux-controller-2 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches spi bus between on-board tpm
+ * and expansion connector (J22).
+ */
+ mux-gpios = <&tca6416_u21 0 GPIO_ACTIVE_HIGH>;
+ /* default on-board */
+ idle-state = <0>;
+ };
+
+ uart3_uart4_b2b_mux: mux-controller-3 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches both uart3 and uart4 tx/rx between expansion
+ * connector (J22) and on-board rs232/rs485 transceivers
+ * using one GPIO: 0 = on-board, 1 connector.
+ */
+ mux-gpios = <&tca6416_u20 0 GPIO_ACTIVE_HIGH>;
+ /* default on-board */
+ idle-state = <0>;
+ };
+
+ uart3_rs_232_485_mux: mux-controller-4 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches uart3 tx/rx between rs232 and rs485
+ * transceivers. using one GPIO: 0 = rs232; 1 = rs485.
+ */
+ mux-gpios = <&tca6416_u20 1 GPIO_ACTIVE_HIGH>;
+ /* default rs232 */
+ idle-state = <0>;
+ };
+
+ uart4_rs_232_485_mux: mux-controller-5 {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * Mux switches uart4 tx/rx between rs232 and rs485
+ * transceivers. using one GPIO: 0 = rs232; 1 = rs485.
+ */
+ mux-gpios = <&tca6416_u20 2 GPIO_ACTIVE_HIGH>;
+ /* default rs232 */
+ idle-state = <0>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ wakeup-event {
+ label = "m2-m-wakeup";
+ interrupts-extended = <&tca6416_u21 11 IRQ_TYPE_EDGE_FALLING>;
+ linux,code = <KEY_WAKEUP>;
+ wakeup-source;
+ };
+ };
+};
+
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ecspi2_pins>;
+ num-cs = <1>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ ecspi2_muxed: spi@0 {
+ compatible = "spi-mux";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ /* mux bandwidth is 2GHz, soc max. spi clock is 166MHz */
+ spi-max-frequency = <166000000>;
+ mux-controls = <&spi_mux>;
+
+ tpm@0 {
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <43000000>;
+ reset-gpios = <&tca6416_u21 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ interrupts-extended = <&tca6416_u21 9 IRQ_TYPE_EDGE_FALLING>;
+ };
+ };
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can1_pins>;
+ status = "okay";
+
+ can-transceiver {
+ max-bitrate = <8000000>;
+ };
+};
+
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can2_pins>;
+ status = "okay";
+
+ can-transceiver {
+ max-bitrate = <8000000>;
+ };
+};
+
+&i2c2 {
+ i2c-mux@70 {
+ compatible = "nxp,pca9546";
+ reg = <0x70>;
+ /*
+ * This reset is open drain,
+ * but reset core does not support GPIO_OPEN_DRAIN flag.
+ */
+ reset-gpios = <&tca6416_u21 2 GPIO_ACTIVE_LOW>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* channel 0 routed to expansion connector (J22) */
+ i2c_exp: i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* channel 1 routed to mipi-csi connector (J23) */
+ i2c_csi: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ /* channel 2 routed to mipi-dsi connector (J25) */
+ i2c_dsi: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tca6408_u48: gpio@21 {
+ compatible = "ti,tca6408";
+ reg = <0x21>;
+ /*
+ * reset shared between U37 and U48, to be
+ * supported once gpio-pca953x switches to
+ * reset framework.
+ *
+ * reset-gpios = <&tca6416_u21 4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+ */
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "CAM_RST#", "DSI_RESET",
+ "DSI_STBYB", "DSI_PWM_BL",
+ "DSI_L/R", "DSI_U/D",
+ "DSI_CTP_/RST", "CAM_TRIG";
+ };
+ };
+
+ /* channel 2 routed to lvds connector (J24) */
+ i2c_lvds: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tca6408_u37: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ /*
+ * reset shared between U37 and U48, to be
+ * supported once gpio-pca953x switches to
+ * reset framework.
+ *
+ * reset-gpios = <&tca6416_u21 4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+ */
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "SELB", "LVDS_RESET",
+ "LVDS_STBYB", "LVDS_PWM_BL",
+ "LVDS_L/R", "LVDS_U/D",
+ "LVDS_CTP_/RST", "";
+ };
+ };
+ };
+};
+
+&i2c3 {
+ /* highest i2c clock supported by all peripherals is 400kHz */
+ clock-frequency = <400000>;
+
+ tca6416_u20: gpio@20 {
+ /*
+ * This is a TI TCAL6416 using same programming model as
+ * NXP PCAL6416, not to be confused with TI TCA6416.
+ */
+ compatible = "nxp,pcal6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "TCA_INT/EXT_UART", "TCA_UARTA_232/485",
+ "TCA_UARTB_232/485", "TCA_INT/EXT_CAN",
+ "TCA_NXP/REN", "TCA_M.2B_3V3_EN",
+ "TCA_M.2M_3V3_EN", "TCA_M.2M_RESET#",
+ "TCA_M.2B_RESET#", "TCA_M.2B_W_DIS#",
+ "TCA_M.2B_GPS_EN#", "TCA_USB-HUB_RST#",
+ "TCA_USB_HUB3_PWR_EN", "TCA_USB_HUB4_PWR_EN",
+ "TCA_USB1_PWR_EN", "TCA_VIDEO_PWR_EN";
+
+ m2-b-reset-hog {
+ gpio-hog;
+ gpios = <8 GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "m2-b-reset";
+ };
+ };
+
+ tca6416_u21: gpio@21 {
+ /*
+ * This is a TI TCAL6416 using same programming model as
+ * NXP PCAL6416, not to be confused with TI TCA6416.
+ */
+ compatible = "nxp,pcal6416";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&tca6416_u21_int_pins>;
+ interrupts-extended = <&gpio1 15 IRQ_TYPE_EDGE_FALLING>;
+ gpio-line-names = "TCA_SPI_TPM/EXT", "TCA_TPM_RST#",
+ "TCA_I2C_RST", "TCA_RS232_SHTD#",
+ "TCA_LCD_I2C_RST", "TCA_DIG_OUT1",
+ "TCA_bDIG_IN1", "TCA_SENS_INT",
+ "TCA_ALERT#", "TCA_TPM_PIRQ#",
+ "TCA_RTC_INT", "TCA_M.2M_WAKW_ON_LAN",
+ "TCA_M.2M_CLKREQ#", "TCA_LVDS_INT#",
+ "", "TCA_POE_AT";
+
+ rs232_shutdown: rs232-shutdown-hog {
+ gpio-hog;
+ gpios = <3 GPIO_ACTIVE_LOW>;
+ output-low;
+ line-name = "rs232-shutdown";
+ };
+
+ lcd-i2c-reset-hog {
+ /*
+ * reset shared between U37 and U48, to be
+ * supported once gpio-pca953x switches to
+ * reset framework.
+ */
+ gpio-hog;
+ gpios = <4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+ output-low;
+ line-name = "lcd-i2c-reset";
+ };
+
+ m2-m-clkreq-hog {
+ gpio-hog;
+ gpios = <12 GPIO_ACTIVE_LOW>;
+ input;
+ line-name = "m2-m-clkreq";
+ };
+ };
+
+ led-controller@30 {
+ compatible = "ti,lp5562";
+ reg = <0x30>;
+ /* use internal clock, could use external generated by rtc */
+ clock-mode = /bits/ 8 <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ multi-led@0 {
+ reg = <0x0>;
+ label = "D7";
+ color = <LED_COLOR_ID_RGB>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0x0>;
+ color = <LED_COLOR_ID_RED>;
+ led-cur = /bits/ 8 <0x32>;
+ max-cur = /bits/ 8 <0x64>;
+ };
+
+ led@1 {
+ reg = <0x1>;
+ color = <LED_COLOR_ID_GREEN>;
+ led-cur = /bits/ 8 <0x19>;
+ max-cur = /bits/ 8 <0x32>;
+ };
+
+ led@2 {
+ reg = <0x2>;
+ color = <LED_COLOR_ID_BLUE>;
+ led-cur = /bits/ 8 <0x19>;
+ max-cur = /bits/ 8 <0x32>;
+ };
+ };
+
+ led@3 {
+ reg = <3>;
+ chan-name = "D8";
+ label = "D8";
+ color = <LED_COLOR_ID_GREEN>;
+ led-cur = /bits/ 8 <0x19>;
+ max-cur = /bits/ 8 <0x64>;
+ };
+ };
+
+ light-sensor@44 {
+ compatible = "isil,isl29023";
+ reg = <0x44>;
+ /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
+ interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_EDGE_FALLING>;
+ };
+
+ accelerometer@53 {
+ compatible = "adi,adxl345";
+ reg = <0x53>;
+ /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
+ interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_EDGE_FALLING>;
+ };
+
+ carrier_eeprom: eeprom@57{
+ compatible = "atmel,24c02";
+ reg = <0x57>;
+ pagesize = <8>;
+ };
+
+ carrier_rtc: rtc@69 {
+ compatible = "abracon,ab1805";
+ reg = <0x69>;
+ abracon,tc-diode = "schottky";
+ abracon,tc-resistor = <3>;
+ interrupts-extended = <&tca6416_u21 10 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&iomuxc {
+ can1_pins: pinctrl-can1-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
+ MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
+ >;
+ };
+
+ can2_pins: pinctrl-can2-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154
+ MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154
+ >;
+ };
+
+ ecspi2_pins: pinctrl-ecspi2-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
+ MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
+ MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
+ MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
+ >;
+ };
+
+ tca6416_u21_int_pins: pinctrl-tca6416-u21-int-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x0
+ >;
+ };
+
+ /* UARTA */
+ uart3_pins: pinctrl-uart3-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
+ MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
+ MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140
+ >;
+ };
+
+ /* UARTB */
+ uart4_pins: pinctrl-uart4-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_DATA00__UART4_DCE_RX 0x140
+ MX8MP_IOMUXC_NAND_DATA01__UART4_DCE_TX 0x140
+ MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140
+ >;
+ };
+
+ usdhc2_pins: pinctrl-usdhc2-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
+ MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
+ >;
+ };
+
+ usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
+ MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
+ >;
+ };
+
+ usdhc2_200mhz_pins: pinctrl-usdhc2-200mhz-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x140
+ MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B 0x140
+ >;
+ };
+
+ vmmc_pins: pinctrl-vmmc-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x0
+ >;
+ };
+};
+
+&pcie {
+ reset-gpio = <&tca6416_u20 7 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+/* M.2 M-Key (J4) */
+&pcie_phy {
+ clocks = <&hsio_blk_ctrl>;
+ clock-names = "ref";
+ fsl,clkreq-unsupported;
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
+ status = "okay";
+};
+
+&phy0 {
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* ADIN1300 LED_0 pin */
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+};
+
+&phy1 {
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* ADIN1300 LED_0 pin */
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ rts-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+ /* select 80MHz parent clock to support maximum baudrate 4Mbps */
+ assigned-clocks = <&clk IMX8MP_CLK_UART3>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+ rts-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
+ /* select 80MHz parent clock to support maximum baudrate 4Mbps */
+ assigned-clocks = <&clk IMX8MP_CLK_UART4>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+ status = "okay";
+};
+
+&usb3_phy0 {
+ fsl,phy-tx-preemp-amp-tune-microamp = <1200>;
+ vbus-supply = <&vbus1>;
+ status = "okay";
+};
+
+&usb3_0 {
+ status = "okay";
+};
+
+&usb3_phy1 {
+ status = "okay";
+};
+
+&usb3_1 {
+ status = "okay";
+};
+
+&usb_dwc3_0 {
+ dr_mode = "host";
+};
+
+&usb_dwc3_1 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub_2_0: hub@1 {
+ compatible = "usb4b4,6502", "usb4b4,6506";
+ reg = <1>;
+ peer-hub = <&hub_3_0>;
+ reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&v_1_2>;
+ vdd2-supply = <&v_3_3>;
+ };
+
+ hub_3_0: hub@2 {
+ compatible = "usb4b4,6500", "usb4b4,6504";
+ reg = <2>;
+ peer-hub = <&hub_2_0>;
+ reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&v_1_2>;
+ vdd2-supply = <&v_3_3>;
+ };
+};
+
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&usdhc2_pins>;
+ pinctrl-1 = <&usdhc2_100mhz_pins>;
+ pinctrl-2 = <&usdhc2_200mhz_pins>;
+ vmmc-supply = <&vmmc>;
+ bus-width = <4>;
+ cap-power-off-card;
+ full-pwr-cycle;
+ status = "okay";
+};
--
2.51.0
^ permalink raw reply related
* [PATCH v2 08/11] arm64: dts: imx8mp-sr-som: build dtbs with symbols for overlay support
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
Build all dtbs based on SolidRun i.MX8MP SoM with symbols (adding -@ to
dtc flags) to enable support for device-tree addons.
The SoM has a camera connector for basler cameras that can be enabled by
downstream dtbo.
Hence by extension all boards based on this SoM should support addons.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/Makefile | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 525ef180481d3..8bda6fb0ff9c1 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -197,6 +197,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-helios-lvds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-proton2s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-cubox-m.dtb
+DTC_FLAGS_imx8mp-cubox-m := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-som-a-bmb-08.dtb
@@ -207,9 +208,13 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-mate.dtb
+DTC_FLAGS_imx8mp-hummingboard-mate := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pro.dtb
+DTC_FLAGS_imx8mp-hummingboard-pro := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-pulse.dtb
+DTC_FLAGS_imx8mp-hummingboard-pulse := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-ripple.dtb
+DTC_FLAGS_imx8mp-hummingboard-ripple := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-bl-osm-s.dtb
--
2.51.0
^ permalink raw reply related
* [PATCH v2 06/11] arm64: dts: imx8mp-hummingboard-pulse/cubox-m: fix vmmc gpio polarity
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
Fix the polarity in vmmc regulator node for the gpio from active-high to
active-low. This is a cosmetic change as regulator default to active-low
unless property enable-active-high was also specified - ignoring the
flag on gpio handle.
Fixes: a009c0c66ecb ("arm64: dts: add description for solidrun imx8mp som and cubox-m")
Fixes: 2a222aa2bee9 ("arm64: dts: add description for solidrun imx8mp hummingboard variants")
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts b/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts
index 8290f187b79fd..7bc213499f094 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts
@@ -68,7 +68,7 @@ vmmc: regulator-mmc {
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;
startup-delay-us = <250>;
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi
index 825ad6a2ba14e..5b8c8489713c4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi
@@ -73,7 +73,7 @@ vmmc: regulator-mmc {
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_LOW>;
startup-delay-us = <250>;
};
--
2.51.0
^ permalink raw reply related
* [PATCH v2 03/11] dt-bindings: panel: lvds: add Winstar WF70A8SYJHLNGA
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
Add Winstar WF70A8SYJHLNGA 7 inch WSVGA lvds panel.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
Documentation/devicetree/bindings/display/panel/panel-lvds.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml
index 4388d5375851a..dbc01e6408958 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml
@@ -59,6 +59,8 @@ properties:
# Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LCD LVDS panel
- jenson,bl-jt60050-01a
- tbs,a711-panel
+ # Winstar WF70A8SYJHLNGA 7" WSVGA (1024x600) color TFT LCD LVDS panel
+ - winstar,wf70a8syjhlnga
- const: panel-lvds
--
2.51.0
^ permalink raw reply related
* [PATCH v2 07/11] arm64: dts: imx8mp-hummingboard-pulse: fix mini-hdmi dsi port reference
From: Josua Mayer @ 2025-11-07 11:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Neil Armstrong, Jessica Zhang, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
Dmitry Torokhov, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Laurent Pinchart, Lad Prabhakar, Thierry Reding
Cc: Jon Nettleton, Mikhail Anikin, Yazan Shhady, devicetree,
linux-kernel, dri-devel, linux-input, imx, linux-arm-kernel,
Josua Mayer
In-Reply-To: <20251107-imx8mp-hb-iiot-v2-0-d8233ded999e@solid-run.com>
imx8mp.dtsi includes a default port@1 node with an empty placeholder
endpoint intended for linking to a dsi bridge or panel.
HummingBoard Pulse mini-hdmi dtsi added and linked hdmi brodge to yet
another endpoint.
This duplicate endpoint can cause dsi_attach to fail.
Remove the duplicate node and link to the one defined in soc dtsi.
Further remove the unnecessary attach-bridge property.
Fixes: 2a222aa2bee9 ("arm64: dts: add description for solidrun imx8mp hummingboard variants")
Signed-off-by Josua Mayer <josua@solid-run.com>
---
.../dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi
index 46916ddc05335..0e5f4607c7c1b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-mini-hdmi.dtsi
@@ -41,7 +41,7 @@ port@0 {
reg = <0>;
adv7535_from_dsim: endpoint {
- remote-endpoint = <&dsim_to_adv7535>;
+ remote-endpoint = <&mipi_dsi_out>;
};
};
@@ -71,11 +71,8 @@ &lcdif1 {
&mipi_dsi {
samsung,esc-clock-frequency = <10000000>;
status = "okay";
+};
- port@1 {
- dsim_to_adv7535: endpoint {
- remote-endpoint = <&adv7535_from_dsim>;
- attach-bridge;
- };
- };
+&mipi_dsi_out {
+ remote-endpoint = <&adv7535_from_dsim>;
};
--
2.51.0
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox