* [PATCH] iommupt: Avoid a compiler bug with sw_bit
@ 2025-11-26 19:21 Jason Gunthorpe
2025-11-27 13:16 ` Joerg Roedel
0 siblings, 1 reply; 2+ messages in thread
From: Jason Gunthorpe @ 2025-11-26 19:21 UTC (permalink / raw)
To: iommu, Joerg Roedel, Robin Murphy, Will Deacon
Cc: Lu Baolu, Joerg Roedel, Kevin Tian, kernel test robot, patches,
Tina Zhang
gcc 13, in some cases, gets confused if the __builtin_constant_p() is
inside the switch. It thinks that bitnr can have the value max+1 and
fails. Lift the check outside the switch to avoid it.
Fixes: ef7bfe5bbffd ("iommupt/x86: Support SW bits and permit PT_FEAT_DMA_INCOHERENT")
Fixes: 5448c1558f60 ("iommupt: Add the Intel VT-d second stage page table format")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202511242012.I7g504Ab-lkp@intel.com/
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
drivers/iommu/generic_pt/fmt/vtdss.h | 8 ++++----
drivers/iommu/generic_pt/fmt/x86_64.h | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
Seems to need a specific randconfig to fail, my normal ones don't, nor has 0
day found this on its randconfigs till now.
diff --git a/drivers/iommu/generic_pt/fmt/vtdss.h b/drivers/iommu/generic_pt/fmt/vtdss.h
index d9774848eb6f7f..50ffed9d0e508f 100644
--- a/drivers/iommu/generic_pt/fmt/vtdss.h
+++ b/drivers/iommu/generic_pt/fmt/vtdss.h
@@ -174,6 +174,9 @@ static inline unsigned int vtdss_pt_max_sw_bit(struct pt_common *common)
static inline u64 vtdss_pt_sw_bit(unsigned int bitnr)
{
+ if (__builtin_constant_p(bitnr) && bitnr > 10)
+ BUILD_BUG();
+
/* Bits marked Ignored in the specification */
switch (bitnr) {
case 0:
@@ -184,10 +187,7 @@ static inline u64 vtdss_pt_sw_bit(unsigned int bitnr)
return BIT_ULL(63);
/* Some bits in 9-3 are available in some entries */
default:
- if (__builtin_constant_p(bitnr))
- BUILD_BUG();
- else
- PT_WARN_ON(true);
+ PT_WARN_ON(true);
return 0;
}
}
diff --git a/drivers/iommu/generic_pt/fmt/x86_64.h b/drivers/iommu/generic_pt/fmt/x86_64.h
index a86353f1481e5c..507abf2c934ccb 100644
--- a/drivers/iommu/generic_pt/fmt/x86_64.h
+++ b/drivers/iommu/generic_pt/fmt/x86_64.h
@@ -175,6 +175,9 @@ static inline unsigned int x86_64_pt_max_sw_bit(struct pt_common *common)
static inline u64 x86_64_pt_sw_bit(unsigned int bitnr)
{
+ if (__builtin_constant_p(bitnr) && bitnr > 12)
+ BUILD_BUG();
+
/* Bits marked Ignored/AVL in the specification */
switch (bitnr) {
case 0:
@@ -185,10 +188,7 @@ static inline u64 x86_64_pt_sw_bit(unsigned int bitnr)
return BIT_ULL((bitnr - 2) + 52);
/* Some bits in 8,6,4,3 are available in some entries */
default:
- if (__builtin_constant_p(bitnr))
- BUILD_BUG();
- else
- PT_WARN_ON(true);
+ PT_WARN_ON(true);
return 0;
}
}
base-commit: 93d0836a0e54f678a3814cf07fa1339fe6cce4d7
--
2.43.0
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] iommupt: Avoid a compiler bug with sw_bit
2025-11-26 19:21 [PATCH] iommupt: Avoid a compiler bug with sw_bit Jason Gunthorpe
@ 2025-11-27 13:16 ` Joerg Roedel
0 siblings, 0 replies; 2+ messages in thread
From: Joerg Roedel @ 2025-11-27 13:16 UTC (permalink / raw)
To: Jason Gunthorpe
Cc: iommu, Robin Murphy, Will Deacon, Lu Baolu, Joerg Roedel,
Kevin Tian, kernel test robot, patches, Tina Zhang
On Wed, Nov 26, 2025 at 03:21:27PM -0400, Jason Gunthorpe wrote:
> gcc 13, in some cases, gets confused if the __builtin_constant_p() is
> inside the switch. It thinks that bitnr can have the value max+1 and
> fails. Lift the check outside the switch to avoid it.
>
> Fixes: ef7bfe5bbffd ("iommupt/x86: Support SW bits and permit PT_FEAT_DMA_INCOHERENT")
> Fixes: 5448c1558f60 ("iommupt: Add the Intel VT-d second stage page table format")
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202511242012.I7g504Ab-lkp@intel.com/
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---
> drivers/iommu/generic_pt/fmt/vtdss.h | 8 ++++----
> drivers/iommu/generic_pt/fmt/x86_64.h | 8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)
Applied, thanks.
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