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X-CSE-ConnectionGUID: 15NBFeNeTBGGjq5ayT5Akw== X-CSE-MsgGUID: Y6CHgOZ4Rn2oBRsvdHCkaw== X-IronPort-AV: E=McAfee;i="6700,10204,11447"; a="50544725" X-IronPort-AV: E=Sophos;i="6.15,323,1739865600"; d="scan'208";a="50544725" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2025 22:48:08 -0700 X-CSE-ConnectionGUID: TzcTpfEJQHqTsY/iq2IYCA== X-CSE-MsgGUID: uDsb0xsWQBODW/jOq8l+/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,323,1739865600"; d="scan'208";a="180660749" Received: from yisun1-mobl.ccr.corp.intel.com (HELO [10.238.129.118]) ([10.238.129.118]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2025 22:48:06 -0700 Message-ID: <01e5d0a9-715a-48d4-a2a4-2a0b5d99149b@linux.intel.com> Date: Thu, 29 May 2025 13:48:03 +0800 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] iommu/vt-d: Remove the redundant logic in first_level_by_default() To: Wei Wang , baolu.lu@linux.intel.com, kevin.tian@intel.com, yi.l.liu@intel.com, dwmw2@infradead.org, jroedel@suse.de, linux-kernel@vger.kernel.org, iommu@lists.linux.dev References: <20250523081056.223082-1-wei.w.wang@intel.com> From: Ethan Zhao Autocrypt: addr=haifeng.zhao@linux.intel.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit 在 2025/5/23 16:10, Wei Wang 写道: > This original implementation included redundant logic to determine whether > first-stage translation should be used by default. Simplify it and > preserve the original behavior: > - Returns false in legacy mode (no scalable mode support). > - Defaults to first-level translation when both FLTS and SLTS are > supported. > > Signed-off-by: Wei Wang > --- > drivers/iommu/intel/iommu.c | 10 +--------- > 1 file changed, 1 insertion(+), 9 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index cb0b993bebb4..228da47ab7cd 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -1366,15 +1366,7 @@ static void free_dmar_iommu(struct intel_iommu *iommu) > */ > static bool first_level_by_default(struct intel_iommu *iommu) > { > - /* Only SL is available in legacy mode */ > - if (!sm_supported(iommu)) > - return false; > - > - /* Only level (either FL or SL) is available, just use it */ > - if (ecap_flts(iommu->ecap) ^ ecap_slts(iommu->ecap)) > - return ecap_flts(iommu->ecap); > - > - return true; The function works like a digital circurt has 3 single bit inputs  sm, flts, slts and one bit output ret. so the true value table of the orignal function looks like    sm   flts   slts    ret a   0     x     x      false b   1     1     0      true c   1     0     1      false d   1     1     1      true e   1     0     0      true > + return sm_supported(iommu) && ecap_flts(iommu->ecap); And the true value table of this new one looks like    sm  flts slts    ret f   1     1     x      true g   1     0     x      false h   0     1     x      false i    0     0     x      false h, i covers a g,   doesn't cover e, c f,   covers b, d So if we take them as two circurt blocks (chip), their functions aren't equal to each other. If we don't make any assumption,  I wouldn't replace the old chip with new one But, maybe all the new chip and old one all works well under specific context that I didn't think deeper. :) Thanks, Ethan > } > > int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu) -- "firm, enduring, strong, and long-lived"