From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [PATCH v6 08/12] ARM: tegra: Add memory controller support for Tegra124 Date: Fri, 7 Nov 2014 17:00:59 +0100 Message-ID: <1415376063-17205-9-git-send-email-thierry.reding@gmail.com> References: <1415376063-17205-1-git-send-email-thierry.reding@gmail.com> Return-path: In-Reply-To: <1415376063-17205-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: Mike Turquette , Joerg Roedel , Russell King , Will Deacon , Catalin Marinas , Olof Johansson , David Riley , Stephen Warren , Alexandre Courbot , Peter De Schrijver , iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: iommu@lists.linux-foundation.org From: Thierry Reding Add the memory controller and wire up the interrupt that is used to report errors. Provide a reference to the memory controller clock and mark the device as being an IOMMU by adding an #iommu-cells property. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 478c555ebd96..afe9c6a34709 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -551,6 +551,17 @@ reset-names = "fuse"; }; + mc: memory-controller@0,70019000 { + compatible = "nvidia,tegra124-mc"; + reg = <0x0 0x70019000 0x0 0x1000>; + clocks = <&tegra_car TEGRA124_CLK_MC>; + clock-names = "mc"; + + interrupts = ; + + #iommu-cells = <1>; + }; + sata@0,70020000 { compatible = "nvidia,tegra124-ahci"; -- 2.1.3