From: Marek Szyprowski <m.szyprowski@samsung.com>
To: iommu@lists.linux-foundation.org,
linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Marek Szyprowski <m.szyprowski@samsung.com>,
linaro-mm-sig@lists.linaro.org, Arnd Bergmann <arnd@arndb.de>,
Shaik Ameer Basha <shaik.ameer@samsung.com>,
Cho KyongHo <pullip.cho@samsung.com>,
Joerg Roedel <joro@8bytes.org>,
Thierry Reding <treding@nvidia.com>,
Olof Johansson <olof@lixom.net>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Rob Herring <robh@kernel.org>, Will Deacon <will.deacon@arm.com>,
David Wodhouse <dwmw2@infradead.org>,
Inki Dae <inki.dae@samsung.com>, Kukjin Kim <kgene@kernel.org>,
Tomasz Figa <tomasz.figa@gmail.com>,
Kyungmin Park <kyungmin.park@samsung.com>
Subject: [PATCH v4 04/18] ARM: dts: exynos5250: add sysmmu nodes
Date: Fri, 16 Jan 2015 10:12:58 +0100 [thread overview]
Message-ID: <1421399592-7482-5-git-send-email-m.szyprowski@samsung.com> (raw)
In-Reply-To: <1421399592-7482-1-git-send-email-m.szyprowski@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
arch/arm/boot/dts/exynos5250.dtsi | 250 ++++++++++++++++++++++++++++++++++++++
1 file changed, 250 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index cf4a6ec62f71..30d29ff502a7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -224,6 +224,7 @@
interrupts = <0 91 0>;
clocks = <&clock CLK_G2D>;
clock-names = "fimg2d";
+ iommus = <&sysmmu_g2d>;
};
mfc: codec@11000000 {
@@ -233,6 +234,8 @@
power-domains = <&pd_mfc>;
clocks = <&clock CLK_MFC>;
clock-names = "mfc";
+ iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
+ iommu-names = "left", "right";
};
rtc: rtc@101E0000 {
@@ -693,6 +696,7 @@
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
+ iommu = <&sysmmu_gsc1>;
};
gsc_1: gsc@13e10000 {
@@ -702,6 +706,7 @@
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL1>;
clock-names = "gscl";
+ iommu = <&sysmmu_gsc1>;
};
gsc_2: gsc@13e20000 {
@@ -711,6 +716,7 @@
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL2>;
clock-names = "gscl";
+ iommu = <&sysmmu_gsc2>;
};
gsc_3: gsc@13e30000 {
@@ -720,6 +726,7 @@
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL3>;
clock-names = "gscl";
+ iommu = <&sysmmu_gsc3>;
};
hdmi: hdmi {
@@ -742,6 +749,7 @@
interrupts = <0 94 0>;
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
clock-names = "mixer", "sclk_hdmi";
+ iommus = <&sysmmu_tv>;
};
dp_phy: video-phy@10040720 {
@@ -762,6 +770,7 @@
power-domains = <&pd_disp1>;
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
clock-names = "sclk_fimd", "fimd";
+ iommus = <&sysmmu_fimd1>;
};
adc: adc@12D10000 {
@@ -783,4 +792,245 @@
clocks = <&clock CLK_SSS>;
clock-names = "secss";
};
+
+ sysmmu_gsc0: sysmmu@13E80000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13E80000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <2 0>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_gsc1: sysmmu@13E90000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13E90000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <2 2>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_gsc2: sysmmu@13EA0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13EA0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <2 4>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_GSCL2>, <&clock CLK_GSCL2>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_gsc3: sysmmu@13EB0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13EB0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <2 6>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_GSCL3>, <&clock CLK_GSCL3>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_mfc_r: sysmmu@11200000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x11200000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <6 2>;
+ power-domains = <&pd_mfc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_mfc_l: sysmmu@11210000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x11210000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <8 5>;
+ power-domains = <&pd_mfc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_tv: sysmmu@14650000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x14650000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <7 4>;
+ power-domains = <&pd_disp1>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimd1: sysmmu@14640000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x14640000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <3 2>;
+ power-domains = <&pd_disp1>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_g2d: sysmmu@10A60000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x10A60000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <24 5>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_2D>, <&clock CLK_G2D>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_rotator: sysmmu@11D40000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x11D40000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <4 0>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_jpeg: sysmmu@11F20000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x11F20000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <4 2>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_isp: sysmmu@13260000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13260000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <10 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_ISP>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_drc: sysmmu@13270000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13270000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <11 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_DRC>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_fd: sysmmu@132A0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x132A0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <5 0>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_FD>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_scc: sysmmu@13280000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13280000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <5 2>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_SCC>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_scp: sysmmu@13290000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13290000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <3 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_SCP>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_mcuctl: sysmmu@132B0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x132B0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <5 4>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_MCU>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_odc: sysmmu@132C0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x132C0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <11 0>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_ODC>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_dis0: sysmmu@132D0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x132D0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <10 4>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_DIS0>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_dis1: sysmmu@132E0000{
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x132E0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <9 4>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_DIS1>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_3dnr: sysmmu@132F0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x132F0000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <5 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_3DNR>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_lite0: sysmmu@13C40000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13C40000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <3 4>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_FIMC_LITE0>, <&clock CLK_CAMIF_TOP>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_fimc_lite1: sysmmu@13C50000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x13C50000 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <24 1>;
+ power-domains = <&pd_gsc>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_FIMC_LITE1>, <&clock CLK_CAMIF_TOP>;
+ #iommu-cells = <0>;
+ };
};
--
1.9.2
next prev parent reply other threads:[~2015-01-16 9:12 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-16 9:12 [PATCH v4 00/18] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem Marek Szyprowski
[not found] ` <1421399592-7482-1-git-send-email-m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2015-01-16 9:12 ` [PATCH v4 01/18] drm: exynos: detach from default dma-mapping domain on init Marek Szyprowski
2015-01-16 9:12 ` [PATCH v4 02/18] arm: exynos: pm_domains: add support for devices registered before arch_initcall Marek Szyprowski
2015-01-16 9:12 ` [PATCH v4 03/18] ARM: dts: exynos4: add sysmmu nodes Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 08/18] iommu: exynos: remove useless spinlock Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 10/18] iommu: exynos: remove unused functions, part 2 Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 11/18] iommu: exynos: remove useless device_add/remove callbacks Marek Szyprowski
2015-01-16 9:12 ` Marek Szyprowski [this message]
2015-01-16 9:12 ` [PATCH v4 05/18] ARM: dts: exynos5420: add sysmmu nodes Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 06/18] iommu: exynos: don't read version register on every tlb operation Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 07/18] iommu: exynos: remove unused functions Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 09/18] iommu: exynos: refactor function parameters to simplify code Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 12/18] iommu: exynos: add support for binding more than one sysmmu to master device Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 13/18] iommu: exynos: add support for runtime_pm Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 14/18] iommu: exynos: rename variables to reflect their purpose Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 15/18] iommu: exynos: document internal structures Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 16/18] iommu: exynos: remove excessive includes and sort others alphabetically Marek Szyprowski
2015-01-16 9:13 ` [PATCH v4 17/18] iommu: exynos: init from dt-specific callback instead of initcall Marek Szyprowski
2015-01-19 1:11 ` Laurent Pinchart
2015-01-19 11:33 ` Will Deacon
2015-01-20 13:41 ` Laurent Pinchart
2015-01-16 9:13 ` [PATCH v4 18/18] iommu: exynos: add callback for initializing devices from device tree Marek Szyprowski
[not found] ` <1421399592-7482-19-git-send-email-m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2015-01-19 15:27 ` Javier Martinez Canillas
2015-01-23 12:40 ` Marek Szyprowski
2015-01-23 13:48 ` Javier Martinez Canillas
[not found] ` <CABxcv=nX22+1VcA038yyLJz7dUN-tk9-kWTpSB-FeyLxVeRmZA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-01-23 16:15 ` Marek Szyprowski
[not found] ` <54C273AF.1010404-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2015-01-23 16:44 ` Javier Martinez Canillas
2015-01-21 23:37 ` [PATCH v4 00/18] Exynos SYSMMU (IOMMU) integration with DT and DMA-mapping subsystem Tobias Jakobi
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