From: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
intel-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
jesse.barnes-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
Subject: [PATCH 5/7] iommu/vt-d: Assume BIOS lies about ATSR for integrated gfx
Date: Fri, 09 Oct 2015 00:53:30 +0100 [thread overview]
Message-ID: <1444348410.92154.33.camel@infradead.org> (raw)
In-Reply-To: <1444348223.92154.22.camel-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
[-- Attachment #1.1: Type: text/plain, Size: 1293 bytes --]
If the device itself reports ATS in its PCIe capabilities, but the BIOS
neglects to provide an ATSR structure to indicate that the root port can
also cope, then assume the latter is lying.
Signed-off-by: David Woodhouse <David.Woodhouse-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
drivers/iommu/intel-iommu.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index a6fd639..b5ab009 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1447,9 +1447,14 @@ iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu,
if (!pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS))
return NULL;
- if (!dmar_find_matched_atsr_unit(pdev))
- return NULL;
-
+ if (!dmar_find_matched_atsr_unit(pdev)) {
+ if (intel_iommu_pasid28 && IS_GFX_DEVICE(pdev) &&
+ pdev->vendor == 0x8086) {
+ pr_warn("BIOS denies ATSR capability for %s; assuming it lies\n",
+ dev_name(info->dev));
+ } else
+ return NULL;
+ }
return info;
}
--
2.4.3
--
David Woodhouse Open Source Technology Centre
David.Woodhouse-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org Intel Corporation
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next prev parent reply other threads:[~2015-10-08 23:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-08 23:50 [PATCH 0/7] Enable SVM for Intel VT-d David Woodhouse
[not found] ` <1444348223.92154.22.camel-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
2015-10-08 23:52 ` [PATCH 1/7] iommu/vt-d: Introduce intel_iommu=pasid28, and pasid_enabled() macro David Woodhouse
2015-10-08 23:53 ` David Woodhouse [this message]
2015-10-08 23:52 ` [PATCH 2/7] iommu/vt-d: Add initial support for PASID tables David Woodhouse
2015-10-08 23:52 ` [PATCH 3/7] iommu/vt-d: Add intel_svm_{un, }bind_mm() functions David Woodhouse
2015-10-08 23:53 ` [PATCH 4/7] iommu/vt-d: Generalise DMAR MSI setup to allow for page request events David Woodhouse
2015-10-08 23:53 ` [PATCH 6/7] iommu/vt-d: Enable page request interrupt David Woodhouse
2015-10-08 23:54 ` [PATCH 7/7] iommu/vt-d: Implement page request handling David Woodhouse
2015-10-10 16:54 ` Chris Wilson
2015-10-10 13:17 ` [PATCH 0/7] Enable SVM for Intel VT-d David Woodhouse
[not found] ` <1444483075.92154.98.camel-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
2015-10-11 13:48 ` Oded Gabbay
2015-10-13 12:06 ` Daniel Vetter
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