Re: [PATCH v3 5/7] iommu: avoid dev iotlb logic in intel-iommu for domains with no dev iotlbs

[David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>]

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On Tue, 2016-04-19 at 19:49 +0300, Adam Morrison wrote:
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -392,6 +392,7 @@ struct dmar_domain {
>  					 * to VT-d spec, section 9.3 */
>  
>  	struct list_head devices;	/* all devices' list */
> +	bool has_iotlb_device;

If you put that *before* the 'devices' field then the array will pack
better.

> @@ -1523,6 +1553,9 @@ static void iommu_flush_dev_iotlb(struct dmar_domain *domain,
>  	unsigned long flags;
>  	struct device_domain_info *info;
>  
> +	if (!domain->has_iotlb_device)
> +		return;
> +
>  	spin_lock_irqsave(&device_domain_lock, flags);
>  	list_for_each_entry(info, &domain->devices, link) {
>  		if (!info->ats_enabled)
> 

Hm, I wonder if it would be nicer to check this in the caller (both of
them). As things stand, in flush_unmaps() we'll now be calculating
ilog2(nrpages) for (possibly) no reason before calling this function.


Other than that, this all looks excellent; thanks. I'll apply it when I
get home from LSF/MM later this week or next.

Only a few cosmetic things to change — please use 'iommu/vt-d:' as the
prefix on each commit, and spell 'MiB' and 'KiB' correctly in the final
patch in the series. (And I'm not sure I quite understand 'a CPU can
cache at most 32 MiB and the global cache is bounded by 4 MiB.' either
way...)

-- 
David Woodhouse                            Open Source Technology Centre
David.Woodhouse-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org                              Intel Corporation


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