From: Sricharan R <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
pdaly-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
jgebben-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
pratikp-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
robin.murphy-5wv7dgnIgG8@public.gmane.org,
tzeng-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
mitchelh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
Cc: dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
Subject: [PATCH V7 2/8] iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag
Date: Tue, 13 Dec 2016 00:08:41 +0530 [thread overview]
Message-ID: <1481567927-14791-3-git-send-email-sricharan@codeaurora.org> (raw)
In-Reply-To: <1481567927-14791-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
From: Jeremy Gebben <jgebben-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
Tested-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
Acked-by: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Signed-off-by: Jeremy Gebben <jgebben-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
drivers/iommu/io-pgtable-arm.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index f5c90e1..69ba83a 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -350,11 +350,14 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data,
if (data->iop.fmt == ARM_64_LPAE_S1 ||
data->iop.fmt == ARM_32_LPAE_S1) {
- pte = ARM_LPAE_PTE_AP_UNPRIV | ARM_LPAE_PTE_nG;
+ pte = ARM_LPAE_PTE_nG;
if (!(prot & IOMMU_WRITE) && (prot & IOMMU_READ))
pte |= ARM_LPAE_PTE_AP_RDONLY;
+ if (!(prot & IOMMU_PRIV))
+ pte |= ARM_LPAE_PTE_AP_UNPRIV;
+
if (prot & IOMMU_MMIO)
pte |= (ARM_LPAE_MAIR_ATTR_IDX_DEV
<< ARM_LPAE_PTE_ATTRINDX_SHIFT);
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2016-12-12 18:38 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-12 18:38 [PATCH V7 0/8] Add support for privileged mappings Sricharan R
[not found] ` <1481567927-14791-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-12-12 18:38 ` [PATCH V7 1/8] iommu: add IOMMU_PRIV attribute Sricharan R
2016-12-12 18:38 ` Sricharan R [this message]
2016-12-12 18:38 ` [PATCH V7 3/8] iommu/io-pgtable-arm-v7s: Add support for the IOMMU_PRIV flag Sricharan R
2016-12-12 18:38 ` [PATCH V7 4/8] common: DMA-mapping: add DMA_ATTR_PRIVILEGED attribute Sricharan R
2016-12-13 13:55 ` Robin Murphy
2016-12-12 18:38 ` [PATCH V7 5/8] arm64/dma-mapping: Implement DMA_ATTR_PRIVILEGED Sricharan R
[not found] ` <1481567927-14791-6-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-12-13 14:02 ` Robin Murphy
2016-12-13 14:38 ` Sricharan
2016-12-13 14:46 ` Robin Murphy
[not found] ` <4e6ebf88-0138-afce-d752-56b66d69772f-5wv7dgnIgG8@public.gmane.org>
2016-12-13 14:54 ` Sricharan
2016-12-13 18:46 ` Sricharan
2016-12-13 19:11 ` Robin Murphy
[not found] ` <0f67b88d-5b93-f9a8-7c70-900170a4e9c2-5wv7dgnIgG8@public.gmane.org>
2017-01-02 13:22 ` Sricharan
2016-12-12 18:38 ` [PATCH V7 6/8] dmaengine: pl330: Make sure microcode is privileged Sricharan R
2016-12-12 18:38 ` [PATCH V7 7/8] iommu/arm-smmu: Set privileged attribute to 'default' instead of 'unprivileged' Sricharan R
[not found] ` <1481567927-14791-8-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-12-13 12:20 ` Robin Murphy
2016-12-12 18:38 ` [PATCH V7 8/8] iommu/arm-smmu: Revert "iommu/arm-smmu: Set PRIVCFG in stage 1 STEs" Sricharan R
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