From: Suravee Suthikulpanit <Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org
Subject: [PATCH V6 5/7] perf/amd/iommu: Clean up perf_iommu_enable_event
Date: Fri, 23 Dec 2016 20:38:48 +0700 [thread overview]
Message-ID: <1482500330-5606-6-git-send-email-Suravee.Suthikulpanit@amd.com> (raw)
In-Reply-To: <1482500330-5606-1-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
This patch cleans up:
* Various bitwise operations in perf_iommu_enable_event
* Make use macros BIT(x)
This should not affect logic and functionality.
Cc: Peter Zijlstra <peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: Borislav Petkov <bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
---
arch/x86/events/amd/iommu.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 9bff41d..2403c78 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -258,21 +258,21 @@ static void perf_iommu_enable_event(struct perf_event *ev)
amd_iommu_pc_set_reg(0, devid, bank, cntr,
IOMMU_PC_COUNTER_SRC_REG, ®);
- reg = 0ULL | devid | (_GET_DEVID_MASK(ev) << 32);
+ reg = devid | (_GET_DEVID_MASK(ev) << 32);
if (reg)
- reg |= (1UL << 31);
+ reg |= BIT(31);
amd_iommu_pc_set_reg(0, devid, bank, cntr,
IOMMU_PC_DEVID_MATCH_REG, ®);
- reg = 0ULL | _GET_PASID(ev) | (_GET_PASID_MASK(ev) << 32);
+ reg = _GET_PASID(ev) | (_GET_PASID_MASK(ev) << 32);
if (reg)
- reg |= (1UL << 31);
+ reg |= BIT(31);
amd_iommu_pc_set_reg(0, devid, bank, cntr,
IOMMU_PC_PASID_MATCH_REG, ®);
- reg = 0ULL | _GET_DOMID(ev) | (_GET_DOMID_MASK(ev) << 32);
+ reg = _GET_DOMID(ev) | (_GET_DOMID_MASK(ev) << 32);
if (reg)
- reg |= (1UL << 31);
+ reg |= BIT(31);
amd_iommu_pc_set_reg(0, devid, bank, cntr,
IOMMU_PC_DOMID_MATCH_REG, ®);
}
--
1.8.3.1
next prev parent reply other threads:[~2016-12-23 13:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-23 13:38 [PATCH V6 0/7] perf/amd/iommu: Enable multi-IOMMU support Suravee Suthikulpanit
[not found] ` <1482500330-5606-1-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2016-12-23 13:38 ` [PATCH V6 1/7] perf/amd/iommu: Misc fix up perf_iommu_read Suravee Suthikulpanit
2016-12-23 13:38 ` [PATCH V6 2/7] perf/amd/iommu: Modify functions to query max banks and counters Suravee Suthikulpanit
[not found] ` <1482500330-5606-3-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2017-01-04 14:48 ` Joerg Roedel
[not found] ` <20170104144853.GE10632-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2017-01-09 10:48 ` Suravee Suthikulpanit
2016-12-23 13:38 ` [PATCH V6 3/7] perf/amd/iommu: Modify IOMMU API to allow specifying IOMMU index Suravee Suthikulpanit
2016-12-23 13:38 ` [PATCH V6 4/7] perf/amd/iommu: Declare pr_fmt and remove unnecessary pr_debug Suravee Suthikulpanit
2016-12-23 13:38 ` Suravee Suthikulpanit [this message]
2016-12-23 13:38 ` [PATCH V6 6/7] iommu/amd: Introduce amd_iommu_get_num_iommus() Suravee Suthikulpanit
2016-12-23 13:38 ` [PATCH V6 7/7] perf/amd/iommu: Enable support for multiple IOMMUs Suravee Suthikulpanit
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