From: arindam.nath-5C7GfCeVMHo@public.gmane.org
To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: John.Bridgman-5C7GfCeVMHo@public.gmane.org,
Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
drake-6IF/jdPJHihWk0Htik3J/w@public.gmane.org,
Arindam Nath <arindam.nath-5C7GfCeVMHo@public.gmane.org>,
Craig Stein <stein12c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org,
Alexander.Deucher-5C7GfCeVMHo@public.gmane.org,
Felix.Kuehling-5C7GfCeVMHo@public.gmane.org,
linux-6IF/jdPJHihWk0Htik3J/w@public.gmane.org,
michel-otUistvHUpPR7s880joybQ@public.gmane.org
Subject: [PATCH] iommu/amd: flush IOTLB for specific domains only (v2)
Date: Fri, 19 May 2017 15:32:31 +0530 [thread overview]
Message-ID: <1495188151-14358-1-git-send-email-arindam.nath@amd.com> (raw)
In-Reply-To: <20170407102039.GW7266-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
From: Arindam Nath <arindam.nath@amd.com>
Change History
--------------
v2: changes suggested by Joerg
- add flush flag to improve efficiency of flush operation
v1:
- The idea behind flush queues is to defer the IOTLB flushing
for domains for which the mappings are no longer valid. We
add such domains in queue_add(), and when the queue size
reaches FLUSH_QUEUE_SIZE, we perform __queue_flush().
Since we have already taken lock before __queue_flush()
is called, we need to make sure the IOTLB flushing is
performed as quickly as possible.
In the current implementation, we perform IOTLB flushing
for all domains irrespective of which ones were actually
added in the flush queue initially. This can be quite
expensive especially for domains for which unmapping is
not required at this point of time.
This patch makes use of domain information in
'struct flush_queue_entry' to make sure we only flush
IOTLBs for domains who need it, skipping others.
Suggested-by: Joerg Roedel <joro@8bytes.org>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
---
drivers/iommu/amd_iommu.c | 27 ++++++++++++++++++++-------
drivers/iommu/amd_iommu_types.h | 2 ++
2 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 63cacf5..1edeebec 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2227,15 +2227,26 @@ static struct iommu_group *amd_iommu_device_group(struct device *dev)
static void __queue_flush(struct flush_queue *queue)
{
- struct protection_domain *domain;
- unsigned long flags;
int idx;
- /* First flush TLB of all known domains */
- spin_lock_irqsave(&amd_iommu_pd_lock, flags);
- list_for_each_entry(domain, &amd_iommu_pd_list, list)
- domain_flush_tlb(domain);
- spin_unlock_irqrestore(&amd_iommu_pd_lock, flags);
+ /* First flush TLB of all domains which were added to flush queue */
+ for (idx = 0; idx < queue->next; ++idx) {
+ struct flush_queue_entry *entry;
+
+ entry = queue->entries + idx;
+
+ /*
+ * There might be cases where multiple IOVA entries for the
+ * same domain are queued in the flush queue. To avoid
+ * flushing the same domain again, we check whether the
+ * flag is set or not. This improves the efficiency of
+ * flush operation.
+ */
+ if (!entry->dma_dom->domain.already_flushed) {
+ entry->dma_dom->domain.already_flushed = true;
+ domain_flush_tlb(&entry->dma_dom->domain);
+ }
+ }
/* Wait until flushes have completed */
domain_flush_complete(NULL);
@@ -2289,6 +2300,8 @@ static void queue_add(struct dma_ops_domain *dma_dom,
pages = __roundup_pow_of_two(pages);
address >>= PAGE_SHIFT;
+ dma_dom->domain.already_flushed = false;
+
queue = get_cpu_ptr(&flush_queue);
spin_lock_irqsave(&queue->lock, flags);
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index 4de8f41..4f5519d 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -454,6 +454,8 @@ struct protection_domain {
bool updated; /* complete domain flush required */
unsigned dev_cnt; /* devices assigned to this domain */
unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */
+ bool already_flushed; /* flag to avoid flushing the same domain again
+ in a single invocation of __queue_flush() */
};
/*
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2017-05-19 10:02 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-13 19:49 amd-iommu: can't boot with amdgpu, AMD-Vi: Completion-Wait loop timed out Daniel Drake
[not found] ` <CAD8Lp457TE1CnJ-DHnB6NB2LWxgA5K5K57Q6L7XcSHeYNpvARQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-13 20:01 ` Deucher, Alexander
[not found] ` <CY4PR12MB16533C83151D6FCFC11ED457F7250-rpdhrqHFk06apTa93KjAaQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-03-14 6:16 ` Nath, Arindam
2017-03-17 12:15 ` Daniel Drake
[not found] ` <CAD8Lp47zjJvqxY3TMMAhjz3OnLR52CtsQh_PQFPmsEW-xHfDwg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-17 15:53 ` Alex Deucher
[not found] ` <CADnq5_Oyfm-BzU9YV_QLjm6HxtMwnJcFkfYtjmCWpuah35TFvA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-21 15:57 ` joro-zLv9SwRftAIdnm+yROfE0A
[not found] ` <20170321155725.GD29659-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2017-03-21 16:01 ` Deucher, Alexander
[not found] ` <BN6PR12MB16526DD4A3B60DB4E20B9907F73D0-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-03-21 16:10 ` 'joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org'
[not found] ` <20170321161056.GE29659-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2017-03-21 16:14 ` Nath, Arindam
2017-03-21 16:17 ` Deucher, Alexander
[not found] ` <BN6PR12MB16528AF8E5577E9ACB483212F73D0-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-03-21 16:25 ` 'joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org'
[not found] ` <20170321162532.GG29659-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2017-03-21 16:30 ` Deucher, Alexander
[not found] ` <BN6PR12MB165268CA4C460215950409D5F73D0-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-03-22 11:22 ` 'joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org'
[not found] ` <20170322112242.GK29659-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2017-03-27 6:17 ` [PATCH] iommu/amd: flush IOTLB for specific domains only arindam.nath-5C7GfCeVMHo
[not found] ` <1490595427-11979-1-git-send-email-arindam.nath-5C7GfCeVMHo@public.gmane.org>
2017-03-27 12:25 ` Daniel Drake
[not found] ` <CAD8Lp46RjsUJEvCR5qVY6p8za5H9iDGTAyJMDd1zO7gbgBvqfA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-27 12:27 ` Nath, Arindam
2017-03-30 6:23 ` Nath, Arindam
[not found] ` <MWHPR12MB15186B0A864F247BFBEF8EAD9C340-Gy0DoCVfaSXKu+HfpMNLNQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-03-30 13:45 ` Daniel Drake
[not found] ` <CAD8Lp47VQ0X0ydsGMrpTu-y4LAXfg9N7+Mzb0hDWDsKc2P-kQg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-30 14:48 ` Nath, Arindam
2017-04-05 15:01 ` Nath, Arindam
[not found] ` <MWHPR12MB15183AFF01D7D74109CC62FF9C0A0-Gy0DoCVfaSXKu+HfpMNLNQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-05-08 18:22 ` Daniel Drake
2017-04-07 10:20 ` Joerg Roedel
[not found] ` <20170407102039.GW7266-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2017-05-19 1:31 ` Michel Dänzer
2017-05-19 10:02 ` arindam.nath-5C7GfCeVMHo [this message]
[not found] ` <1495188151-14358-1-git-send-email-arindam.nath-5C7GfCeVMHo@public.gmane.org>
2017-05-19 13:35 ` [PATCH] iommu/amd: flush IOTLB for specific domains only (v2) Jan Vesely
[not found] ` <1495200930.4360.6.camel-kgbqMDwikbSVc3sceRu5cw@public.gmane.org>
2017-05-21 7:25 ` Nath, Arindam
2017-05-22 1:08 ` Michel Dänzer
[not found] ` <c03c7d65-52a7-b656-2278-0cfb24e8d07a-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-05-22 1:12 ` Michel Dänzer
2017-05-22 7:48 ` [PATCH] iommu/amd: flush IOTLB for specific domains only (v3) arindam.nath-5C7GfCeVMHo
[not found] ` <1495439281-24005-1-git-send-email-arindam.nath-5C7GfCeVMHo@public.gmane.org>
2017-05-23 18:24 ` Deucher, Alexander
2017-05-29 14:38 ` Joerg Roedel
2017-05-30 7:38 ` Nath, Arindam
[not found] ` <MWHPR12MB1518926453E8BAF205F3492D9CF00-Gy0DoCVfaSXKu+HfpMNLNQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-09-12 6:49 ` Daniel Drake
2017-09-12 9:02 ` Nath, Arindam
2017-03-27 12:23 ` amd-iommu: can't boot with amdgpu, AMD-Vi: Completion-Wait loop timed out Daniel Drake
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1495188151-14358-1-git-send-email-arindam.nath@amd.com \
--to=arindam.nath-5c7gfcevmho@public.gmane.org \
--cc=Alexander.Deucher-5C7GfCeVMHo@public.gmane.org \
--cc=Felix.Kuehling-5C7GfCeVMHo@public.gmane.org \
--cc=John.Bridgman-5C7GfCeVMHo@public.gmane.org \
--cc=Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org \
--cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
--cc=drake-6IF/jdPJHihWk0Htik3J/w@public.gmane.org \
--cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
--cc=joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org \
--cc=linux-6IF/jdPJHihWk0Htik3J/w@public.gmane.org \
--cc=michel-otUistvHUpPR7s880joybQ@public.gmane.org \
--cc=stein12c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).