From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Auger Subject: [RFC v2 2/4] iommu/arm-smmu-v3: Add tlbi_on_map option Date: Fri, 11 Aug 2017 15:45:28 +0200 Message-ID: <1502459130-6234-3-git-send-email-eric.auger@redhat.com> References: <1502459130-6234-1-git-send-email-eric.auger@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1502459130-6234-1-git-send-email-eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: eric.auger.pro-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Will.Deacon-5wv7dgnIgG8@public.gmane.org, robin.murphy-5wv7dgnIgG8@public.gmane.org, Jean-Philippe.Brucker-5wv7dgnIgG8@public.gmane.org Cc: mst-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, Marc.Zyngier-5wv7dgnIgG8@public.gmane.org, tn-nYOzD4b6Jr9Wk0Htik3J/w@public.gmane.org, christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org List-Id: iommu@lists.linux-foundation.org When running a virtual SMMU on a guest we sometimes need to trap all changes to the translation structures. This is especially useful to integrate with VFIO. This patch adds a new option that forces the IO_PGTABLE_QUIRK_TLBI_ON_MAP to be applied on LPAE page tables. TLBI commands then can be trapped. Signed-off-by: Eric Auger --- v1 -> v2: - rebase on v4.13-rc2 --- Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 4 ++++ drivers/iommu/arm-smmu-v3.c | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt index c9abbf3..ebb85e9 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt @@ -52,6 +52,10 @@ the PCIe specification. devicetree/bindings/interrupt-controller/msi.txt for a description of the msi-parent property. +- tlbi-on-map : invalidate caches whenever there is an update of + any remapping structure (updates to not-present or + present entries). + - hisilicon,broken-prefetch-cmd : Avoid sending CMD_PREFETCH_* commands to the SMMU. diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 568c400..690247b 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -608,6 +608,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) #define ARM_SMMU_OPT_PAGE0_REGS_ONLY (1 << 1) +#define ARM_SMMU_OPT_TLBI_ON_MAP (1 << 2) u32 options; struct arm_smmu_cmdq cmdq; @@ -675,6 +676,7 @@ struct arm_smmu_option_prop { static struct arm_smmu_option_prop arm_smmu_options[] = { { ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" }, { ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"}, + { ARM_SMMU_OPT_TLBI_ON_MAP, "tlbi-on-map" }, { 0, NULL}, }; @@ -1604,6 +1606,9 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain) if (smmu->features & ARM_SMMU_FEAT_COHERENCY) pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_NO_DMA; + if (smmu->options & ARM_SMMU_OPT_TLBI_ON_MAP) + pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_TLBI_ON_MAP; + pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain); if (!pgtbl_ops) return -ENOMEM; -- 2.5.5