From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sohil Mehta Subject: [PATCH 1/4] iommu/vt-d: Enable upto 57 bits of domain address width Date: Wed, 20 Dec 2017 11:59:24 -0800 Message-ID: <1513799967-22454-2-git-send-email-sohil.mehta@intel.com> References: <1513799967-22454-1-git-send-email-sohil.mehta@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1513799967-22454-1-git-send-email-sohil.mehta-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Joerg Roedel , Alex Williamson Cc: Ravi V Shankar , Fenghua Yu , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Dave Hansen , iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, David Woodhouse , Gayatri Kammela , Kirill Shutemov , Andy Shevchenko List-Id: iommu@lists.linux-foundation.org Update the IOMMU default domain address width to 57 bits. This would enable the IOMMU to do upto 5-levels of paging for second level translations - IOVA translation requests without PASID. Even though the maximum supported address width is being increased to 57, __iommu_calculate_agaw() would set the actual supported address width to the maximum support available in IOMMU hardware. Signed-off-by: Sohil Mehta --- drivers/iommu/intel-iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 4a2de34..457795b 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -64,7 +64,7 @@ #define IOAPIC_RANGE_END (0xfeefffff) #define IOVA_START_ADDR (0x1000) -#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 +#define DEFAULT_DOMAIN_ADDRESS_WIDTH 57 #define MAX_AGAW_WIDTH 64 #define MAX_AGAW_PFN_WIDTH (MAX_AGAW_WIDTH - VTD_PAGE_SHIFT) -- 2.7.4