From: Lu Baolu <baolu.lu@linux.intel.com>
To: David Woodhouse <dwmw2@infradead.org>, Joerg Roedel <joro@8bytes.org>
Cc: ashok.raj@intel.com, sanjay.k.kumar@intel.com,
jacob.jun.pan@intel.com, kevin.tian@intel.com,
yi.l.liu@intel.com, yi.y.sun@intel.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
Lu Baolu <baolu.lu@linux.intel.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: [PATCH 8/9] iommu/vt-d: Use per-domain pasid table
Date: Tue, 17 Apr 2018 11:03:21 +0800 [thread overview]
Message-ID: <1523934202-21669-9-git-send-email-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <1523934202-21669-1-git-send-email-baolu.lu@linux.intel.com>
This patch replaces current per iommu pasid table with
the new added per domain pasid table. Each svm-capable
PCI device will have its own pasid table.
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Liu Yi L <yi.l.liu@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
drivers/iommu/intel-iommu.c | 6 +++---
drivers/iommu/intel-svm.c | 37 +++++++++++++++++++++++++------------
2 files changed, 28 insertions(+), 15 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d4f9cea..5fe7f91 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -5191,7 +5191,7 @@ int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct intel_svm_dev *sd
if (!(ctx_lo & CONTEXT_PASIDE)) {
if (iommu->pasid_state_table)
context[1].hi = (u64)virt_to_phys(iommu->pasid_state_table);
- context[1].lo = (u64)virt_to_phys(iommu->pasid_table) |
+ context[1].lo = (u64)virt_to_phys(domain->pasid_table) |
intel_iommu_get_pts(domain);
wmb();
@@ -5259,8 +5259,8 @@ struct intel_iommu *intel_svm_device_to_iommu(struct device *dev)
return NULL;
}
- if (!iommu->pasid_table) {
- dev_err(dev, "PASID not enabled on IOMMU; cannot enable SVM\n");
+ if (!intel_pasid_get_table(dev)) {
+ dev_err(dev, "No PASID table for device; cannot enable SVM\n");
return NULL;
}
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index 3abc94f..3b14819 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -256,6 +256,7 @@ static void intel_flush_pasid_dev(struct intel_svm *svm, struct intel_svm_dev *s
static void intel_mm_release(struct mmu_notifier *mn, struct mm_struct *mm)
{
struct intel_svm *svm = container_of(mn, struct intel_svm, notifier);
+ struct pasid_entry *pasid_table;
struct intel_svm_dev *sdev;
/* This might end up being called from exit_mmap(), *before* the page
@@ -270,11 +271,16 @@ static void intel_mm_release(struct mmu_notifier *mn, struct mm_struct *mm)
* page) so that we end up taking a fault that the hardware really
* *has* to handle gracefully without affecting other processes.
*/
- svm->iommu->pasid_table[svm->pasid].val = 0;
- wmb();
-
rcu_read_lock();
list_for_each_entry_rcu(sdev, &svm->devs, list) {
+ pasid_table = intel_pasid_get_table(sdev->dev);
+ if (!pasid_table)
+ continue;
+
+ pasid_table[svm->pasid].val = 0;
+ /* Make sure the entry update is visible before translation. */
+ wmb();
+
intel_flush_pasid_dev(svm, sdev, svm->pasid);
intel_flush_svm_range_dev(svm, sdev, 0, -1, 0, !svm->mm);
}
@@ -295,6 +301,7 @@ static LIST_HEAD(global_svm_list);
int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_ops *ops)
{
struct intel_iommu *iommu = intel_svm_device_to_iommu(dev);
+ struct pasid_entry *pasid_table;
struct intel_svm_dev *sdev;
struct intel_svm *svm = NULL;
struct mm_struct *mm = NULL;
@@ -302,7 +309,8 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_
int pasid_max;
int ret;
- if (WARN_ON(!iommu || !iommu->pasid_table))
+ pasid_table = intel_pasid_get_table(dev);
+ if (WARN_ON(!iommu || !pasid_table))
return -EINVAL;
if (dev_is_pci(dev)) {
@@ -380,8 +388,8 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_
}
svm->iommu = iommu;
- if (pasid_max > iommu->pasid_max)
- pasid_max = iommu->pasid_max;
+ if (pasid_max > intel_pasid_max_id)
+ pasid_max = intel_pasid_max_id;
/* Do not use PASID 0 in caching mode (virtualised IOMMU) */
ret = intel_pasid_alloc_id(svm,
@@ -414,7 +422,7 @@ int intel_svm_bind_mm(struct device *dev, int *pasid, int flags, struct svm_dev_
if (cpu_feature_enabled(X86_FEATURE_LA57))
pasid_entry_val |= PASID_ENTRY_FLPM_5LP;
- iommu->pasid_table[svm->pasid].val = pasid_entry_val;
+ pasid_table[svm->pasid].val = pasid_entry_val;
wmb();
@@ -442,6 +450,7 @@ EXPORT_SYMBOL_GPL(intel_svm_bind_mm);
int intel_svm_unbind_mm(struct device *dev, int pasid)
{
+ struct pasid_entry *pasid_table;
struct intel_svm_dev *sdev;
struct intel_iommu *iommu;
struct intel_svm *svm;
@@ -449,7 +458,8 @@ int intel_svm_unbind_mm(struct device *dev, int pasid)
mutex_lock(&pasid_mutex);
iommu = intel_svm_device_to_iommu(dev);
- if (!iommu || !iommu->pasid_table)
+ pasid_table = intel_pasid_get_table(dev);
+ if (!iommu || !pasid_table)
goto out;
svm = intel_pasid_lookup_id(pasid);
@@ -472,11 +482,14 @@ int intel_svm_unbind_mm(struct device *dev, int pasid)
intel_flush_pasid_dev(svm, sdev, svm->pasid);
intel_flush_svm_range_dev(svm, sdev, 0, -1, 0, !svm->mm);
kfree_rcu(sdev, rcu);
+ pasid_table[svm->pasid].val = 0;
+ /*
+ * Make sure the entry update is visible
+ * before translation.
+ */
+ wmb();
if (list_empty(&svm->devs)) {
- svm->iommu->pasid_table[svm->pasid].val = 0;
- wmb();
-
intel_pasid_free_id(svm->pasid);
if (svm->mm)
mmu_notifier_unregister(&svm->notifier, svm->mm);
@@ -509,7 +522,7 @@ int intel_svm_is_pasid_valid(struct device *dev, int pasid)
mutex_lock(&pasid_mutex);
iommu = intel_svm_device_to_iommu(dev);
- if (!iommu || !iommu->pasid_table)
+ if (!iommu)
goto out;
svm = intel_pasid_lookup_id(pasid);
--
2.7.4
next prev parent reply other threads:[~2018-04-17 3:03 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-17 3:03 [PATCH 0/9] iommu/vt-d: Improve PASID id and table management Lu Baolu
[not found] ` <1523934202-21669-1-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-04-17 3:03 ` [PATCH 1/9] iommu/vt-d: Global PASID name space Lu Baolu
[not found] ` <1523934202-21669-2-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:21 ` Liu, Yi L
2018-04-17 3:03 ` [PATCH 2/9] iommu/vt-d: Decouple idr bond pointer from svm Lu Baolu
2018-05-01 9:21 ` Liu, Yi L
2018-04-17 3:03 ` [PATCH 3/9] iommu/vt-d: Use global PASID for SVM usage Lu Baolu
[not found] ` <1523934202-21669-4-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:21 ` Liu, Yi L
2018-04-17 3:03 ` [PATCH 4/9] iommu/vt-d: Move device_domain_info to header Lu Baolu
[not found] ` <1523934202-21669-5-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:21 ` Liu, Yi L
2018-04-17 3:03 ` [PATCH 7/9] iommu/vt-d: Calculate PTS value Lu Baolu
[not found] ` <1523934202-21669-8-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:22 ` Liu, Yi L
2018-04-17 3:03 ` [PATCH 5/9] iommu/vt-d: Per domain pasid table interfaces Lu Baolu
[not found] ` <1523934202-21669-6-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:22 ` Liu, Yi L
[not found] ` <A2975661238FB949B60364EF0F2C257439BE7516-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-05-02 3:08 ` Lu Baolu
2018-04-17 3:03 ` [PATCH 6/9] iommu/vt-d: Allocate and free pasid table Lu Baolu
[not found] ` <1523934202-21669-7-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:22 ` Liu, Yi L
[not found] ` <A2975661238FB949B60364EF0F2C257439BE752C-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-05-02 3:09 ` Lu Baolu
2018-04-17 3:03 ` Lu Baolu [this message]
[not found] ` <1523934202-21669-9-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:23 ` [PATCH 8/9] iommu/vt-d: Use per-domain " Liu, Yi L
[not found] ` <A2975661238FB949B60364EF0F2C257439BE7558-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-05-02 4:38 ` Lu Baolu
2018-04-17 3:03 ` [PATCH 9/9] iommu/vt-d: Clean up PASID talbe management for SVM Lu Baolu
[not found] ` <1523934202-21669-10-git-send-email-baolu.lu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-05-01 9:24 ` Liu, Yi L
[not found] ` <A2975661238FB949B60364EF0F2C257439BE7567-0J0gbvR4kTg/UvCtAeCM4rfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2018-05-02 4:43 ` Lu Baolu
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