From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhen Lei Subject: [PATCH v3 0/2] bugfix and optimization about CMD_SYNC Date: Wed, 15 Aug 2018 18:23:00 +0800 Message-ID: <1534328582-17664-1-git-send-email-thunder.leizhen@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel Cc: Hanjun Guo , LinuxArm , Libin List-Id: iommu@lists.linux-foundation.org v2 -> v3: Although I have no data to show how many performance will be impacted because of arm_smmu_cmdq_build_cmd is protected by spinlock. But it's clear that the performance is bound to drop, a memset operation and a complicate switch..case in the function arm_smmu_cmdq_build_cmd. v1 -> v2: 1. move the call to arm_smmu_cmdq_build_cmd into the critical section, and keep itself unchange. 2. Although patch2 can make sure no two CMD_SYNCs will be adjacent, but patch1 is still needed, see below: cpu0 cpu1 cpu2 msidata=0 msidata=1 insert cmd1 insert a TLBI command insert cmd0 smmu execute cmd1 smmu execute TLBI smmu execute cmd0 poll timeout, because msidata=1 is overridden by cmd0, that means VAL=0, sync_idx=1. Zhen Lei (2): iommu/arm-smmu-v3: fix unexpected CMD_SYNC timeout iommu/arm-smmu-v3: avoid redundant CMD_SYNCs if possible drivers/iommu/arm-smmu-v3.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) -- 1.8.3