Linux IOMMU Development
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From: Navneet Kumar <navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Subject: [PATCH 2/5] iommu/tegra-smmu: Use non-secure register for flushing
Date: Wed, 16 Jan 2019 12:50:11 -0800	[thread overview]
Message-ID: <1547671814-30088-2-git-send-email-navneetk@nvidia.com> (raw)
In-Reply-To: <1547671814-30088-1-git-send-email-navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Use PTB_ASID instead of SMMU_CONFIG to flush smmu.
PTB_ASID can be accessed from non-secure mode, SMMU_CONFIG cannot be.
Using SMMU_CONFIG could pose a problem when kernel doesn't have secure
mode access enabled from boot.

Signed-off-by: Navneet Kumar <navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/iommu/tegra-smmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index ee4d8a8..fa175d9 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -235,7 +235,7 @@ static inline void smmu_flush_tlb_group(struct tegra_smmu *smmu,
 
 static inline void smmu_flush(struct tegra_smmu *smmu)
 {
-	smmu_readl(smmu, SMMU_CONFIG);
+	smmu_readl(smmu, SMMU_PTB_ASID);
 }
 
 static int tegra_smmu_alloc_asid(struct tegra_smmu *smmu, unsigned int *idp)
-- 
2.7.4

  parent reply	other threads:[~2019-01-16 20:50 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-16 20:50 [PATCH 1/5] iommu/tegra-smmu: Fix domain_alloc Navneet Kumar
     [not found] ` <1547671814-30088-1-git-send-email-navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2019-01-16 20:50   ` Navneet Kumar [this message]
     [not found]     ` <1547671814-30088-2-git-send-email-navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2019-01-17 15:25       ` [PATCH 2/5] iommu/tegra-smmu: Use non-secure register for flushing Dmitry Osipenko
     [not found]         ` <340ed36a-297f-f1e6-b863-651454cf39d8-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-01-24 18:29           ` navneet kumar
     [not found]             ` <ece55c12-2a6f-e12f-597c-ef15001e66a3-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2019-01-24 21:27               ` Dmitry Osipenko
2019-01-16 20:50   ` [PATCH 3/5] iommu/tegra-smmu: Fix client enablement order Navneet Kumar
2019-01-16 20:50   ` [PATCH 4/5] iommu/tegra-smmu: Add PCI support Navneet Kumar
2019-01-16 20:50   ` [PATCH 5/5] iommu/tegra-smmu: Add resv_regions ops Navneet Kumar
     [not found]     ` <1547671814-30088-5-git-send-email-navneetk-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2019-01-17 17:06       ` Robin Murphy
2019-01-17 15:13   ` [PATCH 1/5] iommu/tegra-smmu: Fix domain_alloc Dmitry Osipenko
     [not found]     ` <e55f408d-d518-f12d-4233-1b70263400f4-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-01-17 16:50       ` Robin Murphy
     [not found]         ` <4f3104b7-120e-d71b-e7ea-9790ed2a3c97-5wv7dgnIgG8@public.gmane.org>
2019-01-24 22:15           ` navneet kumar
2019-02-14 11:12   ` Thierry Reding

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