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X-UUID: ad783735897a4deb96e9fc9d60047f63-20200525 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1685404416; Mon, 25 May 2020 14:16:19 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS32N2.mediatek.inc (172.27.4.72) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 25 May 2020 14:16:17 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 May 2020 14:16:16 +0800 Message-ID: <1590387275.13912.7.camel@mhfsdcap03> Subject: Re: [PATCH v3 3/7] iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL From: Yong Wu To: Chao Hao Date: Mon, 25 May 2020 14:14:35 +0800 In-Reply-To: <20200509083654.5178-4-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> <20200509083654.5178-4-chao.hao@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: A8DD666DEB4BBAC87549C627945CC7E41AC0342C681DB12F322F811B674E33472000:8 X-MTK: N Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Jun Yan , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Sat, 2020-05-09 at 16:36 +0800, Chao Hao wrote: > In order to improve performance, we always disable STANDARD_AXI_MODE in > MISC_CTRL. > > Signed-off-by: Chao Hao > --- > drivers/iommu/mtk_iommu.c | 8 +++++++- > drivers/iommu/mtk_iommu.h | 1 + > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index e7e7c7695ed1..9ede327a418d 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -42,6 +42,8 @@ > #define F_INVLD_EN1 BIT(1) > > #define REG_MMU_MISC_CTRL 0x048 > +#define F_MMU_STANDARD_AXI_MODE_BIT (BIT(3) | BIT(19)) > + > #define REG_MMU_DCM_DIS 0x050 > > #define REG_MMU_CTRL_REG 0x110 > @@ -585,7 +587,11 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) > } > writel_relaxed(0, data->base + REG_MMU_DCM_DIS); > > - if (data->plat_data->reset_axi) { > + if (data->plat_data->has_misc_ctrl) { > + regval = readl_relaxed(data->base + REG_MMU_MISC_CTRL); > + regval &= ~F_MMU_STANDARD_AXI_MODE_BIT; > + writel_relaxed(regval, data->base + REG_MMU_MISC_CTRL); > + } else if (data->plat_data->reset_axi) { > /* The register is called STANDARD_AXI_MODE in this case */ > writel_relaxed(0, data->base + REG_MMU_MISC_CTRL); > } 0x48 is either STANDARD_AXI_MODE or MISC_CTRL. Thus, if (data->plat_data->reset_axi) { xxx } else { /* MISC_CTRL */ xxx } No need add "has_misc_ctrl". > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > index 1b6ea839b92c..d711ac630037 100644 > --- a/drivers/iommu/mtk_iommu.h > +++ b/drivers/iommu/mtk_iommu.h > @@ -40,6 +40,7 @@ struct mtk_iommu_plat_data { > > /* HW will use the EMI clock if there isn't the "bclk". */ > bool has_bclk; > + bool has_misc_ctrl; > bool has_vld_pa_rng; > bool reset_axi; > unsigned char larbid_remap[MTK_LARB_NR_MAX]; _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu