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X-UUID: 4fffbe82f1f046eb8ef3ec22a46a7691-20200827 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 459103778; Thu, 27 Aug 2020 13:32:50 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 27 Aug 2020 13:32:48 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 27 Aug 2020 13:32:44 +0800 Message-ID: <1598506280.19851.5.camel@mhfsdcap03> Subject: Re: [RESEND PATCH v4] iommu/mediatek: check 4GB mode by reading infracfg From: Yong Wu To: Miles Chen Date: Thu, 27 Aug 2020 13:31:20 +0800 In-Reply-To: <20200826085618.2889-1-miles.chen@mediatek.com> References: <20200826085618.2889-1-miles.chen@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N Cc: Rob Herring , wsd_upstream@mediatek.com, David Hildenbrand , linux-kernel@vger.kernel.org, Mike Rapoport , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, Matthias Brugger , Yingjoe Chen , Christoph Hellwig , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Wed, 2020-08-26 at 16:56 +0800, Miles Chen wrote: > In previous discussion [1] and [2], we found that it is risky to > use max_pfn or totalram_pages to tell if 4GB mode is enabled. > > Check 4GB mode by reading infracfg register, remove the usage > of the un-exported symbol max_pfn. > > This is a step towards building mtk_iommu as a kernel module. > > [1] https://lore.kernel.org/lkml/20200603161132.2441-1-miles.chen@mediatek.com/ > [2] https://lore.kernel.org/lkml/20200604080120.2628-1-miles.chen@mediatek.com/ > [3] https://lore.kernel.org/lkml/20200715205120.GA778876@bogus/ > > Cc: Mike Rapoport > Cc: David Hildenbrand > Cc: Yong Wu > Cc: Yingjoe Chen > Cc: Christoph Hellwig > Cc: Rob Herring > Cc: Matthias Brugger > Signed-off-by: Miles Chen > > --- > > Change since v3 > - use lore.kernel.org links > - move "change since..." after "---" > > Change since v2: > - determine compatible string by m4u_plat > - rebase to next-20200720 > - add "---" > > Change since v1: > - remove the phandle usage, search for infracfg instead [3] > - use infracfg instead of infracfg_regmap > - move infracfg definitaions to linux/soc/mediatek/infracfg.h > - update enable_4GB only when has_4gb_mode > --- > drivers/iommu/mtk_iommu.c | 34 +++++++++++++++++++++++---- > include/linux/soc/mediatek/infracfg.h | 3 +++ > 2 files changed, 32 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 785b228d39a6..adc350150492 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -3,7 +3,6 @@ > * Copyright (c) 2015-2016 MediaTek Inc. > * Author: Yong Wu > */ > -#include > #include > #include > #include > @@ -15,13 +14,16 @@ > #include > #include > #include > +#include > #include > #include > #include > #include > #include > +#include > #include > #include > +#include > #include > #include > > @@ -640,8 +642,11 @@ static int mtk_iommu_probe(struct platform_device *pdev) > struct resource *res; > resource_size_t ioaddr; > struct component_match *match = NULL; > + struct regmap *infracfg; > void *protect; > int i, larb_nr, ret; > + u32 val; > + char *p; > > data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); > if (!data) > @@ -655,10 +660,29 @@ static int mtk_iommu_probe(struct platform_device *pdev) > return -ENOMEM; > data->protect_base = ALIGN(virt_to_phys(protect), MTK_PROTECT_PA_ALIGN); > > - /* Whether the current dram is over 4GB */ > - data->enable_4GB = !!(max_pfn > (BIT_ULL(32) >> PAGE_SHIFT)); > - if (!MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) > - data->enable_4GB = false; > + data->enable_4GB = false; > + if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_4GB_MODE)) { > + switch (data->plat_data->m4u_plat) { > + case M4U_MT2712: > + p = "mediatek,mt2712-infracfg"; > + break; > + case M4U_MT8173: > + p = "mediatek,mt8173-infracfg"; > + break; > + default: > + p = NULL; > + } > + This can be simplified: if (data->plat_data->m4u_plat == M4U_MT2712) p = "mediatek,mt2712-infracfg"; else if(data->plat_data->m4u_plat == M4U_MT8173) p = "mediatek,mt8173-infracfg"; else return -EINVAL; Then, Reviewed-by: Yong Wu > + infracfg = syscon_regmap_lookup_by_compatible(p); > + > + if (IS_ERR(infracfg)) > + return PTR_ERR(infracfg); > + > + ret = regmap_read(infracfg, REG_INFRA_MISC, &val); > + if (ret) > + return ret; > + data->enable_4GB = !!(val & F_DDR_4GB_SUPPORT_EN); > + } > > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > data->base = devm_ioremap_resource(dev, res); > diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h > index fd25f0148566..233463d789c6 100644 > --- a/include/linux/soc/mediatek/infracfg.h > +++ b/include/linux/soc/mediatek/infracfg.h > @@ -32,6 +32,9 @@ > #define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \ > BIT(7) | BIT(8)) > > +#define REG_INFRA_MISC 0xf00 > +#define F_DDR_4GB_SUPPORT_EN BIT(13) > + > int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, > bool reg_update); > int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu