From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
To: Joerg Roedel <jroedel-l3A5Bk7waGM@public.gmane.org>
Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH] iommu: arm-smmu: avoid build warning
Date: Fri, 30 Jan 2015 22:55:55 +0100 [thread overview]
Message-ID: <1754709.y30A9Ie4hF@wuerfel> (raw)
ARM allmodconfig gained a new warning when dma_addr_t is 32-bit wide:
drivers/iommu/arm-smmu.c: In function 'arm_smmu_iova_to_phys_hard':
drivers/iommu/arm-smmu.c:1255:3: warning: right shift count >= width of type
This changes the calculation so that the effective type is always
64-bit.
Signed-off-by: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Fixes: 859a732e4f713 ("iommu/arm-smmu: add support for iova_to_phys through ATS1PR")
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1d6d43bb3395..fc13dd56953e 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1252,7 +1252,7 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
} else {
u32 reg = iova & ~0xfff;
writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO);
- reg = (iova & ~0xfff) >> 32;
+ reg = ((u64)iova & ~0xfff) >> 32;
writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_HI);
}
next reply other threads:[~2015-01-30 21:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-30 21:55 Arnd Bergmann [this message]
2015-02-02 10:20 ` [PATCH] iommu: arm-smmu: avoid build warning Will Deacon
[not found] ` <20150202102048.GB30699-5wv7dgnIgG8@public.gmane.org>
2015-02-03 17:54 ` joro-zLv9SwRftAIdnm+yROfE0A
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