From: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
To: Suravee Suthikulanit
<suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] iommu/amd: Add workaround to propery clearing IOMMU status register
Date: Tue, 9 Apr 2013 19:30:30 +0200 [thread overview]
Message-ID: <20130409173030.GH6858@8bytes.org> (raw)
In-Reply-To: <51642442.7090908-5C7GfCeVMHo@public.gmane.org>
On Tue, Apr 09, 2013 at 09:22:58AM -0500, Suthikulpanit, Suravee wrote:
> The reason I implemented the "per-thread IOMMU handling" and the
> "workaround" together in one patch
> is because it simplifies the synchronization of clearing and
> checking the interrupt enabling bits.
> In the previous implementation, we could end up having multiple
> threads trying to access the status register
> at the same time.
This is the reason for the iommu->lock spinlock in this code at the
moment.
Joerg
prev parent reply other threads:[~2013-04-09 17:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-03 23:19 [PATCH] iommu/amd: Add workaround to propery clearing IOMMU status register suravee.suthikulpanit
2013-04-08 14:07 ` Suravee Suthikulanit
[not found] ` <1365031144-2543-1-git-send-email-suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2013-04-09 9:49 ` Joerg Roedel
[not found] ` <20130409094929.GE6858-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-04-09 14:22 ` Suravee Suthikulanit
[not found] ` <51642442.7090908-5C7GfCeVMHo@public.gmane.org>
2013-04-09 17:30 ` Joerg Roedel [this message]
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