From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?iso-8859-1?Q?Beno=EEt?= Canet Subject: SR-IOV PF reset and QEMU VFs VFIO passthrough Date: Sat, 1 Jun 2013 14:13:21 +0200 Message-ID: <20130601121320.GC5157@irqsave.net> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: linux-pci@vger.kernel.org, qemu-devel@nongnu.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com List-Id: iommu@lists.linux-foundation.org Hello, I may have soon the PF driver of an SR-IOV card to code and make work wit= h QEMU/KVM so I have the following questions. In an AMD64 setup where QEMU use VFIO to passthrough the VFs of an SR-IOV= card to a guest will the consequences of a PF FLR be handled fine by QEMU and = the guest ? I read that pci_reset_function would call pci_restore_state restoring the= SR-IOV configuration after the reset of the PF. The ways the hardware work means that the VFs would disappear and reappea= r in a short lapse of time. Will these events be handled by the kernel pci hotplug code ? Given that the PF driver restore the PF config space after the reset will= /sys files used by QEMU disappear and reappear messing the QEMU VFIO passthrou= gh or will it goes smoothly ? Best regards Beno=EEt Canet