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From: Will Deacon <will.deacon@arm.com>
To: Andreas Herrmann <andreas.herrmann@calxeda.com>
Cc: "iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 2/6] iommu/arm-smmu: Introduce bus notifier block
Date: Thu, 31 Oct 2013 00:46:53 +0000	[thread overview]
Message-ID: <20131031004653.GB28613@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1382127195-15261-3-git-send-email-andreas.herrmann@calxeda.com>

On Fri, Oct 18, 2013 at 09:13:11PM +0100, Andreas Herrmann wrote:
> At the moment just handle BUS_NOTIFY_BIND_DRIVER to conditionally
> isolate all master devices for an SMMU.
> 
> Depending on DT information each device is put into its own protection
> domain (if possible).  For configuration with one or just a few
> masters per SMMU that is easy to achieve.
> 
> In case of many devices per SMMU (e.g. MMU-500 with it's distributed
> translation support) isolation of each device might not be possible --
> depending on number of available SMR groups and/or context banks.
> 
> Default is that device isolation is contolled per SMMU with SMMU node
> property "arm,smmu-isolate-devices" in a DT. If this property is set
> for an SMMU node, device isolation is performed.
> 
> W/o device isolation the driver detects SMMUs but no translation is
> configured (transactions just bypass translation process).
> 
> Note that for device isolation dma_base and size are fixed as 0 and
> SZ_128M at the moment.

I still think we need to solve the base/size issue before these can be
merged (the option parsing code in patch 1 looks fine).

Maybe we could it all on demand by registering a fault handler with an
empty IOMMU domain?

Will

  reply	other threads:[~2013-10-31  0:46 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-18 20:13 [PATCH v3 0/6] iommu/arm-smmu: Misc modifications to support SMMUs on Calxeda ECX-2000 Andreas Herrmann
     [not found] ` <1382127195-15261-1-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-18 20:13   ` [PATCH 1/6] iommu/arm-smmu: Introduce driver option handling Andreas Herrmann
2013-10-18 20:13   ` [PATCH 2/6] iommu/arm-smmu: Introduce bus notifier block Andreas Herrmann
2013-10-31  0:46     ` Will Deacon [this message]
2013-10-18 20:13   ` [PATCH 3/6] iommu/arm-smmu: Support buggy implementations where all config accesses are secure Andreas Herrmann
     [not found]     ` <1382127195-15261-4-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-31  0:48       ` Will Deacon
2013-10-18 20:13   ` [PATCH 4/6] iommu/arm-smmu: Introduce automatic stream-id-masking Andreas Herrmann
     [not found]     ` <1382127195-15261-5-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-31 17:55       ` Will Deacon
2013-10-18 20:13   ` [PATCH 5/6] ARM: dts: Add nodes for SMMUs on Calxeda ECX-2000 Andreas Herrmann
     [not found]     ` <1382127195-15261-6-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-31  1:15       ` Will Deacon
     [not found]         ` <20131031011521.GE28613-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-31  8:58           ` Andreas Herrmann
2013-10-18 20:13   ` [PATCH 6/6] documentation/iommu: Update description of ARM System MMU binding Andreas Herrmann
2013-10-31  1:17     ` Will Deacon
     [not found]       ` <20131031011715.GF28613-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-31  6:45         ` Rob Herring
     [not found]           ` <CAL_JsqKV4r9eYMT4NazmGJTEGtwg+XuvTE3rH3pEL_h7nyvb-w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-10-31  9:16             ` Andreas Herrmann
2013-10-31 16:02               ` Will Deacon

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