From: Will Deacon <will.deacon@arm.com>
To: Andreas Herrmann <andreas.herrmann@calxeda.com>
Cc: "grant.likely@linaro.org" <grant.likely@linaro.org>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 6/6] documentation/iommu: Update description of ARM System MMU binding
Date: Thu, 31 Oct 2013 01:17:15 +0000 [thread overview]
Message-ID: <20131031011715.GF28613@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1382127195-15261-7-git-send-email-andreas.herrmann@calxeda.com>
On Fri, Oct 18, 2013 at 09:13:15PM +0100, Andreas Herrmann wrote:
> This patch adds descriptions fore new properties of device tree
> binding for the ARM SMMU architecture. These properties control
> arm-smmu driver options.
>
> Cc: Rob Herring <robherring2@gmail.com>
> Cc: Grant Likely <grant.likely@linaro.org>
> Cc: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Andreas Herrmann <andreas.herrmann@calxeda.com>
> ---
> .../devicetree/bindings/iommu/arm,smmu.txt | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index e34c6cd..de88cf9 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -48,6 +48,17 @@ conditions.
> from the mmu-masters towards memory) node for this
> SMMU.
>
> +- arm,smmu-isolate-devices : Enable device isolation for all masters
> + of this SMMU. Ie. each master will be
> + attached to its own iommu domain.
> +
> +- arm,smmu-secure-config-access : Enable proper handling of buggy
> + implementations that always use
> + secure access to SMMU configuration
> + registers. In this case non-secure
> + aliases of secure registers have to
> + be used during SMMU configuration.
Why are you using the "arm" vendor prefix for the secure config access
stuff? Wouldn't it make more sense to use "calxeda", just in case somebody
else finds a different way to wire things up in this regard?
Will
next prev parent reply other threads:[~2013-10-31 1:17 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-18 20:13 [PATCH v3 0/6] iommu/arm-smmu: Misc modifications to support SMMUs on Calxeda ECX-2000 Andreas Herrmann
[not found] ` <1382127195-15261-1-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-18 20:13 ` [PATCH 1/6] iommu/arm-smmu: Introduce driver option handling Andreas Herrmann
2013-10-18 20:13 ` [PATCH 2/6] iommu/arm-smmu: Introduce bus notifier block Andreas Herrmann
2013-10-31 0:46 ` Will Deacon
2013-10-18 20:13 ` [PATCH 3/6] iommu/arm-smmu: Support buggy implementations where all config accesses are secure Andreas Herrmann
[not found] ` <1382127195-15261-4-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-31 0:48 ` Will Deacon
2013-10-18 20:13 ` [PATCH 4/6] iommu/arm-smmu: Introduce automatic stream-id-masking Andreas Herrmann
[not found] ` <1382127195-15261-5-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-31 17:55 ` Will Deacon
2013-10-18 20:13 ` [PATCH 5/6] ARM: dts: Add nodes for SMMUs on Calxeda ECX-2000 Andreas Herrmann
[not found] ` <1382127195-15261-6-git-send-email-andreas.herrmann-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
2013-10-31 1:15 ` Will Deacon
[not found] ` <20131031011521.GE28613-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-31 8:58 ` Andreas Herrmann
2013-10-18 20:13 ` [PATCH 6/6] documentation/iommu: Update description of ARM System MMU binding Andreas Herrmann
2013-10-31 1:17 ` Will Deacon [this message]
[not found] ` <20131031011715.GF28613-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-10-31 6:45 ` Rob Herring
[not found] ` <CAL_JsqKV4r9eYMT4NazmGJTEGtwg+XuvTE3rH3pEL_h7nyvb-w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-10-31 9:16 ` Andreas Herrmann
2013-10-31 16:02 ` Will Deacon
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