From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: "swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org"
<swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>,
"grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org"
<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Lorenzo Pieralisi
<Lorenzo.Pieralisi-5wv7dgnIgG8@public.gmane.org>,
"swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org"
<swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org"
<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding
Date: Mon, 11 Nov 2013 11:35:10 +0000 [thread overview]
Message-ID: <20131111113510.GG28302@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1384158718-4756-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Hi Hiroshi,
On Mon, Nov 11, 2013 at 08:31:56AM +0000, Hiroshi Doyu wrote:
> Follow arm,smmu's "mmu-masters" binding.
>
> Signed-off-by: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> Update:
> Newly added for v4. In v3, I used "nvidia,swgroups" and
> "nvidia,memory-clients" bindings.
[...]
> @@ -1151,6 +1152,77 @@ static void tegra_smmu_create_default_map(struct smmu_device *smmu)
> }
> }
>
> +static struct smmu_client *find_smmu_client(struct smmu_device *smmu,
> + struct device_node *dev_node)
> +{
> + struct rb_node *node = smmu->clients.rb_node;
> +
> + while (node) {
> + struct smmu_client *client;
> +
> + client = container_of(node, struct smmu_client, node);
> + if (dev_node < client->of_node)
> + node = node->rb_left;
> + else if (dev_node > client->of_node)
> + node = node->rb_right;
> + else
> + return client;
> + }
> +
> + return NULL;
> +}
> +
> +static int insert_smmu_client(struct smmu_device *smmu,
> + struct smmu_client *client)
> +{
> + struct rb_node **new, *parent;
> +
> + new = &smmu->clients.rb_node;
> + parent = NULL;
> + while (*new) {
> + struct smmu_client *this;
> + this = container_of(*new, struct smmu_client, node);
> +
> + parent = *new;
> + if (client->of_node < this->of_node)
> + new = &((*new)->rb_left);
> + else if (client->of_node > this->of_node)
> + new = &((*new)->rb_right);
> + else
> + return -EEXIST;
> + }
> +
> + rb_link_node(&client->node, parent, new);
> + rb_insert_color(&client->node, &smmu->clients);
> + return 0;
> +}
> +
> +static int register_smmu_client(struct smmu_device *smmu,
> + struct device *dev,
> + struct of_phandle_args *args)
> +{
> + struct smmu_client *client;
> + int i;
> +
> + client = find_smmu_client(smmu, args->np);
> + if (client) {
> + dev_err(dev,
> + "rejecting multiple registrations for client device %s\n",
> + args->np->full_name);
> + return -EBUSY;
> + }
> +
> + client = devm_kzalloc(dev, sizeof(*client), GFP_KERNEL);
> + if (!client)
> + return -ENOMEM;
> +
> + client->of_node = args->np;
> + for (i = 0; i < args->args_count; i++)
> + client->hwgrp |= 1ULL << args->args[i];
> +
> + return insert_smmu_client(smmu, client);
> +}
This code looks familiar ;)
If this approach makes it past the DT guys, I wonder if there's any scope
for factoring out some of the arm-smmu code so that basic client
parsing/searching/registration can be made into a library?
Will
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next prev parent reply other threads:[~2013-11-11 11:35 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-11 8:31 [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu
[not found] ` <1384158718-4756-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-11 8:31 ` [PATCHv4 1/7] ARM: tegra: Create a DT header defining SWGROUP ID Hiroshi Doyu
[not found] ` <1384158718-4756-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-12 22:48 ` Stephen Warren
[not found] ` <5282B036.9090604-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-15 10:29 ` Hiroshi Doyu
[not found] ` <20131115122926.9166a6693bb9378a7f2c1526-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-15 16:44 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 2/7] driver/core: Populate IOMMU'able devices in order Hiroshi Doyu
[not found] ` <1384158718-4756-3-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-11 11:39 ` Will Deacon
[not found] ` <20131111113936.GH28302-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-12 23:30 ` Stephen Warren
2013-11-12 23:34 ` Stephen Warren
[not found] ` <5282BAFC.8070405-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 7:23 ` Hiroshi Doyu
[not found] ` <20131113092354.5b65f29bacc4f37083f81e2e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 17:49 ` Stephen Warren
2013-11-13 14:38 ` Will Deacon
[not found] ` <20131113143804.GA11928-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-13 16:06 ` Hiroshi Doyu
[not found] ` <20131113.180610.823304139654159769.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 17:31 ` Will Deacon
[not found] ` <20131113173142.GF11928-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-13 17:53 ` Stephen Warren
[not found] ` <5283BCA0.40300-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-14 16:16 ` Will Deacon
2013-11-13 17:45 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 3/7] iommu/tegra: smmu: Register IOMMU'able devices dynamically Hiroshi Doyu
[not found] ` <1384158718-4756-4-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-12 23:53 ` Stephen Warren
2013-11-12 23:58 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 4/7] iommu/tegra: smmu: Calculate ASID register offset by ID Hiroshi Doyu
[not found] ` <1384158718-4756-5-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 0:02 ` Stephen Warren
2013-11-11 8:31 ` [PATCHv4 5/7] iommu/tegra: smmu: Support "mmu-masters" binding Hiroshi Doyu
[not found] ` <1384158718-4756-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-11 11:35 ` Will Deacon [this message]
[not found] ` <20131111113510.GG28302-MRww78TxoiP5vMa5CHWGZ34zcgK1vI+I0E9HWUfgJXw@public.gmane.org>
2013-11-11 12:03 ` Hiroshi Doyu
2013-11-13 0:17 ` Stephen Warren
[not found] ` <5282C512.5090900-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 7:45 ` Hiroshi Doyu
[not found] ` <20131113094517.4608edf4302b61e3c4402a25-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 17:58 ` Stephen Warren
[not found] ` <5283BDBF.9020509-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-14 6:41 ` Hiroshi Doyu
[not found] ` <20131114.084145.998129499909471378.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-14 16:59 ` Stephen Warren
2013-11-13 11:15 ` Kumar Gala
2013-11-11 8:31 ` [PATCHv4 6/7] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2013-11-11 8:31 ` [PATCHv4 7/7] iommu/tegra: smmu: Allow duplicate ASID wirte Hiroshi Doyu
[not found] ` <1384158718-4756-8-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-13 0:27 ` Stephen Warren
2013-11-12 22:40 ` [PATCHv4 0/7] Unifying SMMU driver among Tegra SoCs Stephen Warren
[not found] ` <5282AE55.1040701-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-11-13 6:04 ` Hiroshi Doyu
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