From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joerg Roedel Subject: Re: [PATCH V5 00/10] perf/amd/iommu: Enable multi-IOMMU support Date: Thu, 25 Feb 2016 15:54:30 +0100 Message-ID: <20160225145429.GA18390@8bytes.org> References: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Suravee Suthikulpanit Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, acme-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, andihartmann-KuiJ5kEpwI6ELgA04lAiVw@public.gmane.org, mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org, labbott-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org List-Id: iommu@lists.linux-foundation.org Hi Suravee, On Tue, Feb 23, 2016 at 08:12:34AM -0600, Suravee Suthikulpanit wrote: > This is a two-part patch series: > > Part1: 1-4 : > Introduce a workaround for the current AMD IOMMU perf initialization issue > in some existing KV and CZ platforms, where it fails to write to IOMMU > perf counter as reported by Andreas Hartmann here > (http://comments.gmane.org/gmane.linux.kernel.pci/49147). Okay, these 4 patches fix the issue, but they also refactor the code and so a lot more. They are not suitable for stable kernels, so to just fix the issue I take the small patch I extracted from yours and posted previously. I retains your authorship, hope that is fine with you. You can rebase these patches on-top of that minimal fix. Joerg