From: Adam Morrison <mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
To: dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: serebrin-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
dan-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org,
omer-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org,
shli-b10kYP2dOMg@public.gmane.org,
gvdl-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
Kernel-team-b10kYP2dOMg@public.gmane.org
Subject: [PATCH v4 5/7] iommu/vt-d: avoid dev iotlb logic in intel-iommu for domains with no dev iotlbs
Date: Wed, 20 Apr 2016 19:03:35 +0300 [thread overview]
Message-ID: <20160420160333.GA30258@cs.technion.ac.il> (raw)
In-Reply-To: <3780bc5682714a48a8d90ee0adf621dbd3529283.1461135861.git.mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
From: Omer Peleg <omer-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
This patch avoids taking the device_domain_lock in iommu_flush_dev_iotlb()
for domains with no dev iotlb devices.
Signed-off-by: Omer Peleg <omer-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
[gvdl-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org: fixed locking issues]
Signed-off-by: Godfrey van der Linden <gvdl-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
[mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org: rebased and reworded the commit message]
Signed-off-by: Adam Morrison <mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
Reviewed-by: Shaohua Li <shli-b10kYP2dOMg@public.gmane.org>
Reviewed-by: Ben Serebrin <serebrin-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
---
drivers/iommu/intel-iommu.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index be6d885..e9f7086 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -391,6 +391,7 @@ struct dmar_domain {
* domain ids are 16 bit wide according
* to VT-d spec, section 9.3 */
+ bool has_iotlb_device;
struct list_head devices; /* all devices' list */
struct iova_domain iovad; /* iova's that belong to this domain */
@@ -1464,10 +1465,35 @@ iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu,
return NULL;
}
+static void domain_update_iotlb(struct dmar_domain *domain)
+{
+ struct device_domain_info *info;
+ bool has_iotlb_device = false;
+
+ assert_spin_locked(&device_domain_lock);
+
+ list_for_each_entry(info, &domain->devices, link) {
+ struct pci_dev *pdev;
+
+ if (!info->dev || !dev_is_pci(info->dev))
+ continue;
+
+ pdev = to_pci_dev(info->dev);
+ if (pdev->ats_enabled) {
+ has_iotlb_device = true;
+ break;
+ }
+ }
+
+ domain->has_iotlb_device = has_iotlb_device;
+}
+
static void iommu_enable_dev_iotlb(struct device_domain_info *info)
{
struct pci_dev *pdev;
+ assert_spin_locked(&device_domain_lock);
+
if (!info || !dev_is_pci(info->dev))
return;
@@ -1487,6 +1513,7 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info)
#endif
if (info->ats_supported && !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) {
info->ats_enabled = 1;
+ domain_update_iotlb(info->domain);
info->ats_qdep = pci_ats_queue_depth(pdev);
}
}
@@ -1495,6 +1522,8 @@ static void iommu_disable_dev_iotlb(struct device_domain_info *info)
{
struct pci_dev *pdev;
+ assert_spin_locked(&device_domain_lock);
+
if (!dev_is_pci(info->dev))
return;
@@ -1503,6 +1532,7 @@ static void iommu_disable_dev_iotlb(struct device_domain_info *info)
if (info->ats_enabled) {
pci_disable_ats(pdev);
info->ats_enabled = 0;
+ domain_update_iotlb(info->domain);
}
#ifdef CONFIG_INTEL_IOMMU_SVM
if (info->pri_enabled) {
@@ -1523,6 +1553,9 @@ static void iommu_flush_dev_iotlb(struct dmar_domain *domain,
unsigned long flags;
struct device_domain_info *info;
+ if (!domain->has_iotlb_device)
+ return;
+
spin_lock_irqsave(&device_domain_lock, flags);
list_for_each_entry(info, &domain->devices, link) {
if (!info->ats_enabled)
@@ -1740,6 +1773,7 @@ static struct dmar_domain *alloc_domain(int flags)
memset(domain, 0, sizeof(*domain));
domain->nid = -1;
domain->flags = flags;
+ domain->has_iotlb_device = false;
INIT_LIST_HEAD(&domain->devices);
return domain;
--
1.9.1
next prev parent reply other threads:[~2016-04-20 16:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-20 8:31 [PATCH v4 0/7] Intel IOMMU scalability improvements Adam Morrison
[not found] ` <cover.1461135861.git.mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
2016-04-20 8:32 ` [PATCH v4 1/7] iommu/vt-d: refactoring of deferred flush entries Adam Morrison
2016-04-20 8:33 ` [PATCH v4 2/7] iommu/vt-d: per-cpu deferred invalidation queues Adam Morrison
2016-04-20 8:33 ` [PATCH v4 3/7] iommu/vt-d: correct flush_unmaps pfn usage Adam Morrison
2016-04-20 8:33 ` [PATCH v4 4/7] iommu/vt-d: only unmap mapped entries Adam Morrison
2016-04-20 8:33 ` [PATCH v4 5/7] iommu/vt-d: avoid dev iotlb logic in intel-iommu for domains with no dev iotlbs Adam Morrison
[not found] ` <3780bc5682714a48a8d90ee0adf621dbd3529283.1461135861.git.mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
2016-04-20 15:17 ` Godfrey van der Linden via iommu
[not found] ` <CANSfodEQC3YcVh0_THpDMQx_YZqD=p5Zw5BEnwRhm3hNgaLOhA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-04-20 15:36 ` Adam Morrison
2016-04-20 16:03 ` Adam Morrison [this message]
2016-04-20 8:33 ` [PATCH v4 6/7] iommu/vt-d: change intel-iommu to use IOVA frame numbers Adam Morrison
2016-04-20 8:34 ` [PATCH v4 7/7] iommu/vt-d: introduce per-cpu caching to iova allocation Adam Morrison
[not found] ` <3d87d1ef7c5ae3e07e2d7c105c2fe2bb9a82cb46.1461135861.git.mad-FrESSTt7Abv7r6psnUbsSmZHpeb/A1Y/@public.gmane.org>
2016-04-20 19:21 ` David Woodhouse
[not found] ` <1461180093.25115.28.camel-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
2016-04-20 19:54 ` David Woodhouse
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