From: Christoph Hellwig <hch@lst.de>
To: "Martin K. Petersen" <martin.petersen@oracle.com>
Cc: Huacai Chen <chenhc@lemote.com>,
linux-scsi@vger.kernel.org, iommu@lists.linux-foundation.org,
stable@vger.kernel.org
Subject: [PATCH 3/3] libsas: align sata_device's rps_resp on a cacheline
Date: Tue, 21 Nov 2017 14:23:39 +0100 [thread overview]
Message-ID: <20171121132339.1702-4-hch@lst.de> (raw)
In-Reply-To: <20171121132339.1702-1-hch@lst.de>
From: Huacai Chen <chenhc@lemote.com>
The rps_resp buffer in ata_device is a DMA target, but it isn't
explicitly cacheline aligned. Due to this, adjacent fields can be
overwritten with stale data from memory on non-coherent architectures.
As a result, the kernel is sometimes unable to communicate with an
SATA device behind a SAS expander.
Fix this by ensuring that the rps_resp buffer is cacheline aligned.
This issue is similar to that fixed by Commit 84bda12af31f93 ("libata:
align ap->sector_buf") and Commit 4ee34ea3a12396f35b26 ("libata: Align
ata_device's id on a cacheline").
Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
include/scsi/libsas.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/scsi/libsas.h b/include/scsi/libsas.h
index 0f9cbf96c093..6df6fe0c2198 100644
--- a/include/scsi/libsas.h
+++ b/include/scsi/libsas.h
@@ -159,11 +159,11 @@ struct expander_device {
struct sata_device {
unsigned int class;
- struct smp_resp rps_resp; /* report_phy_sata_resp */
u8 port_no; /* port number, if this is a PM (Port) */
struct ata_port *ap;
struct ata_host ata_host;
+ struct smp_resp rps_resp ____cacheline_aligned; /* report_phy_sata_resp */
u8 fis[ATA_RESP_FIS_SIZE];
};
--
2.14.2
next prev parent reply other threads:[~2017-11-21 13:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-21 13:23 scsi fixes for non cache-coherent architectures (for 4.15 and stable) Christoph Hellwig
2017-11-21 13:23 ` [PATCH 1/3] dma-mapping: always provide dma_get_cache_alignment Christoph Hellwig
[not found] ` <20171121132339.1702-1-hch-jcswGhMUV9g@public.gmane.org>
2017-11-21 13:23 ` [PATCH 2/3] scsi: use dma_get_cache_alignment() as minimum DMA alignment Christoph Hellwig
2017-11-21 13:23 ` Christoph Hellwig [this message]
2017-11-22 4:07 ` scsi fixes for non cache-coherent architectures (for 4.15 and stable) Martin K. Petersen
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