From: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
To: Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
James Hogan <jhogan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
David Daney <david.daney-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>,
Kevin Cernekee <cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Jiaxun Yang <jiaxun.yang-nEvAom26CKtBDgjK7y7TUQ@public.gmane.org>,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
Tom Bogendoerfer
<tsbogend-I1c7kopa9pxLokYuJOExCg@public.gmane.org>,
Huacai Chen <chenhc-h23VmSynlr/QT0dZR+AlfA@public.gmane.org>
Subject: [PATCH 03/25] MIPS: remove CONFIG_DMA_COHERENT
Date: Fri, 25 May 2018 11:20:49 +0200 [thread overview]
Message-ID: <20180525092111.18516-4-hch@lst.de> (raw)
In-Reply-To: <20180525092111.18516-1-hch-jcswGhMUV9g@public.gmane.org>
We can just check for !CONFIG_DMA_NONCOHERENT instead and simplify things
a lot.
Signed-off-by: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
---
arch/mips/Kconfig | 16 ----------------
arch/mips/include/asm/dma-coherence.h | 6 +++---
arch/mips/include/asm/mach-generic/kmalloc.h | 3 +--
arch/mips/mti-malta/malta-setup.c | 4 ++--
arch/mips/sibyte/Kconfig | 1 -
5 files changed, 6 insertions(+), 24 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2dcdc13cd65d..43bb037301f6 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -660,7 +660,6 @@ config SGI_IP27
select FW_ARC64
select BOOT_ELF64
select DEFAULT_SGI_PARTITION
- select DMA_COHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
select NR_CPUS_DEFAULT_64
@@ -737,7 +736,6 @@ config SGI_IP32
config SIBYTE_CRHINE
bool "Sibyte BCM91120C-CRhine"
select BOOT_ELF32
- select DMA_COHERENT
select SIBYTE_BCM1120
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
@@ -747,7 +745,6 @@ config SIBYTE_CRHINE
config SIBYTE_CARMEL
bool "Sibyte BCM91120x-Carmel"
select BOOT_ELF32
- select DMA_COHERENT
select SIBYTE_BCM1120
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
@@ -757,7 +754,6 @@ config SIBYTE_CARMEL
config SIBYTE_CRHONE
bool "Sibyte BCM91125C-CRhone"
select BOOT_ELF32
- select DMA_COHERENT
select SIBYTE_BCM1125
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
@@ -768,7 +764,6 @@ config SIBYTE_CRHONE
config SIBYTE_RHONE
bool "Sibyte BCM91125E-Rhone"
select BOOT_ELF32
- select DMA_COHERENT
select SIBYTE_BCM1125H
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
@@ -778,7 +773,6 @@ config SIBYTE_RHONE
config SIBYTE_SWARM
bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32
- select DMA_COHERENT
select HAVE_PATA_PLATFORM
select SIBYTE_SB1250
select SWAP_IO_SPACE
@@ -791,7 +785,6 @@ config SIBYTE_SWARM
config SIBYTE_LITTLESUR
bool "Sibyte BCM91250C2-LittleSur"
select BOOT_ELF32
- select DMA_COHERENT
select HAVE_PATA_PLATFORM
select SIBYTE_SB1250
select SWAP_IO_SPACE
@@ -803,7 +796,6 @@ config SIBYTE_LITTLESUR
config SIBYTE_SENTOSA
bool "Sibyte BCM91250E-Sentosa"
select BOOT_ELF32
- select DMA_COHERENT
select SIBYTE_SB1250
select SWAP_IO_SPACE
select SYS_HAS_CPU_SB1
@@ -813,7 +805,6 @@ config SIBYTE_SENTOSA
config SIBYTE_BIGSUR
bool "Sibyte BCM91480B-BigSur"
select BOOT_ELF32
- select DMA_COHERENT
select NR_CPUS_DEFAULT_4
select SIBYTE_BCM1x80
select SWAP_IO_SPACE
@@ -890,7 +881,6 @@ config CAVIUM_OCTEON_SOC
select CEVT_R4K
select ARCH_HAS_PHYS_TO_DMA
select PHYS_ADDR_T_64BIT
- select DMA_COHERENT
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select EDAC_SUPPORT
@@ -939,7 +929,6 @@ config NLM_XLR_BOARD
select PHYS_ADDR_T_64BIT
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
- select DMA_COHERENT
select NR_CPUS_DEFAULT_32
select CEVT_R4K
select CSRC_R4K
@@ -967,7 +956,6 @@ config NLM_XLP_BOARD
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_HIGHMEM
- select DMA_COHERENT
select NR_CPUS_DEFAULT_32
select CEVT_R4K
select CSRC_R4K
@@ -986,7 +974,6 @@ config MIPS_PARAVIRT
bool "Para-Virtualized guest system"
select CEVT_R4K
select CSRC_R4K
- select DMA_COHERENT
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
@@ -1112,9 +1099,6 @@ config DMA_PERDEV_COHERENT
bool
select DMA_MAYBE_COHERENT
-config DMA_COHERENT
- bool
-
config DMA_NONCOHERENT
bool
select NEED_DMA_MAP_STATE
diff --git a/arch/mips/include/asm/dma-coherence.h b/arch/mips/include/asm/dma-coherence.h
index 72d0eab02afc..8eda48748ed5 100644
--- a/arch/mips/include/asm/dma-coherence.h
+++ b/arch/mips/include/asm/dma-coherence.h
@@ -21,10 +21,10 @@ enum coherent_io_user_state {
extern enum coherent_io_user_state coherentio;
extern int hw_coherentio;
#else
-#ifdef CONFIG_DMA_COHERENT
-#define coherentio IO_COHERENCE_ENABLED
-#else
+#ifdef CONFIG_DMA_NONCOHERENT
#define coherentio IO_COHERENCE_DISABLED
+#else
+#define coherentio IO_COHERENCE_ENABLED
#endif
#define hw_coherentio 0
#endif /* CONFIG_DMA_MAYBE_COHERENT */
diff --git a/arch/mips/include/asm/mach-generic/kmalloc.h b/arch/mips/include/asm/mach-generic/kmalloc.h
index 74207c7bd00d..649a98338886 100644
--- a/arch/mips/include/asm/mach-generic/kmalloc.h
+++ b/arch/mips/include/asm/mach-generic/kmalloc.h
@@ -2,8 +2,7 @@
#ifndef __ASM_MACH_GENERIC_KMALLOC_H
#define __ASM_MACH_GENERIC_KMALLOC_H
-
-#ifndef CONFIG_DMA_COHERENT
+#ifdef CONFIG_DMA_NONCOHERENT
/*
* Total overkill for most systems but need as a safe default.
* Set this one if any device in the system might do non-coherent DMA.
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c
index 7b63914d2e58..4d5cdfeee3db 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -227,7 +227,7 @@ static void __init bonito_quirks_setup(void)
} else
BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
-#ifdef CONFIG_DMA_COHERENT
+#ifndef CONFIG_DMA_NONCOHERENT
if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
pr_info("Enabled Bonito CPU coherency\n");
@@ -279,7 +279,7 @@ void __init plat_mem_setup(void)
*/
enable_dma(4);
-#ifdef CONFIG_DMA_COHERENT
+#ifndef CONFIG_DMA_NONCOHERENT
if (mips_revision_sconid != MIPS_REVISION_SCON_BONITO)
panic("Hardware DMA cache coherency not supported");
#endif
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index f4dbce25bc6a..7ec278d72096 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -70,7 +70,6 @@ config SIBYTE_BCM1x55
config SIBYTE_SB1xxx_SOC
bool
- select DMA_COHERENT
select IRQ_MIPS_CPU
select SWAP_IO_SPACE
select SYS_SUPPORTS_32BIT_KERNEL
--
2.17.0
next prev parent reply other threads:[~2018-05-25 9:20 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-25 9:20 [RFC] switch mips to use the generic dma map ops Christoph Hellwig
[not found] ` <20180525092111.18516-1-hch-jcswGhMUV9g@public.gmane.org>
2018-05-25 9:20 ` [PATCH 01/25] MIPS: remove a dead ifdef from mach-ath25/dma-coherence.h Christoph Hellwig
2018-05-25 9:20 ` [PATCH 02/25] MIPS: simplify CONFIG_DMA_NONCOHERENT ifdefs Christoph Hellwig
2018-05-25 9:20 ` Christoph Hellwig [this message]
2018-05-25 9:20 ` [PATCH 04/25] MIPS: Octeon: unexport __phys_to_dma and __dma_to_phys Christoph Hellwig
2018-05-25 9:20 ` [PATCH 05/25] MIPS: Octeon: refactor swiotlb code Christoph Hellwig
[not found] ` <20180525092111.18516-6-hch-jcswGhMUV9g@public.gmane.org>
2018-05-30 23:25 ` Paul Burton
2018-05-31 16:38 ` Christoph Hellwig
2018-05-25 9:20 ` [PATCH 06/25] MIPS: loongson: remove loongson_dma_supported Christoph Hellwig
[not found] ` <20180525092111.18516-7-hch-jcswGhMUV9g@public.gmane.org>
2018-05-31 23:12 ` Paul Burton
2018-05-25 9:20 ` [PATCH 07/25] MIPS: consolidate the swiotlb implementations Christoph Hellwig
2018-05-25 9:20 ` [PATCH 08/25] MIPS: remove the mips_dma_map_ops indirection Christoph Hellwig
2018-05-25 9:20 ` [PATCH 09/25] MIPS: make the default mips dma implementation optional Christoph Hellwig
2018-05-25 9:20 ` [PATCH 10/25] MIPS: Octeon: remove mips dma-default stubs Christoph Hellwig
2018-05-25 9:20 ` [PATCH 11/25] MIPS: Octeon: move swiotlb declarations out of dma-coherence.h Christoph Hellwig
2018-05-25 9:20 ` [PATCH 12/25] MIPS: loongson: untangle dma implementations Christoph Hellwig
[not found] ` <20180525092111.18516-13-hch-jcswGhMUV9g@public.gmane.org>
2018-07-11 12:46 ` Maciej W. Rozycki
[not found] ` <alpine.DEB.2.00.1807110407510.30992-AURtyoD2VtPP6B53oEZunQ@public.gmane.org>
2018-07-11 12:57 ` Christoph Hellwig
[not found] ` <20180711125736.GA19191-jcswGhMUV9g@public.gmane.org>
2018-07-11 13:21 ` Maciej W. Rozycki
2018-05-25 9:20 ` [PATCH 13/25] MIPS: loongson: remove loongson-3 handling from dma-coherence.h Christoph Hellwig
2018-05-25 9:21 ` [PATCH 14/25] MIPS: use dma_direct_ops for coherent I/O Christoph Hellwig
2018-05-25 9:21 ` [PATCH 15/25] MIPS: IP27: use dma_direct_ops Christoph Hellwig
2018-05-25 9:21 ` [PATCH 16/25] MIPS: move coherentio setup to setup.c Christoph Hellwig
2018-05-25 9:21 ` [PATCH 17/25] MIPS: use generic dma noncoherent ops for simple noncoherent platforms Christoph Hellwig
2018-05-25 9:21 ` [PATCH 18/25] MIPS: loongson64: use generic dma noncoherent ops Christoph Hellwig
2018-05-25 9:21 ` [PATCH 19/25] MIPS: IP32: " Christoph Hellwig
2018-05-25 9:21 ` [PATCH 20/25] MIPS: ath25: " Christoph Hellwig
2018-05-25 9:21 ` [PATCH 21/25] MIPS: jazz: split dma mapping operations from dma-default Christoph Hellwig
2018-05-25 9:21 ` [PATCH 22/25] dma-noncoherent: add a arch_sync_dma_for_cpu_all hook Christoph Hellwig
2018-05-25 9:21 ` [PATCH 23/25] MIPS: bmips: use generic dma noncoherent ops Christoph Hellwig
2018-05-25 9:21 ` [PATCH 24/25] MIPS: remove the old dma-default implementation Christoph Hellwig
2018-05-25 9:21 ` [PATCH 25/25] MIPS: remove unneeded includes from dma-mapping.h Christoph Hellwig
-- strict thread matches above, loose matches on Subject: below --
2018-06-15 11:08 switch mips to use the generic dma map ops v2 Christoph Hellwig
[not found] ` <20180615110854.19253-1-hch-jcswGhMUV9g@public.gmane.org>
2018-06-15 11:08 ` [PATCH 03/25] MIPS: remove CONFIG_DMA_COHERENT Christoph Hellwig
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